From: Andi Kleen <ak@linux.intel.com>
To: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Andi Kleen <andi@firstfloor.org>,
x86@kernel.org, linux-kernel@vger.kernel.org,
Jiri Olsa <jolsa@redhat.com>,
Stephane Eranian <eranian@google.com>
Subject: Re: [PATCH 2/5] perf, x86: Enable PDIR precise instruction profiling on IvyBridge
Date: Mon, 2 Jul 2012 14:57:22 -0700 [thread overview]
Message-ID: <20120702215722.GC14479@tassilo.jf.intel.com> (raw)
In-Reply-To: <1341265014.23484.47.camel@twins>
On Mon, Jul 02, 2012 at 11:36:54PM +0200, Peter Zijlstra wrote:
> On Mon, 2012-07-02 at 14:00 -0700, Andi Kleen wrote:
> > Ok so you want a new flag? Or a new event?
>
> Once we grow the sysfs event stuff for cpu PMUs, we could add a new
> named event, but I don't think its all that important.
>
> instructions isn't all that interesting a measure to sample. And the
> people that do care can already use it by filling out the event
> manually.
The idea was to make it easier to use, similar to the recent
automatic IBS setup on AMD.
It's the nearest you can get on Intel systems.
I agree it would be nicer on cycles, but instructions are in many
cases a reasonable approximation.
BTW the problem with specifying it manually is that there
is no way to enforce the SandyBridge quiescence restrictions.
It would probably need forking the tables too and removing it on
SandyBridge, or something special to enforce exclusive mode,
all complicated and ugly.
An explicit way to specify it side steps that all nicely.
-Andi
--
ak@linux.intel.com -- Speaking for myself only
next prev parent reply other threads:[~2012-07-02 21:57 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-02 18:43 Updated and combined Sandy Bridge/Ivy Bridge perf patchkits Andi Kleen
2012-07-02 18:43 ` [PATCH 1/5] perf, x86: Improve basic Ivy Bridge support v3 Andi Kleen
2012-07-02 19:26 ` Peter Zijlstra
2012-07-02 19:58 ` Andi Kleen
2012-07-02 20:18 ` Peter Zijlstra
2012-07-02 18:43 ` [PATCH 2/5] perf, x86: Enable PDIR precise instruction profiling on IvyBridge Andi Kleen
2012-07-02 19:18 ` Peter Zijlstra
2012-07-02 19:57 ` Andi Kleen
2012-07-02 20:22 ` Peter Zijlstra
2012-07-02 21:00 ` Andi Kleen
2012-07-02 21:36 ` Peter Zijlstra
2012-07-02 21:57 ` Andi Kleen [this message]
2012-07-02 23:13 ` Stephane Eranian
2012-07-03 4:04 ` Andi Kleen
2012-07-05 15:45 ` Stephane Eranian
2012-07-05 17:26 ` Andi Kleen
2012-07-06 1:04 ` Stephane Eranian
2012-07-02 18:43 ` [PATCH 3/5] x86: Do microcode updates at CPU_STARTING, not CPU_ONLINE v2 Andi Kleen
2012-07-02 18:43 ` [PATCH 4/5] perf, x86: check ucode before disabling PEBS on SandyBridge v4 Andi Kleen
2012-07-02 18:43 ` [PATCH 5/5] perf, x86: Spell Romley correctly Andi Kleen
2012-07-02 20:40 Another IvyBridge/SandyBridge patchkit Andi Kleen
2012-07-02 20:40 ` [PATCH 2/5] perf, x86: Enable PDIR precise instruction profiling on IvyBridge Andi Kleen
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