From: Will Deacon <will.deacon@arm.com> To: Joerg Roedel <joro@8bytes.org> Cc: Olav Haugan <ohaugan@codeaurora.org>, "devicetree-discuss@lists.ozlabs.org" <devicetree-discuss@lists.ozlabs.org>, "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>, Andreas Herrmann <andreas.herrmann@calxeda.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH 8/9] iommu: add support for ARM Ltd. System MMU architecture Date: Fri, 21 Jun 2013 16:00:06 +0100 [thread overview] Message-ID: <20130621150006.GG7766@mudshark.cambridge.arm.com> (raw) In-Reply-To: <20130621141306.GJ11309@8bytes.org> On Fri, Jun 21, 2013 at 03:13:07PM +0100, Joerg Roedel wrote: > On Fri, Jun 21, 2013 at 11:23:18AM +0100, Will Deacon wrote: > > The results were that the memory-to-memory DMA didn't show any corruption. I > > also managed to tickle access faults by messing around with the permissions, > > then remap the buffers and resume the transfers. > > That sounds pretty conclusive. So when real hardware shows up it should > work reasonably well. Fingers crossed. Of course, as I get to run on real RTL I'll address any issues that might crop up. > > > > +static struct arm_smmu_device *find_parent_smmu(struct arm_smmu_device *smmu) > > > > +{ > > > > + struct arm_smmu_device *parent, *tmp; > > > > + > > > > + if (!smmu->parent_of_node) > > > > + return NULL; > > > > + > > > > + list_for_each_entry_safe(parent, tmp, &arm_smmu_devices, list) > > > > + if (parent->dev->of_node == smmu->parent_of_node) > > > > + return parent; > > > > > > Why do you need the _safe variant here? You are not changing the list in > > > this loop so you should be fine with list_for_each_entry(). > > > > For a system with multiple SMMUs (regardless of chaining), couldn't this > > code run in parallel with probing of another SMMU (which has to add to the > > arm_smmu_devices list)? The same applies for device removal, which could > > perhaps be driven from some power-managment code. > > Well, the '_safe' does not mean it is safe from concurrent list > manipulations. If you want to protect from that you still need a lock. > The '_safe' variant only allows to remove the current element from the > list while traversing it. Damn, I was hoping to avoid locking on the map path. In fact, this is a good argument to go with your suggestion below (otherwise I'd need to use reader/writer locks which seem to be frowned on). > > > > + do { > > > > + phys_addr_t output_mask = (1ULL << smmu->s2_output_size) - 1; > > > > + if ((phys_addr_t)iova & ~output_mask) > > > > + return -ERANGE; > > > > + } while ((smmu = find_parent_smmu(smmu))); > > > > > > This looks a bit too expensive to have in the map path. How about saving > > > something like an effective_output_mask (or output_size) which contains > > > the logical OR of every mask up the path? This would make this check a > > > lot cheaper. > > > > As mentioned in the DT binding thread, it's rare that this loop would > > execute more than once, and largely inconceivable that it would execute more > > than twice, so I don't know how much we need to worry about the cost. > > But still, this code is a challenge for the branch-predictor, plus > the additional function calls to find_parent_smmu(). I still think it is > worth to optimize this away. The map function is supposed to be a > fast-path function. Yes, the locking I'd need to introduce in find_parent_smmu seals the deal. I'll have a go at constructing the mask statically for each SMMU (although I think I want to use logical AND rather than OR). Cheers, Will
WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 8/9] iommu: add support for ARM Ltd. System MMU architecture Date: Fri, 21 Jun 2013 16:00:06 +0100 [thread overview] Message-ID: <20130621150006.GG7766@mudshark.cambridge.arm.com> (raw) In-Reply-To: <20130621141306.GJ11309@8bytes.org> On Fri, Jun 21, 2013 at 03:13:07PM +0100, Joerg Roedel wrote: > On Fri, Jun 21, 2013 at 11:23:18AM +0100, Will Deacon wrote: > > The results were that the memory-to-memory DMA didn't show any corruption. I > > also managed to tickle access faults by messing around with the permissions, > > then remap the buffers and resume the transfers. > > That sounds pretty conclusive. So when real hardware shows up it should > work reasonably well. Fingers crossed. Of course, as I get to run on real RTL I'll address any issues that might crop up. > > > > +static struct arm_smmu_device *find_parent_smmu(struct arm_smmu_device *smmu) > > > > +{ > > > > + struct arm_smmu_device *parent, *tmp; > > > > + > > > > + if (!smmu->parent_of_node) > > > > + return NULL; > > > > + > > > > + list_for_each_entry_safe(parent, tmp, &arm_smmu_devices, list) > > > > + if (parent->dev->of_node == smmu->parent_of_node) > > > > + return parent; > > > > > > Why do you need the _safe variant here? You are not changing the list in > > > this loop so you should be fine with list_for_each_entry(). > > > > For a system with multiple SMMUs (regardless of chaining), couldn't this > > code run in parallel with probing of another SMMU (which has to add to the > > arm_smmu_devices list)? The same applies for device removal, which could > > perhaps be driven from some power-managment code. > > Well, the '_safe' does not mean it is safe from concurrent list > manipulations. If you want to protect from that you still need a lock. > The '_safe' variant only allows to remove the current element from the > list while traversing it. Damn, I was hoping to avoid locking on the map path. In fact, this is a good argument to go with your suggestion below (otherwise I'd need to use reader/writer locks which seem to be frowned on). > > > > + do { > > > > + phys_addr_t output_mask = (1ULL << smmu->s2_output_size) - 1; > > > > + if ((phys_addr_t)iova & ~output_mask) > > > > + return -ERANGE; > > > > + } while ((smmu = find_parent_smmu(smmu))); > > > > > > This looks a bit too expensive to have in the map path. How about saving > > > something like an effective_output_mask (or output_size) which contains > > > the logical OR of every mask up the path? This would make this check a > > > lot cheaper. > > > > As mentioned in the DT binding thread, it's rare that this loop would > > execute more than once, and largely inconceivable that it would execute more > > than twice, so I don't know how much we need to worry about the cost. > > But still, this code is a challenge for the branch-predictor, plus > the additional function calls to find_parent_smmu(). I still think it is > worth to optimize this away. The map function is supposed to be a > fast-path function. Yes, the locking I'd need to introduce in find_parent_smmu seals the deal. I'll have a go at constructing the mask statically for each SMMU (although I think I want to use logical AND rather than OR). Cheers, Will
next prev parent reply other threads:[~2013-06-21 15:00 UTC|newest] Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top 2013-06-10 18:34 [PATCH 0/9] Add support for ARM SMMU architectures 1 and 2 Will Deacon 2013-06-10 18:34 ` Will Deacon [not found] ` <1370889285-22799-1-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2013-06-10 18:34 ` [PATCH 1/9] dma: pl330: rip out broken, redundant ID probing Will Deacon 2013-06-10 18:34 ` Will Deacon [not found] ` <1370889285-22799-2-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2013-06-11 4:37 ` Jassi Brar 2013-06-11 22:31 ` Grant Likely 2013-06-11 22:31 ` Grant Likely 2013-06-12 5:31 ` Vinod Koul 2013-06-12 5:31 ` Vinod Koul 2013-06-11 4:40 ` Jassi Brar 2013-06-11 4:40 ` Jassi Brar [not found] ` <CAJe_Zhc1UoTC4q4oaW=dzyi_10Q7EoezoT=G8_v+yCmBxV75+A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2013-06-11 8:45 ` Will Deacon 2013-06-11 8:45 ` Will Deacon 2013-06-10 18:34 ` [PATCH 2/9] dma: pl330: use dma_addr_t for describing bus addresses Will Deacon 2013-06-10 18:34 ` Will Deacon [not found] ` <1370889285-22799-3-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2013-06-11 4:37 ` Jassi Brar [not found] ` <CAJe_ZheKMVQgq42Vx5N1TXXdgFJ2sp50ixU30A7beXhmSVHnZQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2013-06-12 5:31 ` Vinod Koul 2013-06-12 5:31 ` Vinod Koul 2013-06-11 22:32 ` Grant Likely 2013-06-11 22:32 ` Grant Likely 2013-06-11 4:39 ` Jassi Brar 2013-06-11 4:39 ` Jassi Brar 2013-06-10 18:34 ` [PATCH 3/9] ARM: dma-mapping: convert DMA direction into IOMMU protection attributes Will Deacon 2013-06-10 18:34 ` Will Deacon 2013-06-19 8:37 ` Marek Szyprowski 2013-06-19 8:37 ` Marek Szyprowski [not found] ` <51C16DAF.1090205-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> 2013-06-19 8:52 ` Will Deacon 2013-06-19 8:52 ` Will Deacon [not found] ` <20130619085202.GC20351-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-06-19 8:57 ` Marek Szyprowski 2013-06-19 8:57 ` Marek Szyprowski [not found] ` <1370889285-22799-4-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2013-06-25 10:12 ` Hiroshi Doyu 2013-06-25 10:12 ` Hiroshi Doyu [not found] ` <20130625131215.d3cea2a5668a3d41dbbeb064-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-06-25 11:37 ` Will Deacon 2013-06-25 11:37 ` Will Deacon [not found] ` <20130625113714.GF31838-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-06-25 11:52 ` Hiroshi Doyu 2013-06-25 11:52 ` Hiroshi Doyu 2013-06-25 11:52 ` Hiroshi Doyu [not found] ` <20130625.145226.1632119404634300971.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-06-25 12:34 ` Will Deacon 2013-06-25 12:34 ` Will Deacon 2013-06-10 18:34 ` [PATCH 4/9] ARM: dma-mapping: NULLify dev->archdata.mapping pointer on detach Will Deacon 2013-06-10 18:34 ` Will Deacon [not found] ` <1370889285-22799-5-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2013-06-11 5:34 ` Hiroshi Doyu 2013-06-11 5:34 ` Hiroshi Doyu [not found] ` <20130611.083455.1500863288897785600.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-06-11 8:50 ` Will Deacon 2013-06-11 8:50 ` Will Deacon [not found] ` <20130611085015.GC24729-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-06-11 9:39 ` Hiroshi Doyu 2013-06-11 9:39 ` Hiroshi Doyu [not found] ` <20130611123933.4d278ff4e056f395788ad060-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2013-06-19 8:59 ` Marek Szyprowski 2013-06-19 8:59 ` Marek Szyprowski 2013-06-10 18:34 ` [PATCH 5/9] arm64: pgtable: use pte_index instead of __pte_index Will Deacon 2013-06-10 18:34 ` Will Deacon 2013-06-10 18:34 ` [PATCH 6/9] arm64: device: add iommu pointer to device archdata Will Deacon 2013-06-10 18:34 ` Will Deacon 2013-06-10 18:34 ` [PATCH 7/9] documentation: iommu: add description of ARM System MMU binding Will Deacon 2013-06-10 18:34 ` Will Deacon [not found] ` <1370889285-22799-8-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2013-06-12 8:44 ` Grant Likely 2013-06-12 8:44 ` Grant Likely 2013-06-20 20:08 ` Joerg Roedel 2013-06-20 20:08 ` Joerg Roedel [not found] ` <20130620200845.GF11309-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2013-06-21 9:57 ` Will Deacon 2013-06-21 9:57 ` Will Deacon [not found] ` <20130621095729.GA7766-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-06-21 13:55 ` Joerg Roedel 2013-06-21 13:55 ` Joerg Roedel [not found] ` <20130621135507.GI11309-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2013-06-21 16:41 ` Will Deacon 2013-06-21 16:41 ` Will Deacon 2013-06-25 19:18 ` Stuart Yoder 2013-06-25 19:18 ` Stuart Yoder [not found] ` <CALRxmdBxFWoRKv+bUu8VEwNNcAJUej9jM2V8N0rrqrr_Vpe8fQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2013-06-26 13:39 ` Will Deacon 2013-06-26 13:39 ` Will Deacon [not found] ` <20130626133941.GD7417-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-06-26 16:19 ` Stuart Yoder 2013-06-26 16:19 ` Stuart Yoder [not found] ` <CALRxmdCycFK2wW=C4aU79mudSaT+2vU8nzXxepdstubg+YSdQg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2013-06-26 17:42 ` Will Deacon 2013-06-26 17:42 ` Will Deacon [not found] ` <20130626174231.GH10333-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-06-27 18:22 ` Stuart Yoder 2013-06-27 18:22 ` Stuart Yoder [not found] ` <CALRxmdD5fyp06xW+z=rWagJc_bcJmpr1H9Zbdf=xbg9cCzvVfw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2013-06-28 9:06 ` Will Deacon 2013-06-28 9:06 ` Will Deacon [not found] ` <20130628090635.GB29002-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-06-28 16:03 ` Stuart Yoder 2013-06-28 16:03 ` Stuart Yoder 2013-06-10 18:34 ` [PATCH 8/9] iommu: add support for ARM Ltd. System MMU architecture Will Deacon 2013-06-10 18:34 ` Will Deacon [not found] ` <1370889285-22799-9-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2013-06-20 21:26 ` Joerg Roedel 2013-06-20 21:26 ` Joerg Roedel [not found] ` <20130620212646.GG11309-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2013-06-21 10:23 ` Will Deacon 2013-06-21 10:23 ` Will Deacon [not found] ` <20130621102318.GB7766-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-06-21 14:13 ` Joerg Roedel 2013-06-21 14:13 ` Joerg Roedel 2013-06-21 15:00 ` Will Deacon [this message] 2013-06-21 15:00 ` Will Deacon [not found] ` <20130621150006.GG7766-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org> 2013-06-21 15:30 ` Joerg Roedel 2013-06-21 15:30 ` Joerg Roedel [not found] ` <20130621153044.GL11309-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> 2013-06-21 16:40 ` Will Deacon 2013-06-21 16:40 ` Will Deacon 2013-06-10 18:34 ` [PATCH 9/9] MAINTAINERS: add entry for ARM system MMU driver Will Deacon 2013-06-10 18:34 ` Will Deacon [not found] ` <1370889285-22799-10-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org> 2013-06-12 8:45 ` Grant Likely 2013-06-12 8:45 ` Grant Likely
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