* RFC: drm/1915: Resource streamer initial support
@ 2013-07-08 13:38 Abdiel Janulgue
2013-07-08 13:38 ` [PATCH 1/2] drm/i915/hsw: Expose resource streamer control flags Abdiel Janulgue
2013-07-08 13:38 ` [PATCH 2/2] drm/i915/hsw: Enable resource streamer bit on MI_BATCH_BUFFER_START Abdiel Janulgue
0 siblings, 2 replies; 5+ messages in thread
From: Abdiel Janulgue @ 2013-07-08 13:38 UTC (permalink / raw)
To: intel-gfx
Daniel Vetter suggested at some point we need to implement getparam ioctl
so userspace can figure out whether kernel supports RS at runtime.
For now, this will do to support the corresponding RFC mesa patches.
Based on the work of: Lukasz Anaczkowski <lukasz.anaczkowski@intel.com>
Abdiel Janulgue (2):
drm/i915/hsw: Expose resource streamer control flags
drm/i915/hsw: Enable resource streamer bit on MI_BATCH_BUFFER_START
[abj@hasbox drm-intel]$ git diff bc32705a7686370b2e50d467b001d88c2c059e39 --stat
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 ++
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++--
include/uapi/drm/i915_drm.h | 1 +
4 files changed, 8 insertions(+), 2 deletions(-)
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 1/2] drm/i915/hsw: Expose resource streamer control flags
2013-07-08 13:38 RFC: drm/1915: Resource streamer initial support Abdiel Janulgue
@ 2013-07-08 13:38 ` Abdiel Janulgue
2013-07-08 20:11 ` Daniel Vetter
2013-07-09 9:04 ` Chris Wilson
2013-07-08 13:38 ` [PATCH 2/2] drm/i915/hsw: Enable resource streamer bit on MI_BATCH_BUFFER_START Abdiel Janulgue
1 sibling, 2 replies; 5+ messages in thread
From: Abdiel Janulgue @ 2013-07-08 13:38 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 ++
include/uapi/drm/i915_drm.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 5aeb447..3d6d3c9 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -865,6 +865,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
}
if (args->flags & I915_EXEC_IS_PINNED)
flags |= I915_DISPATCH_PINNED;
+ if (args->flags & I915_EXEC_RS)
+ flags |= I915_EXEC_RS;
switch (args->flags & I915_EXEC_RING_MASK) {
case I915_EXEC_DEFAULT:
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 923ed7f..728f544 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -661,6 +661,7 @@ struct drm_i915_gem_execbuffer2 {
#define I915_EXEC_BSD (2<<0)
#define I915_EXEC_BLT (3<<0)
#define I915_EXEC_VEBOX (4<<0)
+#define I915_EXEC_RS (8<<0)
/* Used for switching the constants addressing mode on gen4+ RENDER ring.
* Gen6+ only supports relative addressing to dynamic state (default) and
--
1.7.9.5
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 1/2] drm/i915/hsw: Expose resource streamer control flags
2013-07-08 13:38 ` [PATCH 1/2] drm/i915/hsw: Expose resource streamer control flags Abdiel Janulgue
@ 2013-07-08 20:11 ` Daniel Vetter
2013-07-09 9:04 ` Chris Wilson
1 sibling, 0 replies; 5+ messages in thread
From: Daniel Vetter @ 2013-07-08 20:11 UTC (permalink / raw)
To: Abdiel Janulgue; +Cc: intel-gfx
On Mon, Jul 08, 2013 at 04:38:48PM +0300, Abdiel Janulgue wrote:
> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 ++
> include/uapi/drm/i915_drm.h | 1 +
> 2 files changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 5aeb447..3d6d3c9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -865,6 +865,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> }
> if (args->flags & I915_EXEC_IS_PINNED)
> flags |= I915_DISPATCH_PINNED;
> + if (args->flags & I915_EXEC_RS)
> + flags |= I915_EXEC_RS;
I think we should check for the render ring and haswell here and reject
the flag everywhere else by returning -EINVAL to userspace.
-Daniel
>
> switch (args->flags & I915_EXEC_RING_MASK) {
> case I915_EXEC_DEFAULT:
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 923ed7f..728f544 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -661,6 +661,7 @@ struct drm_i915_gem_execbuffer2 {
> #define I915_EXEC_BSD (2<<0)
> #define I915_EXEC_BLT (3<<0)
> #define I915_EXEC_VEBOX (4<<0)
> +#define I915_EXEC_RS (8<<0)
>
> /* Used for switching the constants addressing mode on gen4+ RENDER ring.
> * Gen6+ only supports relative addressing to dynamic state (default) and
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 1/2] drm/i915/hsw: Expose resource streamer control flags
2013-07-08 13:38 ` [PATCH 1/2] drm/i915/hsw: Expose resource streamer control flags Abdiel Janulgue
2013-07-08 20:11 ` Daniel Vetter
@ 2013-07-09 9:04 ` Chris Wilson
1 sibling, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2013-07-09 9:04 UTC (permalink / raw)
To: Abdiel Janulgue; +Cc: intel-gfx
On Mon, Jul 08, 2013 at 04:38:48PM +0300, Abdiel Janulgue wrote:
> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 ++
> include/uapi/drm/i915_drm.h | 1 +
> 2 files changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 5aeb447..3d6d3c9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -865,6 +865,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> }
> if (args->flags & I915_EXEC_IS_PINNED)
> flags |= I915_DISPATCH_PINNED;
> + if (args->flags & I915_EXEC_RS)
> + flags |= I915_EXEC_RS;
Keep EXEC and DISPATCH as distinct namespaces.
> switch (args->flags & I915_EXEC_RING_MASK) {
> case I915_EXEC_DEFAULT:
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 923ed7f..728f544 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -661,6 +661,7 @@ struct drm_i915_gem_execbuffer2 {
> #define I915_EXEC_BSD (2<<0)
> #define I915_EXEC_BLT (3<<0)
> #define I915_EXEC_VEBOX (4<<0)
> +#define I915_EXEC_RS (8<<0)
This is in the portion of bits set aside for new rings. Please add it to
the end of the of the flags. And call it _RESOURCE_STREAMER to be less
ambiguous.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] drm/i915/hsw: Enable resource streamer bit on MI_BATCH_BUFFER_START
2013-07-08 13:38 RFC: drm/1915: Resource streamer initial support Abdiel Janulgue
2013-07-08 13:38 ` [PATCH 1/2] drm/i915/hsw: Expose resource streamer control flags Abdiel Janulgue
@ 2013-07-08 13:38 ` Abdiel Janulgue
1 sibling, 0 replies; 5+ messages in thread
From: Abdiel Janulgue @ 2013-07-08 13:38 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e9c50fa..3db1184 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -254,6 +254,7 @@
#define MI_BATCH_NON_SECURE_HSW (1<<13)
#define MI_BATCH_BUFFER_START MI_INSTR(0x31, 0)
#define MI_BATCH_GTT (2<<6) /* aliased with (1<<7) on gen4 */
+#define MI_BATCH_RESOURCE_STREAMER (1<<10)
#define MI_SEMAPHORE_MBOX MI_INSTR(0x16, 1) /* gen6+ */
#define MI_SEMAPHORE_GLOBAL_GTT (1<<22)
#define MI_SEMAPHORE_UPDATE (1<<21)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index bc4c11b..9940fb3 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1678,14 +1678,16 @@ hsw_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
unsigned flags)
{
int ret;
+ int ring_emit_flags = MI_BATCH_BUFFER_START | MI_BATCH_PPGTT_HSW |
+ (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_HSW);
ret = intel_ring_begin(ring, 2);
if (ret)
return ret;
intel_ring_emit(ring,
- MI_BATCH_BUFFER_START | MI_BATCH_PPGTT_HSW |
- (flags & I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_HSW));
+ ring_emit_flags |
+ (flags & I915_EXEC_RS ? MI_BATCH_RESOURCE_STREAMER : 0));
/* bit0-7 is the length on GEN6+ */
intel_ring_emit(ring, offset);
intel_ring_advance(ring);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2013-07-09 9:04 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-07-08 13:38 RFC: drm/1915: Resource streamer initial support Abdiel Janulgue
2013-07-08 13:38 ` [PATCH 1/2] drm/i915/hsw: Expose resource streamer control flags Abdiel Janulgue
2013-07-08 20:11 ` Daniel Vetter
2013-07-09 9:04 ` Chris Wilson
2013-07-08 13:38 ` [PATCH 2/2] drm/i915/hsw: Enable resource streamer bit on MI_BATCH_BUFFER_START Abdiel Janulgue
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