From: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org> To: Sourav Poddar <sourav.poddar-l0cyMroinI0@public.gmane.org> Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, bcousson-rdvid1DuHRBWk0Htik3J/w@public.gmane.org, balbi-l0cyMroinI0@public.gmane.org Subject: Re: [PATCHv2 04/10] spi/qspi: configure set up register for memory map. Date: Tue, 10 Dec 2013 13:57:54 +0100 [thread overview] Message-ID: <201312101357.54874.marex@denx.de> (raw) In-Reply-To: <1386339891-32717-5-git-send-email-sourav.poddar-l0cyMroinI0@public.gmane.org> On Friday, December 06, 2013 at 03:24:45 PM, Sourav Poddar wrote: > These add api to configure set up registers which will be used > for memory mapped operations. > > These was provided as a pointer in the earlier patch and can be > used by the slave devices to configure the master controller as an > when required according to the usecases. > > Signed-off-by: Sourav Poddar <sourav.poddar-l0cyMroinI0@public.gmane.org> > --- > drivers/spi/spi-ti-qspi.c | 29 +++++++++++++++++++++++++++++ > 1 files changed, 29 insertions(+), 0 deletions(-) > > diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c > index 48294d1..e4a8afc 100644 > --- a/drivers/spi/spi-ti-qspi.c > +++ b/drivers/spi/spi-ti-qspi.c > @@ -117,6 +117,10 @@ struct ti_qspi { > #define MEM_CS (1 << 8) > #define MEM_CS_DIS (0 << 8) > > +#define QSPI_SETUP0_RD_NORMAL (0x0 << 12) > +#define QSPI_SETUP0_RD_DUAL (0x1 << 12) > +#define QSPI_SETUP0_RD_QUAD (0x3 << 12) > + > #define QSPI_FRAME 4096 > > #define QSPI_AUTOSUSPEND_TIMEOUT 2000 > @@ -220,6 +224,30 @@ static int ti_qspi_setup(struct spi_device *spi) > return 0; > } > > +static void ti_qspi_configure_from_slave(struct spi_device *spi) > +{ > + struct ti_qspi *qspi = spi_master_get_devdata(spi->master); > + struct slave_info info = spi->info; > + u32 memval, mode; > + > + mode = spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD); > + memval = (info.read_opcode << 0) | (info.program_opcode << 16) | > + ((info.addr_width - 1) << 8) | (info.dummy_cycles << 10); > + > + switch (mode) { > + case SPI_RX_DUAL: > + memval |= QSPI_SETUP0_RD_DUAL; > + break; > + case SPI_RX_QUAD: > + memval |= QSPI_SETUP0_RD_QUAD; > + break; > + default: You want to catch invalid/unsupported mode here instead, so please add 'case 0:' for 1-bit transfer and treat default: as an error . > + memval |= QSPI_SETUP0_RD_NORMAL; > + break; > + } > + ti_qspi_write(qspi, memval, QSPI_SPI_SETUP0_REG); > +} > + > static void ti_qspi_restore_ctx(struct ti_qspi *qspi) > { > struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg; > @@ -488,6 +516,7 @@ static int ti_qspi_probe(struct platform_device *pdev) > master->dev.of_node = pdev->dev.of_node; > master->bits_per_word_mask = BIT(32 - 1) | BIT(16 - 1) | BIT(8 - 1); > master->mmap = true; > + master->configure_from_slave = ti_qspi_configure_from_slave; > > if (!of_property_read_u32(np, "num-cs", &num_cs)) > master->num_chipselect = num_cs; Best regards, Marek Vasut -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Marek Vasut <marex@denx.de> To: Sourav Poddar <sourav.poddar@ti.com> Cc: devicetree@vger.kernel.org, linux-omap@vger.kernel.org, balbi@ti.com, linux-spi@vger.kernel.org, broonie@kernel.org, linux-mtd@lists.infradead.org, bcousson@baylibre.com, computersforpeace@gmail.com, dwmw2@infradead.org Subject: Re: [PATCHv2 04/10] spi/qspi: configure set up register for memory map. Date: Tue, 10 Dec 2013 13:57:54 +0100 [thread overview] Message-ID: <201312101357.54874.marex@denx.de> (raw) In-Reply-To: <1386339891-32717-5-git-send-email-sourav.poddar@ti.com> On Friday, December 06, 2013 at 03:24:45 PM, Sourav Poddar wrote: > These add api to configure set up registers which will be used > for memory mapped operations. > > These was provided as a pointer in the earlier patch and can be > used by the slave devices to configure the master controller as an > when required according to the usecases. > > Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> > --- > drivers/spi/spi-ti-qspi.c | 29 +++++++++++++++++++++++++++++ > 1 files changed, 29 insertions(+), 0 deletions(-) > > diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c > index 48294d1..e4a8afc 100644 > --- a/drivers/spi/spi-ti-qspi.c > +++ b/drivers/spi/spi-ti-qspi.c > @@ -117,6 +117,10 @@ struct ti_qspi { > #define MEM_CS (1 << 8) > #define MEM_CS_DIS (0 << 8) > > +#define QSPI_SETUP0_RD_NORMAL (0x0 << 12) > +#define QSPI_SETUP0_RD_DUAL (0x1 << 12) > +#define QSPI_SETUP0_RD_QUAD (0x3 << 12) > + > #define QSPI_FRAME 4096 > > #define QSPI_AUTOSUSPEND_TIMEOUT 2000 > @@ -220,6 +224,30 @@ static int ti_qspi_setup(struct spi_device *spi) > return 0; > } > > +static void ti_qspi_configure_from_slave(struct spi_device *spi) > +{ > + struct ti_qspi *qspi = spi_master_get_devdata(spi->master); > + struct slave_info info = spi->info; > + u32 memval, mode; > + > + mode = spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD); > + memval = (info.read_opcode << 0) | (info.program_opcode << 16) | > + ((info.addr_width - 1) << 8) | (info.dummy_cycles << 10); > + > + switch (mode) { > + case SPI_RX_DUAL: > + memval |= QSPI_SETUP0_RD_DUAL; > + break; > + case SPI_RX_QUAD: > + memval |= QSPI_SETUP0_RD_QUAD; > + break; > + default: You want to catch invalid/unsupported mode here instead, so please add 'case 0:' for 1-bit transfer and treat default: as an error . > + memval |= QSPI_SETUP0_RD_NORMAL; > + break; > + } > + ti_qspi_write(qspi, memval, QSPI_SPI_SETUP0_REG); > +} > + > static void ti_qspi_restore_ctx(struct ti_qspi *qspi) > { > struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg; > @@ -488,6 +516,7 @@ static int ti_qspi_probe(struct platform_device *pdev) > master->dev.of_node = pdev->dev.of_node; > master->bits_per_word_mask = BIT(32 - 1) | BIT(16 - 1) | BIT(8 - 1); > master->mmap = true; > + master->configure_from_slave = ti_qspi_configure_from_slave; > > if (!of_property_read_u32(np, "num-cs", &num_cs)) > master->num_chipselect = num_cs; Best regards, Marek Vasut
next prev parent reply other threads:[~2013-12-10 12:57 UTC|newest] Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top 2013-12-06 14:24 [PATCHv2 00/10] Add memory mapped support for ti qspi, m25p80 serial flash Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` [PATCHv2 01/10] spi/spi.h: Add get_buf/put_buf support in spi master Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar [not found] ` <1386339891-32717-2-git-send-email-sourav.poddar-l0cyMroinI0@public.gmane.org> 2013-12-19 13:31 ` Mark Brown 2013-12-19 13:31 ` Mark Brown 2013-12-06 14:24 ` [PATCHv2 02/10] spi/qspi: parse register by name Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-19 13:34 ` Mark Brown 2013-12-19 13:34 ` Mark Brown 2013-12-06 14:24 ` [PATCHv2 03/10] spi/qspi: Add support to switc to memory mapped operation Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar [not found] ` <1386339891-32717-4-git-send-email-sourav.poddar-l0cyMroinI0@public.gmane.org> 2013-12-10 12:54 ` Marek Vasut 2013-12-10 12:54 ` Marek Vasut 2013-12-06 14:24 ` [PATCHv2 04/10] spi/qspi: configure set up register for memory map Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar [not found] ` <1386339891-32717-5-git-send-email-sourav.poddar-l0cyMroinI0@public.gmane.org> 2013-12-10 12:57 ` Marek Vasut [this message] 2013-12-10 12:57 ` Marek Vasut [not found] ` <201312101357.54874.marex-ynQEQJNshbs@public.gmane.org> 2013-12-10 17:13 ` Sourav Poddar 2013-12-10 17:13 ` Sourav Poddar 2013-12-10 17:13 ` Sourav Poddar 2013-12-06 14:24 ` [PATCHv2 06/10] drivers: mtd: m25p80: Add api to configure master register Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar [not found] ` <1386339891-32717-1-git-send-email-sourav.poddar-l0cyMroinI0@public.gmane.org> 2013-12-06 14:24 ` [PATCHv2 05/10] spi/qspi: Add api for get_buf/put_buf Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar [not found] ` <1386339891-32717-6-git-send-email-sourav.poddar-l0cyMroinI0@public.gmane.org> 2013-12-10 12:58 ` Marek Vasut 2013-12-10 12:58 ` Marek Vasut 2013-12-10 17:10 ` Sourav Poddar 2013-12-10 17:10 ` Sourav Poddar 2013-12-10 17:10 ` Sourav Poddar 2013-12-06 14:24 ` [PATCHv2 07/10] drivers: mtd: m25p80: Adapt driver to support memory mapped read Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar [not found] ` <1386339891-32717-8-git-send-email-sourav.poddar-l0cyMroinI0@public.gmane.org> 2013-12-12 7:55 ` Huang Shijie 2013-12-12 7:55 ` Huang Shijie 2013-12-12 8:15 ` Sourav Poddar 2013-12-12 8:15 ` Sourav Poddar 2013-12-12 8:15 ` Sourav Poddar 2013-12-12 8:31 ` Huang Shijie 2013-12-12 8:31 ` Huang Shijie 2013-12-06 14:24 ` [PATCHv2 08/10] Documentation: bindings: ti-qspi: update binding information Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-19 13:34 ` Mark Brown 2013-12-19 13:34 ` Mark Brown 2013-12-06 14:24 ` [PATCHv2 09/10] arm: dts: dra7: Add qspi device Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar [not found] ` <1386339891-32717-10-git-send-email-sourav.poddar-l0cyMroinI0@public.gmane.org> 2013-12-09 17:42 ` Tony Lindgren 2013-12-09 17:42 ` Tony Lindgren [not found] ` <20131209174203.GB12527-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> 2013-12-10 4:25 ` Sourav Poddar 2013-12-10 4:25 ` Sourav Poddar 2013-12-10 4:25 ` Sourav Poddar 2013-12-10 10:31 ` Mark Brown 2013-12-10 10:31 ` Mark Brown 2013-12-10 10:45 ` Sourav Poddar 2013-12-10 10:45 ` Sourav Poddar 2013-12-10 10:45 ` Sourav Poddar 2013-12-12 4:20 ` Sourav Poddar 2013-12-12 4:20 ` Sourav Poddar 2013-12-06 14:24 ` [PATCHv2 10/10] arm: dts: am43x-epos: " Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-06 14:24 ` Sourav Poddar 2013-12-10 12:49 ` [PATCHv2 00/10] Add memory mapped support for ti qspi, m25p80 serial flash Marek Vasut 2013-12-10 12:49 ` Marek Vasut [not found] ` <201312101349.13564.marex-ynQEQJNshbs@public.gmane.org> 2013-12-10 16:11 ` Mark Brown 2013-12-10 16:11 ` Mark Brown [not found] ` <20131210161143.GK29268-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2013-12-10 18:22 ` Marek Vasut 2013-12-10 18:22 ` Marek Vasut 2013-12-10 18:29 ` Mark Brown 2013-12-10 18:29 ` Mark Brown 2013-12-10 18:34 ` Marek Vasut 2013-12-10 18:34 ` Marek Vasut [not found] ` <20131210182904.GG11468-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2013-12-11 4:37 ` Sourav Poddar 2013-12-11 4:37 ` Sourav Poddar 2013-12-11 4:37 ` Sourav Poddar [not found] ` <201312101922.10618.marex-ynQEQJNshbs@public.gmane.org> 2013-12-11 4:19 ` Sourav Poddar 2013-12-11 4:19 ` Sourav Poddar 2013-12-11 4:19 ` Sourav Poddar 2013-12-11 4:18 ` Sourav Poddar 2013-12-11 4:18 ` Sourav Poddar 2013-12-11 4:18 ` Sourav Poddar [not found] ` <52A7E7A5.5000909-l0cyMroinI0@public.gmane.org> 2013-12-11 10:44 ` Marek Vasut 2013-12-11 10:44 ` Marek Vasut 2013-12-11 12:01 ` Mark Brown 2013-12-11 12:01 ` Mark Brown
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