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From: Mark Rutland <mark.rutland@arm.com>
To: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Cc: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Sudeep Holla <Sudeep.Holla@arm.com>,
	Catalin Marinas <Catalin.Marinas@arm.com>,
	Charles Garcia-Tobin <Charles.Garcia-Tobin@arm.com>,
	Nicolas Pitre <nico@linaro.org>, Rob Herring <robh+dt@kernel.org>,
	"grant.likely@linaro.org" <grant.likely@linaro.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Santosh Shilimkar <santosh.shilimkar@ti.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Amit Kucheria <amit.kucheria@linaro.org>,
	Vincent Guittot <vincent.guittot@linaro.org>,
	Antti Miettinen <ananaza@iki.fi>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Kevin Hilman <khilman@linaro.org>,
	Sebastian Capella <sebcape@gmail.com>,
	Tomasz Figa <t.figa@samsung.com>, Mark Brown <broonie@kernel>
Subject: Re: [PATCH v5 4/8] arm64: add PSCI CPU_SUSPEND based cpu_suspend support
Date: Wed, 25 Jun 2014 17:09:11 +0100	[thread overview]
Message-ID: <20140625160911.GG15240@leverpostej> (raw)
In-Reply-To: <1403705421-17597-5-git-send-email-lorenzo.pieralisi@arm.com>

On Wed, Jun 25, 2014 at 03:10:17PM +0100, Lorenzo Pieralisi wrote:
> This patch implements the cpu_suspend cpu operations method through
> the PSCI CPU_SUSPEND API. The PSCI implementation translates the idle state
> index passed by the cpu_suspend core call into a valid PSCI state according to
> the PSCI states initialized at boot by the PSCI suspend backend.
> 
> Entry point is set to cpu_resume physical address, that represents the
> default kernel execution address following a CPU reset.
> 
> Idle state indices missing a DT node description are initialized to power
> state standby WFI so that if called by the idle driver they provide the
> default behaviour.
> 
> Reviewed-by: Sebastian Capella <sebcape@gmail.com>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> ---
>  arch/arm64/include/asm/psci.h |   4 ++
>  arch/arm64/kernel/psci.c      | 103 ++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 107 insertions(+)

[...]

> +static void psci_power_state_unpack(u32 power_state,
> +				    struct psci_power_state *state)
> +{
> +	state->id = (power_state & PSCI_0_2_POWER_STATE_ID_MASK) >>
> +			PSCI_0_2_POWER_STATE_ID_SHIFT;
> +	state->type = (power_state & PSCI_0_2_POWER_STATE_TYPE_MASK) >>
> +			PSCI_0_2_POWER_STATE_TYPE_SHIFT;
> +	state->affinity_level =
> +			(power_state & PSCI_0_2_POWER_STATE_AFFL_MASK) >>
> +			PSCI_0_2_POWER_STATE_AFFL_SHIFT;
> +}

Is this valid for PSCI versions prior to 0.2?

>  /*
>   * The following two functions are invoked via the invoke_psci_fn pointer
>   * and will not be inlined, allowing us to piggyback on the AAPCS.
> @@ -199,6 +216,77 @@ static int psci_migrate_info_type(void)
>  	return err;
>  }
>  
> +int __init psci_dt_register_idle_states(struct cpuidle_driver *drv,
> +					struct device_node *state_nodes[])
> +{
> +	int cpu, i;

Perhaps unsigned int? You print i with %u below.

> +	for (i = 0; i < drv->state_count; i++) {
> +		u32 psci_power_state;
> +
> +		if (!state_nodes[i]) {
> +			/*
> +			 * An index with a missing node pointer falls back to
> +			 * simple STANDBYWFI
> +			 */
> +			psci_states[i].type = PSCI_POWER_STATE_TYPE_STANDBY;
> +			continue;
> +		}

Does this make sense? Are there any limitations on which state nodes
could be missing?

> +
> +		if (of_property_read_u32(state_nodes[i], "entry-method-param",
> +					 &psci_power_state)) {
> +			pr_warn(" * %s missing entry-method-param property\n",
> +				state_nodes[i]->full_name);
> +			/*
> +			 * If entry-method-param property is missing, fall
> +			 * back to STANDBYWFI state
> +			 */
> +			psci_states[i].type = PSCI_POWER_STATE_TYPE_STANDBY;
> +			continue;

Surely we want to throw away these states instead?

Otherwise we can get into a mess like:

psci_states[0] => low power state
psci_states[1] => lower power state
psci_states[2] => WFI / not low power
psci_states[3] => lowest power state

Where power usage and latency would jump around rather than follow
monotonic patterns.

Thanks,
Mark.

WARNING: multiple messages have this Message-ID (diff)
From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 4/8] arm64: add PSCI CPU_SUSPEND based cpu_suspend support
Date: Wed, 25 Jun 2014 17:09:11 +0100	[thread overview]
Message-ID: <20140625160911.GG15240@leverpostej> (raw)
In-Reply-To: <1403705421-17597-5-git-send-email-lorenzo.pieralisi@arm.com>

On Wed, Jun 25, 2014 at 03:10:17PM +0100, Lorenzo Pieralisi wrote:
> This patch implements the cpu_suspend cpu operations method through
> the PSCI CPU_SUSPEND API. The PSCI implementation translates the idle state
> index passed by the cpu_suspend core call into a valid PSCI state according to
> the PSCI states initialized at boot by the PSCI suspend backend.
> 
> Entry point is set to cpu_resume physical address, that represents the
> default kernel execution address following a CPU reset.
> 
> Idle state indices missing a DT node description are initialized to power
> state standby WFI so that if called by the idle driver they provide the
> default behaviour.
> 
> Reviewed-by: Sebastian Capella <sebcape@gmail.com>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> ---
>  arch/arm64/include/asm/psci.h |   4 ++
>  arch/arm64/kernel/psci.c      | 103 ++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 107 insertions(+)

[...]

> +static void psci_power_state_unpack(u32 power_state,
> +				    struct psci_power_state *state)
> +{
> +	state->id = (power_state & PSCI_0_2_POWER_STATE_ID_MASK) >>
> +			PSCI_0_2_POWER_STATE_ID_SHIFT;
> +	state->type = (power_state & PSCI_0_2_POWER_STATE_TYPE_MASK) >>
> +			PSCI_0_2_POWER_STATE_TYPE_SHIFT;
> +	state->affinity_level =
> +			(power_state & PSCI_0_2_POWER_STATE_AFFL_MASK) >>
> +			PSCI_0_2_POWER_STATE_AFFL_SHIFT;
> +}

Is this valid for PSCI versions prior to 0.2?

>  /*
>   * The following two functions are invoked via the invoke_psci_fn pointer
>   * and will not be inlined, allowing us to piggyback on the AAPCS.
> @@ -199,6 +216,77 @@ static int psci_migrate_info_type(void)
>  	return err;
>  }
>  
> +int __init psci_dt_register_idle_states(struct cpuidle_driver *drv,
> +					struct device_node *state_nodes[])
> +{
> +	int cpu, i;

Perhaps unsigned int? You print i with %u below.

> +	for (i = 0; i < drv->state_count; i++) {
> +		u32 psci_power_state;
> +
> +		if (!state_nodes[i]) {
> +			/*
> +			 * An index with a missing node pointer falls back to
> +			 * simple STANDBYWFI
> +			 */
> +			psci_states[i].type = PSCI_POWER_STATE_TYPE_STANDBY;
> +			continue;
> +		}

Does this make sense? Are there any limitations on which state nodes
could be missing?

> +
> +		if (of_property_read_u32(state_nodes[i], "entry-method-param",
> +					 &psci_power_state)) {
> +			pr_warn(" * %s missing entry-method-param property\n",
> +				state_nodes[i]->full_name);
> +			/*
> +			 * If entry-method-param property is missing, fall
> +			 * back to STANDBYWFI state
> +			 */
> +			psci_states[i].type = PSCI_POWER_STATE_TYPE_STANDBY;
> +			continue;

Surely we want to throw away these states instead?

Otherwise we can get into a mess like:

psci_states[0] => low power state
psci_states[1] => lower power state
psci_states[2] => WFI / not low power
psci_states[3] => lowest power state

Where power usage and latency would jump around rather than follow
monotonic patterns.

Thanks,
Mark.

  reply	other threads:[~2014-06-25 16:09 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-25 14:10 [PATCH v5 0/8] ARM generic idle states Lorenzo Pieralisi
2014-06-25 14:10 ` Lorenzo Pieralisi
2014-06-25 14:10 ` [PATCH v5 1/8] Documentation: arm: define DT idle states bindings Lorenzo Pieralisi
2014-06-25 14:10   ` Lorenzo Pieralisi
2014-06-25 14:58   ` Mark Rutland
2014-06-25 14:58     ` Mark Rutland
2014-06-25 17:37     ` Lorenzo Pieralisi
2014-06-25 17:37       ` Lorenzo Pieralisi
2014-06-26 18:32       ` Rob Herring
2014-06-26 18:32         ` Rob Herring
2014-06-27 10:53     ` Lorenzo Pieralisi
2014-06-27 10:53       ` Lorenzo Pieralisi
2014-06-25 15:56   ` Nicolas Pitre
2014-06-25 15:56     ` Nicolas Pitre
2014-06-26 10:17     ` Lorenzo Pieralisi
2014-06-26 10:17       ` Lorenzo Pieralisi
2014-06-26 19:30       ` Nicolas Pitre
2014-06-26 19:30         ` Nicolas Pitre
2014-06-25 14:10 ` [PATCH v5 2/8] Documentation: devicetree: psci: define CPU suspend parameter Lorenzo Pieralisi
2014-06-25 14:10   ` Lorenzo Pieralisi
2014-06-25 14:10 ` [PATCH v5 3/8] drivers: cpuidle: implement DT based idle states infrastructure Lorenzo Pieralisi
2014-06-25 14:10   ` Lorenzo Pieralisi
2014-06-25 15:59   ` Mark Rutland
2014-06-25 15:59     ` Mark Rutland
2014-06-26 16:01     ` Lorenzo Pieralisi
2014-06-26 16:01       ` Lorenzo Pieralisi
     [not found] ` <1403705421-17597-1-git-send-email-lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
2014-06-25 14:10   ` [PATCH v5 4/8] arm64: add PSCI CPU_SUSPEND based cpu_suspend support Lorenzo Pieralisi
2014-06-25 14:10     ` Lorenzo Pieralisi
2014-06-25 16:09     ` Mark Rutland [this message]
2014-06-25 16:09       ` Mark Rutland
2014-06-26 11:23       ` Lorenzo Pieralisi
2014-06-26 11:23         ` Lorenzo Pieralisi
2014-06-25 20:52     ` Geoff Levand
2014-06-25 20:52       ` Geoff Levand
2014-06-26 16:55       ` Lorenzo Pieralisi
2014-06-26 16:55         ` Lorenzo Pieralisi
2014-06-25 14:10 ` [PATCH v5 5/8] drivers: cpuidle: CPU idle ARM64 driver Lorenzo Pieralisi
2014-06-25 14:10   ` Lorenzo Pieralisi
2014-06-25 20:34   ` Geoff Levand
2014-06-25 20:34     ` Geoff Levand
2014-06-25 14:10 ` [PATCH v5 6/8] drivers: cpuidle: initialize big.LITTLE driver through DT Lorenzo Pieralisi
2014-06-25 14:10   ` Lorenzo Pieralisi
2014-06-25 15:06   ` Mark Rutland
2014-06-25 15:06     ` Mark Rutland
2014-06-25 16:44     ` Lorenzo Pieralisi
2014-06-25 16:44       ` Lorenzo Pieralisi
2014-06-25 14:10 ` [PATCH v5 7/8] drivers: cpuidle: initialize Exynos " Lorenzo Pieralisi
2014-06-25 14:10   ` Lorenzo Pieralisi
2014-06-25 15:13   ` Mark Rutland
2014-06-25 15:13     ` Mark Rutland
2014-06-25 16:58     ` Lorenzo Pieralisi
2014-06-25 16:58       ` Lorenzo Pieralisi
2014-06-25 15:23   ` Bartlomiej Zolnierkiewicz
2014-06-25 15:23     ` Bartlomiej Zolnierkiewicz
2014-06-26 15:16     ` Lorenzo Pieralisi
2014-06-26 15:16       ` Lorenzo Pieralisi
2014-07-17 14:20     ` Lorenzo Pieralisi
2014-07-17 14:20       ` Lorenzo Pieralisi
2014-07-18  8:45       ` Chander Kashyap
2014-07-18  8:45         ` Chander Kashyap
2014-07-18 16:10         ` Bartlomiej Zolnierkiewicz
2014-07-18 16:10           ` Bartlomiej Zolnierkiewicz
2014-06-25 14:10 ` [PATCH v5 8/8] arm64: boot: dts: update rtsm aemv8 dts with PSCI and idle states Lorenzo Pieralisi
2014-06-25 14:10   ` Lorenzo Pieralisi
2014-06-25 14:27   ` Mark Rutland
2014-06-25 14:27     ` Mark Rutland
2014-06-25 17:47     ` Lorenzo Pieralisi
2014-06-25 17:47       ` Lorenzo Pieralisi
2014-06-25 14:29   ` Sudeep Holla
2014-06-25 14:29     ` Sudeep Holla

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