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From: Daniel Vetter <daniel@ffwll.ch>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Ben Widawsky <ben@bwidawsk.net>,
	Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915: Fix DEIER and GTIER collecting for BDW.
Date: Wed, 6 Aug 2014 09:51:53 +0200	[thread overview]
Message-ID: <20140806075153.GO8727@phenom.ffwll.local> (raw)
In-Reply-To: <1407258433-9927-1-git-send-email-rodrigo.vivi@intel.com>

On Tue, Aug 05, 2014 at 10:07:13AM -0700, Rodrigo Vivi wrote:
> BDW has many other Display Engine interrupts and GT interrupts registers.
> Collecting it properly on gpu_error_state.
> 
> On debugfs all was properly listed already but besides we were also listing old
> DEIER and GTIER that doesn't exist on BDW anymore. This was causing
> unclaimed register messages:
> 
> https://bugs.freedesktop.org/show_bug.cgi?id=81701
> 
> v2: Fix small issues of first version and don't read DEIER regs when pipe's
>     power well is disabled
> v3: bikeshed accepted: use enum pipe pipe instead of int i for pipe interection
> v4: Ben notice previous version was checking for display_power_enabled without
>     using propper locks. Using _unlocked version isn't reliable and we cannot
>     get this registers when power well is off. So let's avoid getting all DE_IER
>     per pipe for now. If someone think this is an useful information it can be
>     added later.
> v5: Ben: put back debugfs stuff that might be coverred by pm_get and use
>     	 gen >= 8 trying to predict future.
> 
> Cc: Ben Widawsky <ben@bwidawsk.net>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
> Reviewed-by: (v3) Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Queued for -next, thanks for the patch.
-Daniel
> ---
>  drivers/gpu/drm/i915/i915_drv.h       |  2 +-
>  drivers/gpu/drm/i915/i915_gpu_error.c | 19 ++++++++++++++-----
>  2 files changed, 15 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7c25345..73d2308 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -322,7 +322,7 @@ struct drm_i915_error_state {
>  	u32 eir;
>  	u32 pgtbl_er;
>  	u32 ier;
> -	u32 gtier;
> +	u32 gtier[4];
>  	u32 ccid;
>  	u32 derrmr;
>  	u32 forcewake;
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 7c478e6..eab41f9 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -361,8 +361,12 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
>  	err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
>  	err_printf(m, "EIR: 0x%08x\n", error->eir);
>  	err_printf(m, "IER: 0x%08x\n", error->ier);
> -	if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev))
> -		err_printf(m, "GTIER: 0x%08x\n", error->gtier);
> +	if (INTEL_INFO(dev)->gen >= 8) {
> +		for (i = 0; i < 4; i++)
> +			err_printf(m, "GTIER gt %d: 0x%08x\n", i,
> +				   error->gtier[i]);
> +	} else if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev))
> +		err_printf(m, "GTIER: 0x%08x\n", error->gtier[0]);
>  	err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
>  	err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
>  	err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
> @@ -1096,6 +1100,7 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
>  				   struct drm_i915_error_state *error)
>  {
>  	struct drm_device *dev = dev_priv->dev;
> +	int i;
>  
>  	/* General organization
>  	 * 1. Registers specific to a single generation
> @@ -1107,7 +1112,7 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
>  
>  	/* 1: Registers specific to a single generation */
>  	if (IS_VALLEYVIEW(dev)) {
> -		error->gtier = I915_READ(GTIER);
> +		error->gtier[0] = I915_READ(GTIER);
>  		error->ier = I915_READ(VLV_IER);
>  		error->forcewake = I915_READ(FORCEWAKE_VLV);
>  	}
> @@ -1141,9 +1146,13 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
>  	if (HAS_HW_CONTEXTS(dev))
>  		error->ccid = I915_READ(CCID);
>  
> -	if (HAS_PCH_SPLIT(dev)) {
> +	if (INTEL_INFO(dev)->gen >= 8) {
> +		error->ier = I915_READ(GEN8_DE_MISC_IER);
> +		for (i = 0; i < 4; i++)
> +			error->gtier[i] = I915_READ(GEN8_GT_IER(i));
> +	} else if (HAS_PCH_SPLIT(dev)) {
>  		error->ier = I915_READ(DEIER);
> -		error->gtier = I915_READ(GTIER);
> +		error->gtier[0] = I915_READ(GTIER);
>  	} else if (IS_GEN2(dev)) {
>  		error->ier = I915_READ16(IER);
>  	} else if (!IS_VALLEYVIEW(dev)) {
> -- 
> 1.9.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2014-08-06  7:51 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-28 15:19 [PATCH 1/2] drm/i915: Collect gtier properly on HSW Rodrigo Vivi
2014-07-28 15:19 ` [PATCH 2/2] drm/i915: Fix DEIER and GTIER collecting for BDW Rodrigo Vivi
2014-07-30 18:09   ` Paulo Zanoni
2014-07-30 18:20     ` Rodrigo Vivi
2014-07-30 18:28       ` Paulo Zanoni
2014-08-01  9:14         ` Rodrigo Vivi
2014-08-01 18:11           ` Paulo Zanoni
2014-08-01 16:13             ` Rodrigo Vivi
2014-08-04 14:44               ` Paulo Zanoni
2014-08-04 14:56                 ` Daniel Vetter
2014-08-05 16:39                   ` [PATCH] " Rodrigo Vivi
2014-08-05 17:07                     ` Rodrigo Vivi
2014-08-06  7:51                       ` Daniel Vetter [this message]
2014-07-30 17:53 ` [PATCH 1/2] drm/i915: Collect gtier properly on HSW Paulo Zanoni
2014-07-30 18:17   ` Rodrigo Vivi
2014-08-01  9:13     ` Rodrigo Vivi
2014-08-01 17:58       ` Paulo Zanoni
2014-08-01 16:12         ` Rodrigo Vivi
2014-08-04 14:37           ` Paulo Zanoni

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