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From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
	Paulo Zanoni <paulo.r.zanoni@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 1/2] drm/i915: Collect gtier properly on HSW.
Date: Wed, 30 Jul 2014 11:17:39 -0700	[thread overview]
Message-ID: <CABVU7+vPPO1aS9Vzgavzquj4-PgZOBwO11rXFjtj5qB4kA0O5g@mail.gmail.com> (raw)
In-Reply-To: <CA+gsUGSoyC5Y=USdU7EKgR_wBfU9yadHSD7=F8E8=Rp7EgKKKA@mail.gmail.com>


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On Wed, Jul 30, 2014 at 10:53 AM, Paulo Zanoni <przanoni@gmail.com> wrote:

> 2014-07-28 12:19 GMT-03:00 Rodrigo Vivi <rodrigo.vivi@intel.com>:
> > GTIER and DEIER doesn't have same interface on HSW so this "or" operation
> > makes the information provided useless.
> >
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h       |  1 +
> >  drivers/gpu/drm/i915/i915_gpu_error.c | 16 ++++++++++------
> >  2 files changed, 11 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> > index ef38c3b..ccb97f1 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -314,6 +314,7 @@ struct drm_i915_error_state {
> >         u32 eir;
> >         u32 pgtbl_er;
> >         u32 ier;
> > +       u32 gtier;
> >         u32 ccid;
> >         u32 derrmr;
> >         u32 forcewake;
> > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
> b/drivers/gpu/drm/i915/i915_gpu_error.c
> > index 0b3f694..372fea3 100644
> > --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> > @@ -359,6 +359,8 @@ int i915_error_state_to_str(struct
> drm_i915_error_state_buf *m,
> >         err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
> >         err_printf(m, "EIR: 0x%08x\n", error->eir);
> >         err_printf(m, "IER: 0x%08x\n", error->ier);
> > +       if (IS_HASWELL(dev))
> > +               err_printf(m, "GTIER: 0x%08x\n", error->gtier);
> >         err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
> >         err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
> >         err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
> > @@ -1135,13 +1137,15 @@ static void i915_capture_reg_state(struct
> drm_i915_private *dev_priv,
> >         if (HAS_HW_CONTEXTS(dev))
> >                 error->ccid = I915_READ(CCID);
> >
> > -       if (HAS_PCH_SPLIT(dev))
> > +       if (IS_HASWELL(dev)) {
> > +               error->ier = I915_READ(DEIER);
> > +               error->gtier = I915_READ(GTIER);
> > +       } else if (HAS_PCH_SPLIT(dev)) {
> >                 error->ier = I915_READ(DEIER) | I915_READ(GTIER);
>
> You did a change for HSW only, but we have these bits since Gen5. Why
> don't you do this change for the whole HAS_PCH_SPLIT chunk instead of
> adding a HSW-specific piece?
>
> I am not a huge user of these error state files, I can't really think
> why we would want to "or" the IER bits, so your patch looks correct to
> me.
>

I believe before HSW they had the same interface both DEIR and GTIER, but
since I'm splitting it for HSW you are right we can split everywhere else
with or without common interface.


>
>
> > -       else {
> > -               if (IS_GEN2(dev))
> > -                       error->ier = I915_READ16(IER);
> > -               else
> > -                       error->ier = I915_READ(IER);
> > +       } else if (IS_GEN2(dev)) {
> > +               error->ier = I915_READ16(IER);
> > +       } else {
> > +               error->ier = I915_READ(IER);
>
> While reviewing your patch I also noticed that at the top of this
> function we set error->ier for VLV, but then at this point we just
> overwrite what was previously set. You could write another patch to
> fix VLV too :)
>

Yeah, it is messy...  I'll also split for VLV and organize a bit to avoid
overwriting...


>
>
> >         }
> >
> >         /* 4: Everything else */
> > --
> > 1.9.3
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Paulo Zanoni
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2014-07-30 18:17 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-28 15:19 [PATCH 1/2] drm/i915: Collect gtier properly on HSW Rodrigo Vivi
2014-07-28 15:19 ` [PATCH 2/2] drm/i915: Fix DEIER and GTIER collecting for BDW Rodrigo Vivi
2014-07-30 18:09   ` Paulo Zanoni
2014-07-30 18:20     ` Rodrigo Vivi
2014-07-30 18:28       ` Paulo Zanoni
2014-08-01  9:14         ` Rodrigo Vivi
2014-08-01 18:11           ` Paulo Zanoni
2014-08-01 16:13             ` Rodrigo Vivi
2014-08-04 14:44               ` Paulo Zanoni
2014-08-04 14:56                 ` Daniel Vetter
2014-08-05 16:39                   ` [PATCH] " Rodrigo Vivi
2014-08-05 17:07                     ` Rodrigo Vivi
2014-08-06  7:51                       ` Daniel Vetter
2014-07-30 17:53 ` [PATCH 1/2] drm/i915: Collect gtier properly on HSW Paulo Zanoni
2014-07-30 18:17   ` Rodrigo Vivi [this message]
2014-08-01  9:13     ` Rodrigo Vivi
2014-08-01 17:58       ` Paulo Zanoni
2014-08-01 16:12         ` Rodrigo Vivi
2014-08-04 14:37           ` Paulo Zanoni

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