* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-02 23:58 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-02 23:58 UTC (permalink / raw)
To: Chris Ball, Ulf Hansson
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, Asutosh Das,
Venkat Gopalakrishnan, Georgi Djakov
If we're tuning on a big-endian CPU we'll never determine we properly
tuned the device because we compare the data we received from the
controller with a table that assumes the CPU is little-endian.
Change the table to be an array of bytes instead of 32-bit words
so we can use memcmp() without needing to byte-swap every word
depending on the endianess of the CPU.
Cc: Asutosh Das <asutoshd@codeaurora.org>
Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Cc: Georgi Djakov <gdjakov@mm-sol.com>
Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
1 file changed, 27 insertions(+), 15 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 40573a58486a..5aabffc15ae8 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -47,22 +47,34 @@
#define CMUX_SHIFT_PHASE_SHIFT 24
#define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
-static const u32 tuning_block_64[] = {
- 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
- 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
- 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
- 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
+static const u8 tuning_block_64[] = {
+ 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
+ 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
+ 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
+ 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
+ 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
+ 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
+ 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
+ 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
};
-static const u32 tuning_block_128[] = {
- 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
- 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
- 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
- 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
- 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
- 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
- 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
- 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
+static const u8 tuning_block_128[] = {
+ 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
+ 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
+ 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
+ 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
+ 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
+ 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
+ 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
+ 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
+ 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
+ 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
+ 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
+ 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
+ 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
+ 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
+ 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
+ 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
};
struct sdhci_msm_host {
@@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
{
int tuning_seq_cnt = 3;
u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
- const u32 *tuning_block_pattern = tuning_block_64;
+ const u8 *tuning_block_pattern = tuning_block_64;
int size = sizeof(tuning_block_64); /* Pattern size in bytes */
int rc;
struct mmc_host *mmc = host->mmc;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-02 23:58 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-02 23:58 UTC (permalink / raw)
To: linux-arm-kernel
If we're tuning on a big-endian CPU we'll never determine we properly
tuned the device because we compare the data we received from the
controller with a table that assumes the CPU is little-endian.
Change the table to be an array of bytes instead of 32-bit words
so we can use memcmp() without needing to byte-swap every word
depending on the endianess of the CPU.
Cc: Asutosh Das <asutoshd@codeaurora.org>
Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Cc: Georgi Djakov <gdjakov@mm-sol.com>
Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
1 file changed, 27 insertions(+), 15 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 40573a58486a..5aabffc15ae8 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -47,22 +47,34 @@
#define CMUX_SHIFT_PHASE_SHIFT 24
#define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
-static const u32 tuning_block_64[] = {
- 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
- 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
- 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
- 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
+static const u8 tuning_block_64[] = {
+ 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
+ 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
+ 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
+ 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
+ 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
+ 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
+ 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
+ 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
};
-static const u32 tuning_block_128[] = {
- 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
- 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
- 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
- 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
- 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
- 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
- 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
- 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
+static const u8 tuning_block_128[] = {
+ 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
+ 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
+ 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
+ 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
+ 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
+ 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
+ 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
+ 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
+ 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
+ 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
+ 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
+ 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
+ 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
+ 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
+ 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
+ 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
};
struct sdhci_msm_host {
@@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
{
int tuning_seq_cnt = 3;
u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
- const u32 *tuning_block_pattern = tuning_block_64;
+ const u8 *tuning_block_pattern = tuning_block_64;
int size = sizeof(tuning_block_64); /* Pattern size in bytes */
int rc;
struct mmc_host *mmc = host->mmc;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-02 23:58 ` Stephen Boyd
(?)
@ 2014-09-03 8:36 ` Ulf Hansson
-1 siblings, 0 replies; 35+ messages in thread
From: Ulf Hansson @ 2014-09-03 8:36 UTC (permalink / raw)
To: Stephen Boyd
Cc: Chris Ball, linux-kernel, linux-arm-msm, linux-arm-kernel,
Asutosh Das, Venkat Gopalakrishnan, Georgi Djakov
On 3 September 2014 01:58, Stephen Boyd <sboyd@codeaurora.org> wrote:
> If we're tuning on a big-endian CPU we'll never determine we properly
> tuned the device because we compare the data we received from the
> controller with a table that assumes the CPU is little-endian.
> Change the table to be an array of bytes instead of 32-bit words
> so we can use memcmp() without needing to byte-swap every word
> depending on the endianess of the CPU.
>
> Cc: Asutosh Das <asutoshd@codeaurora.org>
> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
> Cc: Georgi Djakov <gdjakov@mm-sol.com>
> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Hi Stephen,
If you want me to pick this up, please repost to linux-mmc as well.
Otherwise you have my ack for it!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
> 1 file changed, 27 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 40573a58486a..5aabffc15ae8 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -47,22 +47,34 @@
> #define CMUX_SHIFT_PHASE_SHIFT 24
> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>
> -static const u32 tuning_block_64[] = {
> - 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
> - 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
> - 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
> - 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
> +static const u8 tuning_block_64[] = {
> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> };
>
> -static const u32 tuning_block_128[] = {
> - 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
> - 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
> - 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
> - 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
> - 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
> - 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
> - 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
> - 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
> +static const u8 tuning_block_128[] = {
> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> };
>
> struct sdhci_msm_host {
> @@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
> {
> int tuning_seq_cnt = 3;
> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
> - const u32 *tuning_block_pattern = tuning_block_64;
> + const u8 *tuning_block_pattern = tuning_block_64;
> int size = sizeof(tuning_block_64); /* Pattern size in bytes */
> int rc;
> struct mmc_host *mmc = host->mmc;
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> hosted by The Linux Foundation
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-03 8:36 ` Ulf Hansson
0 siblings, 0 replies; 35+ messages in thread
From: Ulf Hansson @ 2014-09-03 8:36 UTC (permalink / raw)
To: Stephen Boyd
Cc: Chris Ball, linux-kernel, linux-arm-msm, linux-arm-kernel,
Asutosh Das, Venkat Gopalakrishnan, Georgi Djakov
On 3 September 2014 01:58, Stephen Boyd <sboyd@codeaurora.org> wrote:
> If we're tuning on a big-endian CPU we'll never determine we properly
> tuned the device because we compare the data we received from the
> controller with a table that assumes the CPU is little-endian.
> Change the table to be an array of bytes instead of 32-bit words
> so we can use memcmp() without needing to byte-swap every word
> depending on the endianess of the CPU.
>
> Cc: Asutosh Das <asutoshd@codeaurora.org>
> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
> Cc: Georgi Djakov <gdjakov@mm-sol.com>
> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Hi Stephen,
If you want me to pick this up, please repost to linux-mmc as well.
Otherwise you have my ack for it!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
> 1 file changed, 27 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 40573a58486a..5aabffc15ae8 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -47,22 +47,34 @@
> #define CMUX_SHIFT_PHASE_SHIFT 24
> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>
> -static const u32 tuning_block_64[] = {
> - 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
> - 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
> - 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
> - 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
> +static const u8 tuning_block_64[] = {
> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> };
>
> -static const u32 tuning_block_128[] = {
> - 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
> - 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
> - 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
> - 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
> - 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
> - 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
> - 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
> - 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
> +static const u8 tuning_block_128[] = {
> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> };
>
> struct sdhci_msm_host {
> @@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
> {
> int tuning_seq_cnt = 3;
> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
> - const u32 *tuning_block_pattern = tuning_block_64;
> + const u8 *tuning_block_pattern = tuning_block_64;
> int size = sizeof(tuning_block_64); /* Pattern size in bytes */
> int rc;
> struct mmc_host *mmc = host->mmc;
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> hosted by The Linux Foundation
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-03 8:36 ` Ulf Hansson
0 siblings, 0 replies; 35+ messages in thread
From: Ulf Hansson @ 2014-09-03 8:36 UTC (permalink / raw)
To: linux-arm-kernel
On 3 September 2014 01:58, Stephen Boyd <sboyd@codeaurora.org> wrote:
> If we're tuning on a big-endian CPU we'll never determine we properly
> tuned the device because we compare the data we received from the
> controller with a table that assumes the CPU is little-endian.
> Change the table to be an array of bytes instead of 32-bit words
> so we can use memcmp() without needing to byte-swap every word
> depending on the endianess of the CPU.
>
> Cc: Asutosh Das <asutoshd@codeaurora.org>
> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
> Cc: Georgi Djakov <gdjakov@mm-sol.com>
> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Hi Stephen,
If you want me to pick this up, please repost to linux-mmc as well.
Otherwise you have my ack for it!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
> 1 file changed, 27 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 40573a58486a..5aabffc15ae8 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -47,22 +47,34 @@
> #define CMUX_SHIFT_PHASE_SHIFT 24
> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>
> -static const u32 tuning_block_64[] = {
> - 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
> - 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
> - 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
> - 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
> +static const u8 tuning_block_64[] = {
> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> };
>
> -static const u32 tuning_block_128[] = {
> - 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
> - 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
> - 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
> - 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
> - 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
> - 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
> - 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
> - 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
> +static const u8 tuning_block_128[] = {
> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> };
>
> struct sdhci_msm_host {
> @@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
> {
> int tuning_seq_cnt = 3;
> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
> - const u32 *tuning_block_pattern = tuning_block_64;
> + const u8 *tuning_block_pattern = tuning_block_64;
> int size = sizeof(tuning_block_64); /* Pattern size in bytes */
> int rc;
> struct mmc_host *mmc = host->mmc;
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> hosted by The Linux Foundation
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-02 23:58 ` Stephen Boyd
@ 2014-09-03 11:57 ` Georgi Djakov
-1 siblings, 0 replies; 35+ messages in thread
From: Georgi Djakov @ 2014-09-03 11:57 UTC (permalink / raw)
To: Stephen Boyd, Chris Ball, Ulf Hansson
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, Asutosh Das,
Venkat Gopalakrishnan
On 09/03/2014 02:58 AM, Stephen Boyd wrote:
> If we're tuning on a big-endian CPU we'll never determine we properly
> tuned the device because we compare the data we received from the
> controller with a table that assumes the CPU is little-endian.
> Change the table to be an array of bytes instead of 32-bit words
> so we can use memcmp() without needing to byte-swap every word
> depending on the endianess of the CPU.
>
> Cc: Asutosh Das <asutoshd@codeaurora.org>
> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
> Cc: Georgi Djakov <gdjakov@mm-sol.com>
> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
Looks nice. Thanks!
Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-03 11:57 ` Georgi Djakov
0 siblings, 0 replies; 35+ messages in thread
From: Georgi Djakov @ 2014-09-03 11:57 UTC (permalink / raw)
To: linux-arm-kernel
On 09/03/2014 02:58 AM, Stephen Boyd wrote:
> If we're tuning on a big-endian CPU we'll never determine we properly
> tuned the device because we compare the data we received from the
> controller with a table that assumes the CPU is little-endian.
> Change the table to be an array of bytes instead of 32-bit words
> so we can use memcmp() without needing to byte-swap every word
> depending on the endianess of the CPU.
>
> Cc: Asutosh Das <asutoshd@codeaurora.org>
> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
> Cc: Georgi Djakov <gdjakov@mm-sol.com>
> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
Looks nice. Thanks!
Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com>
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-03 8:36 ` Ulf Hansson
(?)
@ 2014-09-03 13:37 ` Stephen Boyd
-1 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-03 13:37 UTC (permalink / raw)
To: Ulf Hansson
Cc: Chris Ball, linux-kernel, linux-arm-msm, linux-arm-kernel,
Asutosh Das, Venkat Gopalakrishnan, Georgi Djakov
On 09/03, Ulf Hansson wrote:
> On 3 September 2014 01:58, Stephen Boyd <sboyd@codeaurora.org> wrote:
> > If we're tuning on a big-endian CPU we'll never determine we properly
> > tuned the device because we compare the data we received from the
> > controller with a table that assumes the CPU is little-endian.
> > Change the table to be an array of bytes instead of 32-bit words
> > so we can use memcmp() without needing to byte-swap every word
> > depending on the endianess of the CPU.
> >
> > Cc: Asutosh Das <asutoshd@codeaurora.org>
> > Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
> > Cc: Georgi Djakov <gdjakov@mm-sol.com>
> > Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
> > Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>
> Hi Stephen,
>
> If you want me to pick this up, please repost to linux-mmc as well.
> Otherwise you have my ack for it!
>
Ok I'll repost it now.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-03 13:37 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-03 13:37 UTC (permalink / raw)
To: Ulf Hansson
Cc: Chris Ball, linux-kernel, linux-arm-msm, linux-arm-kernel,
Asutosh Das, Venkat Gopalakrishnan, Georgi Djakov
On 09/03, Ulf Hansson wrote:
> On 3 September 2014 01:58, Stephen Boyd <sboyd@codeaurora.org> wrote:
> > If we're tuning on a big-endian CPU we'll never determine we properly
> > tuned the device because we compare the data we received from the
> > controller with a table that assumes the CPU is little-endian.
> > Change the table to be an array of bytes instead of 32-bit words
> > so we can use memcmp() without needing to byte-swap every word
> > depending on the endianess of the CPU.
> >
> > Cc: Asutosh Das <asutoshd@codeaurora.org>
> > Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
> > Cc: Georgi Djakov <gdjakov@mm-sol.com>
> > Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
> > Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>
> Hi Stephen,
>
> If you want me to pick this up, please repost to linux-mmc as well.
> Otherwise you have my ack for it!
>
Ok I'll repost it now.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-03 13:37 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-03 13:37 UTC (permalink / raw)
To: linux-arm-kernel
On 09/03, Ulf Hansson wrote:
> On 3 September 2014 01:58, Stephen Boyd <sboyd@codeaurora.org> wrote:
> > If we're tuning on a big-endian CPU we'll never determine we properly
> > tuned the device because we compare the data we received from the
> > controller with a table that assumes the CPU is little-endian.
> > Change the table to be an array of bytes instead of 32-bit words
> > so we can use memcmp() without needing to byte-swap every word
> > depending on the endianess of the CPU.
> >
> > Cc: Asutosh Das <asutoshd@codeaurora.org>
> > Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
> > Cc: Georgi Djakov <gdjakov@mm-sol.com>
> > Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
> > Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>
> Hi Stephen,
>
> If you want me to pick this up, please repost to linux-mmc as well.
> Otherwise you have my ack for it!
>
Ok I'll repost it now.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-17 22:36 ` Ulf Hansson
(?)
@ 2014-09-17 22:57 ` Stephen Boyd
-1 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-17 22:57 UTC (permalink / raw)
To: Ulf Hansson
Cc: Jaehoon Chung, linux-kernel, linux-arm-msm, linux-arm-kernel,
linux-mmc, Chris Ball, Georgi Djakov, Asutosh Das,
Venkat Gopalakrishnan
On 09/18, Ulf Hansson wrote:
> 2014-09-15 23:45 GMT+02:00 Stephen Boyd <sboyd@codeaurora.org>:
> > On 09/04/14 15:01, Stephen Boyd wrote:
> >>
> >> ----8<----
> >> From: Stephen Boyd <sboyd@codeaurora.org>
> >> Subject: [PATCH] mmc: Consolidate emmc tuning blocks
> >>
> >> The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
> >> files. Move these into mmc.c so that they can be shared across
> >> drivers.
> >>
> >> Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
> >> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> >> ---
> >
> > Hi Ulf,
> >
> > Can this and the previous patch be picked up for 3.18?
>
> Sure, seems reasonable. Though I am having a bit hard to follow the
> mail and patches here. Could you please repost the patches and please
> do not reply to previous mail threads while doing that.
>
Ok. No problem.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-17 22:57 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-17 22:57 UTC (permalink / raw)
To: Ulf Hansson
Cc: Jaehoon Chung, linux-kernel, linux-arm-msm, linux-arm-kernel,
linux-mmc, Chris Ball, Georgi Djakov, Asutosh Das,
Venkat Gopalakrishnan
On 09/18, Ulf Hansson wrote:
> 2014-09-15 23:45 GMT+02:00 Stephen Boyd <sboyd@codeaurora.org>:
> > On 09/04/14 15:01, Stephen Boyd wrote:
> >>
> >> ----8<----
> >> From: Stephen Boyd <sboyd@codeaurora.org>
> >> Subject: [PATCH] mmc: Consolidate emmc tuning blocks
> >>
> >> The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
> >> files. Move these into mmc.c so that they can be shared across
> >> drivers.
> >>
> >> Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
> >> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> >> ---
> >
> > Hi Ulf,
> >
> > Can this and the previous patch be picked up for 3.18?
>
> Sure, seems reasonable. Though I am having a bit hard to follow the
> mail and patches here. Could you please repost the patches and please
> do not reply to previous mail threads while doing that.
>
Ok. No problem.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-17 22:57 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-17 22:57 UTC (permalink / raw)
To: linux-arm-kernel
On 09/18, Ulf Hansson wrote:
> 2014-09-15 23:45 GMT+02:00 Stephen Boyd <sboyd@codeaurora.org>:
> > On 09/04/14 15:01, Stephen Boyd wrote:
> >>
> >> ----8<----
> >> From: Stephen Boyd <sboyd@codeaurora.org>
> >> Subject: [PATCH] mmc: Consolidate emmc tuning blocks
> >>
> >> The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
> >> files. Move these into mmc.c so that they can be shared across
> >> drivers.
> >>
> >> Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
> >> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> >> ---
> >
> > Hi Ulf,
> >
> > Can this and the previous patch be picked up for 3.18?
>
> Sure, seems reasonable. Though I am having a bit hard to follow the
> mail and patches here. Could you please repost the patches and please
> do not reply to previous mail threads while doing that.
>
Ok. No problem.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-15 21:45 ` Stephen Boyd
(?)
@ 2014-09-17 22:36 ` Ulf Hansson
-1 siblings, 0 replies; 35+ messages in thread
From: Ulf Hansson @ 2014-09-17 22:36 UTC (permalink / raw)
To: Stephen Boyd
Cc: Jaehoon Chung, linux-kernel, linux-arm-msm, linux-arm-kernel,
linux-mmc, Chris Ball, Georgi Djakov, Asutosh Das,
Venkat Gopalakrishnan
2014-09-15 23:45 GMT+02:00 Stephen Boyd <sboyd@codeaurora.org>:
> On 09/04/14 15:01, Stephen Boyd wrote:
>>
>> ----8<----
>> From: Stephen Boyd <sboyd@codeaurora.org>
>> Subject: [PATCH] mmc: Consolidate emmc tuning blocks
>>
>> The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
>> files. Move these into mmc.c so that they can be shared across
>> drivers.
>>
>> Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>> ---
>
> Hi Ulf,
>
> Can this and the previous patch be picked up for 3.18?
Sure, seems reasonable. Though I am having a bit hard to follow the
mail and patches here. Could you please repost the patches and please
do not reply to previous mail threads while doing that.
Kind regards
Uffe
>
> Thanks,
> Stephen
>
>> drivers/mmc/core/mmc.c | 32 ++++++++++++++++++++++++++++++++
>> drivers/mmc/host/dw_mmc.c | 30 ------------------------------
>> drivers/mmc/host/sdhci-msm.c | 38 ++++----------------------------------
>> include/linux/mmc/mmc.h | 5 +++++
>> 4 files changed, 41 insertions(+), 64 deletions(-)
>>
>> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
>> index 793c6f7ddb04..9608cc8a1f65 100644
>> --- a/drivers/mmc/core/mmc.c
>> +++ b/drivers/mmc/core/mmc.c
>> @@ -1135,6 +1135,38 @@ bus_speed:
>> return err;
>> }
>>
>> +const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = {
>> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> +};
>> +EXPORT_SYMBOL(tuning_blk_pattern_4bit);
>> +
>> +const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = {
>> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> +};
>> +EXPORT_SYMBOL(tuning_blk_pattern_8bit);
>> +
>> /*
>> * Execute tuning sequence to seek the proper bus operating
>> * conditions for HS200 and HS400, which sends CMD21 to the device.
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 1ac227c603b7..f1cefdf5e2d0 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -81,36 +81,6 @@ struct idmac_desc {
>> };
>> #endif /* CONFIG_MMC_DW_IDMAC */
>>
>> -static const u8 tuning_blk_pattern_4bit[] = {
>> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> -};
>> -
>> -static const u8 tuning_blk_pattern_8bit[] = {
>> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> -};
>> -
>> static inline bool dw_mci_fifo_reset(struct dw_mci *host);
>> static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
>>
>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
>> index 5aabffc15ae8..da74c77f34cc 100644
>> --- a/drivers/mmc/host/sdhci-msm.c
>> +++ b/drivers/mmc/host/sdhci-msm.c
>> @@ -47,36 +47,6 @@
>> #define CMUX_SHIFT_PHASE_SHIFT 24
>> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>>
>> -static const u8 tuning_block_64[] = {
>> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> -};
>> -
>> -static const u8 tuning_block_128[] = {
>> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> -};
>> -
>> struct sdhci_msm_host {
>> struct platform_device *pdev;
>> void __iomem *core_mem; /* MSM SDCC mapped address */
>> @@ -371,8 +341,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>> {
>> int tuning_seq_cnt = 3;
>> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
>> - const u8 *tuning_block_pattern = tuning_block_64;
>> - int size = sizeof(tuning_block_64); /* Pattern size in bytes */
>> + const u8 *tuning_block_pattern = tuning_blk_pattern_4bit;
>> + int size = sizeof(tuning_blk_pattern_4bit);
>> int rc;
>> struct mmc_host *mmc = host->mmc;
>> struct mmc_ios ios = host->mmc->ios;
>> @@ -388,8 +358,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>>
>> if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) &&
>> (mmc->ios.bus_width == MMC_BUS_WIDTH_8)) {
>> - tuning_block_pattern = tuning_block_128;
>> - size = sizeof(tuning_block_128);
>> + tuning_block_pattern = tuning_blk_pattern_8bit;
>> + size = sizeof(tuning_blk_pattern_8bit);
>> }
>>
>> data_buf = kmalloc(size, GFP_KERNEL);
>> diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
>> index 64ec963ed347..cff1f2622061 100644
>> --- a/include/linux/mmc/mmc.h
>> +++ b/include/linux/mmc/mmc.h
>> @@ -53,6 +53,11 @@
>> #define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
>> #define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
>>
>> +#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE 64
>> +#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE 128
>> +extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
>> +extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
>> +
>> /* class 3 */
>> #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
>>
>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> hosted by The Linux Foundation
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-17 22:36 ` Ulf Hansson
0 siblings, 0 replies; 35+ messages in thread
From: Ulf Hansson @ 2014-09-17 22:36 UTC (permalink / raw)
To: Stephen Boyd
Cc: Jaehoon Chung, linux-kernel, linux-arm-msm, linux-arm-kernel,
linux-mmc, Chris Ball, Georgi Djakov, Asutosh Das,
Venkat Gopalakrishnan
2014-09-15 23:45 GMT+02:00 Stephen Boyd <sboyd@codeaurora.org>:
> On 09/04/14 15:01, Stephen Boyd wrote:
>>
>> ----8<----
>> From: Stephen Boyd <sboyd@codeaurora.org>
>> Subject: [PATCH] mmc: Consolidate emmc tuning blocks
>>
>> The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
>> files. Move these into mmc.c so that they can be shared across
>> drivers.
>>
>> Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>> ---
>
> Hi Ulf,
>
> Can this and the previous patch be picked up for 3.18?
Sure, seems reasonable. Though I am having a bit hard to follow the
mail and patches here. Could you please repost the patches and please
do not reply to previous mail threads while doing that.
Kind regards
Uffe
>
> Thanks,
> Stephen
>
>> drivers/mmc/core/mmc.c | 32 ++++++++++++++++++++++++++++++++
>> drivers/mmc/host/dw_mmc.c | 30 ------------------------------
>> drivers/mmc/host/sdhci-msm.c | 38 ++++----------------------------------
>> include/linux/mmc/mmc.h | 5 +++++
>> 4 files changed, 41 insertions(+), 64 deletions(-)
>>
>> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
>> index 793c6f7ddb04..9608cc8a1f65 100644
>> --- a/drivers/mmc/core/mmc.c
>> +++ b/drivers/mmc/core/mmc.c
>> @@ -1135,6 +1135,38 @@ bus_speed:
>> return err;
>> }
>>
>> +const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = {
>> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> +};
>> +EXPORT_SYMBOL(tuning_blk_pattern_4bit);
>> +
>> +const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = {
>> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> +};
>> +EXPORT_SYMBOL(tuning_blk_pattern_8bit);
>> +
>> /*
>> * Execute tuning sequence to seek the proper bus operating
>> * conditions for HS200 and HS400, which sends CMD21 to the device.
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 1ac227c603b7..f1cefdf5e2d0 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -81,36 +81,6 @@ struct idmac_desc {
>> };
>> #endif /* CONFIG_MMC_DW_IDMAC */
>>
>> -static const u8 tuning_blk_pattern_4bit[] = {
>> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> -};
>> -
>> -static const u8 tuning_blk_pattern_8bit[] = {
>> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> -};
>> -
>> static inline bool dw_mci_fifo_reset(struct dw_mci *host);
>> static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
>>
>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
>> index 5aabffc15ae8..da74c77f34cc 100644
>> --- a/drivers/mmc/host/sdhci-msm.c
>> +++ b/drivers/mmc/host/sdhci-msm.c
>> @@ -47,36 +47,6 @@
>> #define CMUX_SHIFT_PHASE_SHIFT 24
>> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>>
>> -static const u8 tuning_block_64[] = {
>> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> -};
>> -
>> -static const u8 tuning_block_128[] = {
>> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> -};
>> -
>> struct sdhci_msm_host {
>> struct platform_device *pdev;
>> void __iomem *core_mem; /* MSM SDCC mapped address */
>> @@ -371,8 +341,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>> {
>> int tuning_seq_cnt = 3;
>> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
>> - const u8 *tuning_block_pattern = tuning_block_64;
>> - int size = sizeof(tuning_block_64); /* Pattern size in bytes */
>> + const u8 *tuning_block_pattern = tuning_blk_pattern_4bit;
>> + int size = sizeof(tuning_blk_pattern_4bit);
>> int rc;
>> struct mmc_host *mmc = host->mmc;
>> struct mmc_ios ios = host->mmc->ios;
>> @@ -388,8 +358,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>>
>> if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) &&
>> (mmc->ios.bus_width == MMC_BUS_WIDTH_8)) {
>> - tuning_block_pattern = tuning_block_128;
>> - size = sizeof(tuning_block_128);
>> + tuning_block_pattern = tuning_blk_pattern_8bit;
>> + size = sizeof(tuning_blk_pattern_8bit);
>> }
>>
>> data_buf = kmalloc(size, GFP_KERNEL);
>> diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
>> index 64ec963ed347..cff1f2622061 100644
>> --- a/include/linux/mmc/mmc.h
>> +++ b/include/linux/mmc/mmc.h
>> @@ -53,6 +53,11 @@
>> #define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
>> #define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
>>
>> +#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE 64
>> +#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE 128
>> +extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
>> +extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
>> +
>> /* class 3 */
>> #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
>>
>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> hosted by The Linux Foundation
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-17 22:36 ` Ulf Hansson
0 siblings, 0 replies; 35+ messages in thread
From: Ulf Hansson @ 2014-09-17 22:36 UTC (permalink / raw)
To: linux-arm-kernel
2014-09-15 23:45 GMT+02:00 Stephen Boyd <sboyd@codeaurora.org>:
> On 09/04/14 15:01, Stephen Boyd wrote:
>>
>> ----8<----
>> From: Stephen Boyd <sboyd@codeaurora.org>
>> Subject: [PATCH] mmc: Consolidate emmc tuning blocks
>>
>> The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
>> files. Move these into mmc.c so that they can be shared across
>> drivers.
>>
>> Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>> ---
>
> Hi Ulf,
>
> Can this and the previous patch be picked up for 3.18?
Sure, seems reasonable. Though I am having a bit hard to follow the
mail and patches here. Could you please repost the patches and please
do not reply to previous mail threads while doing that.
Kind regards
Uffe
>
> Thanks,
> Stephen
>
>> drivers/mmc/core/mmc.c | 32 ++++++++++++++++++++++++++++++++
>> drivers/mmc/host/dw_mmc.c | 30 ------------------------------
>> drivers/mmc/host/sdhci-msm.c | 38 ++++----------------------------------
>> include/linux/mmc/mmc.h | 5 +++++
>> 4 files changed, 41 insertions(+), 64 deletions(-)
>>
>> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
>> index 793c6f7ddb04..9608cc8a1f65 100644
>> --- a/drivers/mmc/core/mmc.c
>> +++ b/drivers/mmc/core/mmc.c
>> @@ -1135,6 +1135,38 @@ bus_speed:
>> return err;
>> }
>>
>> +const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = {
>> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> +};
>> +EXPORT_SYMBOL(tuning_blk_pattern_4bit);
>> +
>> +const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = {
>> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> +};
>> +EXPORT_SYMBOL(tuning_blk_pattern_8bit);
>> +
>> /*
>> * Execute tuning sequence to seek the proper bus operating
>> * conditions for HS200 and HS400, which sends CMD21 to the device.
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 1ac227c603b7..f1cefdf5e2d0 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -81,36 +81,6 @@ struct idmac_desc {
>> };
>> #endif /* CONFIG_MMC_DW_IDMAC */
>>
>> -static const u8 tuning_blk_pattern_4bit[] = {
>> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> -};
>> -
>> -static const u8 tuning_blk_pattern_8bit[] = {
>> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> -};
>> -
>> static inline bool dw_mci_fifo_reset(struct dw_mci *host);
>> static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
>>
>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
>> index 5aabffc15ae8..da74c77f34cc 100644
>> --- a/drivers/mmc/host/sdhci-msm.c
>> +++ b/drivers/mmc/host/sdhci-msm.c
>> @@ -47,36 +47,6 @@
>> #define CMUX_SHIFT_PHASE_SHIFT 24
>> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>>
>> -static const u8 tuning_block_64[] = {
>> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> -};
>> -
>> -static const u8 tuning_block_128[] = {
>> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> -};
>> -
>> struct sdhci_msm_host {
>> struct platform_device *pdev;
>> void __iomem *core_mem; /* MSM SDCC mapped address */
>> @@ -371,8 +341,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>> {
>> int tuning_seq_cnt = 3;
>> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
>> - const u8 *tuning_block_pattern = tuning_block_64;
>> - int size = sizeof(tuning_block_64); /* Pattern size in bytes */
>> + const u8 *tuning_block_pattern = tuning_blk_pattern_4bit;
>> + int size = sizeof(tuning_blk_pattern_4bit);
>> int rc;
>> struct mmc_host *mmc = host->mmc;
>> struct mmc_ios ios = host->mmc->ios;
>> @@ -388,8 +358,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>>
>> if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) &&
>> (mmc->ios.bus_width == MMC_BUS_WIDTH_8)) {
>> - tuning_block_pattern = tuning_block_128;
>> - size = sizeof(tuning_block_128);
>> + tuning_block_pattern = tuning_blk_pattern_8bit;
>> + size = sizeof(tuning_blk_pattern_8bit);
>> }
>>
>> data_buf = kmalloc(size, GFP_KERNEL);
>> diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
>> index 64ec963ed347..cff1f2622061 100644
>> --- a/include/linux/mmc/mmc.h
>> +++ b/include/linux/mmc/mmc.h
>> @@ -53,6 +53,11 @@
>> #define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
>> #define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
>>
>> +#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE 64
>> +#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE 128
>> +extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
>> +extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
>> +
>> /* class 3 */
>> #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
>>
>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> hosted by The Linux Foundation
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-04 22:01 ` Stephen Boyd
(?)
@ 2014-09-15 21:45 ` Stephen Boyd
-1 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-15 21:45 UTC (permalink / raw)
To: Ulf Hansson
Cc: Jaehoon Chung, linux-kernel, linux-arm-msm, linux-arm-kernel,
linux-mmc, Chris Ball, Georgi Djakov, Asutosh Das,
Venkat Gopalakrishnan
On 09/04/14 15:01, Stephen Boyd wrote:
>
> ----8<----
> From: Stephen Boyd <sboyd@codeaurora.org>
> Subject: [PATCH] mmc: Consolidate emmc tuning blocks
>
> The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
> files. Move these into mmc.c so that they can be shared across
> drivers.
>
> Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
Hi Ulf,
Can this and the previous patch be picked up for 3.18?
Thanks,
Stephen
> drivers/mmc/core/mmc.c | 32 ++++++++++++++++++++++++++++++++
> drivers/mmc/host/dw_mmc.c | 30 ------------------------------
> drivers/mmc/host/sdhci-msm.c | 38 ++++----------------------------------
> include/linux/mmc/mmc.h | 5 +++++
> 4 files changed, 41 insertions(+), 64 deletions(-)
>
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index 793c6f7ddb04..9608cc8a1f65 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -1135,6 +1135,38 @@ bus_speed:
> return err;
> }
>
> +const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = {
> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> +};
> +EXPORT_SYMBOL(tuning_blk_pattern_4bit);
> +
> +const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = {
> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> +};
> +EXPORT_SYMBOL(tuning_blk_pattern_8bit);
> +
> /*
> * Execute tuning sequence to seek the proper bus operating
> * conditions for HS200 and HS400, which sends CMD21 to the device.
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 1ac227c603b7..f1cefdf5e2d0 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -81,36 +81,6 @@ struct idmac_desc {
> };
> #endif /* CONFIG_MMC_DW_IDMAC */
>
> -static const u8 tuning_blk_pattern_4bit[] = {
> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> -};
> -
> -static const u8 tuning_blk_pattern_8bit[] = {
> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> -};
> -
> static inline bool dw_mci_fifo_reset(struct dw_mci *host);
> static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 5aabffc15ae8..da74c77f34cc 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -47,36 +47,6 @@
> #define CMUX_SHIFT_PHASE_SHIFT 24
> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>
> -static const u8 tuning_block_64[] = {
> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> -};
> -
> -static const u8 tuning_block_128[] = {
> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> -};
> -
> struct sdhci_msm_host {
> struct platform_device *pdev;
> void __iomem *core_mem; /* MSM SDCC mapped address */
> @@ -371,8 +341,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
> {
> int tuning_seq_cnt = 3;
> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
> - const u8 *tuning_block_pattern = tuning_block_64;
> - int size = sizeof(tuning_block_64); /* Pattern size in bytes */
> + const u8 *tuning_block_pattern = tuning_blk_pattern_4bit;
> + int size = sizeof(tuning_blk_pattern_4bit);
> int rc;
> struct mmc_host *mmc = host->mmc;
> struct mmc_ios ios = host->mmc->ios;
> @@ -388,8 +358,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>
> if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) &&
> (mmc->ios.bus_width == MMC_BUS_WIDTH_8)) {
> - tuning_block_pattern = tuning_block_128;
> - size = sizeof(tuning_block_128);
> + tuning_block_pattern = tuning_blk_pattern_8bit;
> + size = sizeof(tuning_blk_pattern_8bit);
> }
>
> data_buf = kmalloc(size, GFP_KERNEL);
> diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
> index 64ec963ed347..cff1f2622061 100644
> --- a/include/linux/mmc/mmc.h
> +++ b/include/linux/mmc/mmc.h
> @@ -53,6 +53,11 @@
> #define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
> #define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
>
> +#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE 64
> +#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE 128
> +extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
> +extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
> +
> /* class 3 */
> #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-15 21:45 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-15 21:45 UTC (permalink / raw)
To: Ulf Hansson
Cc: Jaehoon Chung, linux-kernel, linux-arm-msm, linux-arm-kernel,
linux-mmc, Chris Ball, Georgi Djakov, Asutosh Das,
Venkat Gopalakrishnan
On 09/04/14 15:01, Stephen Boyd wrote:
>
> ----8<----
> From: Stephen Boyd <sboyd@codeaurora.org>
> Subject: [PATCH] mmc: Consolidate emmc tuning blocks
>
> The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
> files. Move these into mmc.c so that they can be shared across
> drivers.
>
> Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
Hi Ulf,
Can this and the previous patch be picked up for 3.18?
Thanks,
Stephen
> drivers/mmc/core/mmc.c | 32 ++++++++++++++++++++++++++++++++
> drivers/mmc/host/dw_mmc.c | 30 ------------------------------
> drivers/mmc/host/sdhci-msm.c | 38 ++++----------------------------------
> include/linux/mmc/mmc.h | 5 +++++
> 4 files changed, 41 insertions(+), 64 deletions(-)
>
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index 793c6f7ddb04..9608cc8a1f65 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -1135,6 +1135,38 @@ bus_speed:
> return err;
> }
>
> +const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = {
> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> +};
> +EXPORT_SYMBOL(tuning_blk_pattern_4bit);
> +
> +const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = {
> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> +};
> +EXPORT_SYMBOL(tuning_blk_pattern_8bit);
> +
> /*
> * Execute tuning sequence to seek the proper bus operating
> * conditions for HS200 and HS400, which sends CMD21 to the device.
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 1ac227c603b7..f1cefdf5e2d0 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -81,36 +81,6 @@ struct idmac_desc {
> };
> #endif /* CONFIG_MMC_DW_IDMAC */
>
> -static const u8 tuning_blk_pattern_4bit[] = {
> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> -};
> -
> -static const u8 tuning_blk_pattern_8bit[] = {
> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> -};
> -
> static inline bool dw_mci_fifo_reset(struct dw_mci *host);
> static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 5aabffc15ae8..da74c77f34cc 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -47,36 +47,6 @@
> #define CMUX_SHIFT_PHASE_SHIFT 24
> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>
> -static const u8 tuning_block_64[] = {
> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> -};
> -
> -static const u8 tuning_block_128[] = {
> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> -};
> -
> struct sdhci_msm_host {
> struct platform_device *pdev;
> void __iomem *core_mem; /* MSM SDCC mapped address */
> @@ -371,8 +341,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
> {
> int tuning_seq_cnt = 3;
> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
> - const u8 *tuning_block_pattern = tuning_block_64;
> - int size = sizeof(tuning_block_64); /* Pattern size in bytes */
> + const u8 *tuning_block_pattern = tuning_blk_pattern_4bit;
> + int size = sizeof(tuning_blk_pattern_4bit);
> int rc;
> struct mmc_host *mmc = host->mmc;
> struct mmc_ios ios = host->mmc->ios;
> @@ -388,8 +358,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>
> if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) &&
> (mmc->ios.bus_width == MMC_BUS_WIDTH_8)) {
> - tuning_block_pattern = tuning_block_128;
> - size = sizeof(tuning_block_128);
> + tuning_block_pattern = tuning_blk_pattern_8bit;
> + size = sizeof(tuning_blk_pattern_8bit);
> }
>
> data_buf = kmalloc(size, GFP_KERNEL);
> diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
> index 64ec963ed347..cff1f2622061 100644
> --- a/include/linux/mmc/mmc.h
> +++ b/include/linux/mmc/mmc.h
> @@ -53,6 +53,11 @@
> #define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
> #define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
>
> +#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE 64
> +#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE 128
> +extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
> +extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
> +
> /* class 3 */
> #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-15 21:45 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-15 21:45 UTC (permalink / raw)
To: linux-arm-kernel
On 09/04/14 15:01, Stephen Boyd wrote:
>
> ----8<----
> From: Stephen Boyd <sboyd@codeaurora.org>
> Subject: [PATCH] mmc: Consolidate emmc tuning blocks
>
> The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
> files. Move these into mmc.c so that they can be shared across
> drivers.
>
> Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
Hi Ulf,
Can this and the previous patch be picked up for 3.18?
Thanks,
Stephen
> drivers/mmc/core/mmc.c | 32 ++++++++++++++++++++++++++++++++
> drivers/mmc/host/dw_mmc.c | 30 ------------------------------
> drivers/mmc/host/sdhci-msm.c | 38 ++++----------------------------------
> include/linux/mmc/mmc.h | 5 +++++
> 4 files changed, 41 insertions(+), 64 deletions(-)
>
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index 793c6f7ddb04..9608cc8a1f65 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -1135,6 +1135,38 @@ bus_speed:
> return err;
> }
>
> +const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = {
> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> +};
> +EXPORT_SYMBOL(tuning_blk_pattern_4bit);
> +
> +const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = {
> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> +};
> +EXPORT_SYMBOL(tuning_blk_pattern_8bit);
> +
> /*
> * Execute tuning sequence to seek the proper bus operating
> * conditions for HS200 and HS400, which sends CMD21 to the device.
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 1ac227c603b7..f1cefdf5e2d0 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -81,36 +81,6 @@ struct idmac_desc {
> };
> #endif /* CONFIG_MMC_DW_IDMAC */
>
> -static const u8 tuning_blk_pattern_4bit[] = {
> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> -};
> -
> -static const u8 tuning_blk_pattern_8bit[] = {
> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> -};
> -
> static inline bool dw_mci_fifo_reset(struct dw_mci *host);
> static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 5aabffc15ae8..da74c77f34cc 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -47,36 +47,6 @@
> #define CMUX_SHIFT_PHASE_SHIFT 24
> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>
> -static const u8 tuning_block_64[] = {
> - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> -};
> -
> -static const u8 tuning_block_128[] = {
> - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> -};
> -
> struct sdhci_msm_host {
> struct platform_device *pdev;
> void __iomem *core_mem; /* MSM SDCC mapped address */
> @@ -371,8 +341,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
> {
> int tuning_seq_cnt = 3;
> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
> - const u8 *tuning_block_pattern = tuning_block_64;
> - int size = sizeof(tuning_block_64); /* Pattern size in bytes */
> + const u8 *tuning_block_pattern = tuning_blk_pattern_4bit;
> + int size = sizeof(tuning_blk_pattern_4bit);
> int rc;
> struct mmc_host *mmc = host->mmc;
> struct mmc_ios ios = host->mmc->ios;
> @@ -388,8 +358,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>
> if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) &&
> (mmc->ios.bus_width == MMC_BUS_WIDTH_8)) {
> - tuning_block_pattern = tuning_block_128;
> - size = sizeof(tuning_block_128);
> + tuning_block_pattern = tuning_blk_pattern_8bit;
> + size = sizeof(tuning_blk_pattern_8bit);
> }
>
> data_buf = kmalloc(size, GFP_KERNEL);
> diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
> index 64ec963ed347..cff1f2622061 100644
> --- a/include/linux/mmc/mmc.h
> +++ b/include/linux/mmc/mmc.h
> @@ -53,6 +53,11 @@
> #define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
> #define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
>
> +#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE 64
> +#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE 128
> +extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
> +extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
> +
> /* class 3 */
> #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-04 21:58 ` Jaehoon Chung
(?)
@ 2014-09-04 22:01 ` Stephen Boyd
-1 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-04 22:01 UTC (permalink / raw)
To: Jaehoon Chung
Cc: Ulf Hansson, linux-kernel, linux-arm-msm, linux-arm-kernel,
linux-mmc, Chris Ball, Georgi Djakov, Asutosh Das,
Venkat Gopalakrishnan
On 09/05, Jaehoon Chung wrote:
> On 09/05/2014 06:22 AM, Stephen Boyd wrote:
> > On 09/04/14 03:53, Ulf Hansson wrote:
> >> On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
> >>>
> >>> In dw-mmc.c, tuning_block values are same.
> >>> So I think we can move these value into generic header. how about?
> >> Actually, I believe these values comes from the eMMC specification?
> >> Shouldn't they be moved to the mmc core instead?
> >
> > That sounds like good consolidation, but can we do that in a follow-up
> > patch? This fixes the driver for me and I was hoping to make something
> > minimal to go back to stable trees.
>
> Sure, if my opinion is ok, i will do it after apply your patches.
>
Here's the patch
----8<----
From: Stephen Boyd <sboyd@codeaurora.org>
Subject: [PATCH] mmc: Consolidate emmc tuning blocks
The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
files. Move these into mmc.c so that they can be shared across
drivers.
Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/mmc/core/mmc.c | 32 ++++++++++++++++++++++++++++++++
drivers/mmc/host/dw_mmc.c | 30 ------------------------------
drivers/mmc/host/sdhci-msm.c | 38 ++++----------------------------------
include/linux/mmc/mmc.h | 5 +++++
4 files changed, 41 insertions(+), 64 deletions(-)
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 793c6f7ddb04..9608cc8a1f65 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1135,6 +1135,38 @@ bus_speed:
return err;
}
+const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = {
+ 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
+ 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
+ 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
+ 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
+ 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
+ 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
+ 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
+ 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
+};
+EXPORT_SYMBOL(tuning_blk_pattern_4bit);
+
+const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = {
+ 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
+ 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
+ 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
+ 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
+ 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
+ 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
+ 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
+ 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
+ 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
+ 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
+ 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
+ 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
+ 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
+ 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
+ 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
+ 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
+};
+EXPORT_SYMBOL(tuning_blk_pattern_8bit);
+
/*
* Execute tuning sequence to seek the proper bus operating
* conditions for HS200 and HS400, which sends CMD21 to the device.
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c603b7..f1cefdf5e2d0 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -81,36 +81,6 @@ struct idmac_desc {
};
#endif /* CONFIG_MMC_DW_IDMAC */
-static const u8 tuning_blk_pattern_4bit[] = {
- 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
- 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
- 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
- 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
- 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
- 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
- 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
- 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
-};
-
-static const u8 tuning_blk_pattern_8bit[] = {
- 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
- 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
- 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
- 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
- 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
- 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
- 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
- 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
- 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
- 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
- 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
- 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
- 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
- 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
- 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
- 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
-};
-
static inline bool dw_mci_fifo_reset(struct dw_mci *host);
static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 5aabffc15ae8..da74c77f34cc 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -47,36 +47,6 @@
#define CMUX_SHIFT_PHASE_SHIFT 24
#define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
-static const u8 tuning_block_64[] = {
- 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
- 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
- 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
- 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
- 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
- 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
- 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
- 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
-};
-
-static const u8 tuning_block_128[] = {
- 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
- 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
- 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
- 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
- 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
- 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
- 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
- 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
- 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
- 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
- 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
- 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
- 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
- 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
- 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
- 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
-};
-
struct sdhci_msm_host {
struct platform_device *pdev;
void __iomem *core_mem; /* MSM SDCC mapped address */
@@ -371,8 +341,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
{
int tuning_seq_cnt = 3;
u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
- const u8 *tuning_block_pattern = tuning_block_64;
- int size = sizeof(tuning_block_64); /* Pattern size in bytes */
+ const u8 *tuning_block_pattern = tuning_blk_pattern_4bit;
+ int size = sizeof(tuning_blk_pattern_4bit);
int rc;
struct mmc_host *mmc = host->mmc;
struct mmc_ios ios = host->mmc->ios;
@@ -388,8 +358,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) &&
(mmc->ios.bus_width == MMC_BUS_WIDTH_8)) {
- tuning_block_pattern = tuning_block_128;
- size = sizeof(tuning_block_128);
+ tuning_block_pattern = tuning_blk_pattern_8bit;
+ size = sizeof(tuning_blk_pattern_8bit);
}
data_buf = kmalloc(size, GFP_KERNEL);
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 64ec963ed347..cff1f2622061 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -53,6 +53,11 @@
#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
+#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE 64
+#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE 128
+extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
+extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
+
/* class 3 */
#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-04 22:01 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-04 22:01 UTC (permalink / raw)
To: Jaehoon Chung
Cc: Ulf Hansson, linux-kernel, linux-arm-msm, linux-arm-kernel,
linux-mmc, Chris Ball, Georgi Djakov, Asutosh Das,
Venkat Gopalakrishnan
On 09/05, Jaehoon Chung wrote:
> On 09/05/2014 06:22 AM, Stephen Boyd wrote:
> > On 09/04/14 03:53, Ulf Hansson wrote:
> >> On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
> >>>
> >>> In dw-mmc.c, tuning_block values are same.
> >>> So I think we can move these value into generic header. how about?
> >> Actually, I believe these values comes from the eMMC specification?
> >> Shouldn't they be moved to the mmc core instead?
> >
> > That sounds like good consolidation, but can we do that in a follow-up
> > patch? This fixes the driver for me and I was hoping to make something
> > minimal to go back to stable trees.
>
> Sure, if my opinion is ok, i will do it after apply your patches.
>
Here's the patch
----8<----
From: Stephen Boyd <sboyd@codeaurora.org>
Subject: [PATCH] mmc: Consolidate emmc tuning blocks
The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
files. Move these into mmc.c so that they can be shared across
drivers.
Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/mmc/core/mmc.c | 32 ++++++++++++++++++++++++++++++++
drivers/mmc/host/dw_mmc.c | 30 ------------------------------
drivers/mmc/host/sdhci-msm.c | 38 ++++----------------------------------
include/linux/mmc/mmc.h | 5 +++++
4 files changed, 41 insertions(+), 64 deletions(-)
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 793c6f7ddb04..9608cc8a1f65 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1135,6 +1135,38 @@ bus_speed:
return err;
}
+const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = {
+ 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
+ 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
+ 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
+ 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
+ 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
+ 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
+ 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
+ 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
+};
+EXPORT_SYMBOL(tuning_blk_pattern_4bit);
+
+const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = {
+ 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
+ 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
+ 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
+ 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
+ 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
+ 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
+ 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
+ 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
+ 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
+ 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
+ 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
+ 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
+ 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
+ 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
+ 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
+ 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
+};
+EXPORT_SYMBOL(tuning_blk_pattern_8bit);
+
/*
* Execute tuning sequence to seek the proper bus operating
* conditions for HS200 and HS400, which sends CMD21 to the device.
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c603b7..f1cefdf5e2d0 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -81,36 +81,6 @@ struct idmac_desc {
};
#endif /* CONFIG_MMC_DW_IDMAC */
-static const u8 tuning_blk_pattern_4bit[] = {
- 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
- 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
- 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
- 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
- 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
- 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
- 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
- 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
-};
-
-static const u8 tuning_blk_pattern_8bit[] = {
- 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
- 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
- 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
- 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
- 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
- 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
- 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
- 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
- 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
- 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
- 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
- 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
- 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
- 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
- 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
- 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
-};
-
static inline bool dw_mci_fifo_reset(struct dw_mci *host);
static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 5aabffc15ae8..da74c77f34cc 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -47,36 +47,6 @@
#define CMUX_SHIFT_PHASE_SHIFT 24
#define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
-static const u8 tuning_block_64[] = {
- 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
- 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
- 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
- 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
- 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
- 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
- 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
- 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
-};
-
-static const u8 tuning_block_128[] = {
- 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
- 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
- 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
- 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
- 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
- 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
- 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
- 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
- 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
- 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
- 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
- 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
- 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
- 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
- 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
- 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
-};
-
struct sdhci_msm_host {
struct platform_device *pdev;
void __iomem *core_mem; /* MSM SDCC mapped address */
@@ -371,8 +341,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
{
int tuning_seq_cnt = 3;
u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
- const u8 *tuning_block_pattern = tuning_block_64;
- int size = sizeof(tuning_block_64); /* Pattern size in bytes */
+ const u8 *tuning_block_pattern = tuning_blk_pattern_4bit;
+ int size = sizeof(tuning_blk_pattern_4bit);
int rc;
struct mmc_host *mmc = host->mmc;
struct mmc_ios ios = host->mmc->ios;
@@ -388,8 +358,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) &&
(mmc->ios.bus_width == MMC_BUS_WIDTH_8)) {
- tuning_block_pattern = tuning_block_128;
- size = sizeof(tuning_block_128);
+ tuning_block_pattern = tuning_blk_pattern_8bit;
+ size = sizeof(tuning_blk_pattern_8bit);
}
data_buf = kmalloc(size, GFP_KERNEL);
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 64ec963ed347..cff1f2622061 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -53,6 +53,11 @@
#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
+#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE 64
+#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE 128
+extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
+extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
+
/* class 3 */
#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-04 22:01 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-04 22:01 UTC (permalink / raw)
To: linux-arm-kernel
On 09/05, Jaehoon Chung wrote:
> On 09/05/2014 06:22 AM, Stephen Boyd wrote:
> > On 09/04/14 03:53, Ulf Hansson wrote:
> >> On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
> >>>
> >>> In dw-mmc.c, tuning_block values are same.
> >>> So I think we can move these value into generic header. how about?
> >> Actually, I believe these values comes from the eMMC specification?
> >> Shouldn't they be moved to the mmc core instead?
> >
> > That sounds like good consolidation, but can we do that in a follow-up
> > patch? This fixes the driver for me and I was hoping to make something
> > minimal to go back to stable trees.
>
> Sure, if my opinion is ok, i will do it after apply your patches.
>
Here's the patch
----8<----
From: Stephen Boyd <sboyd@codeaurora.org>
Subject: [PATCH] mmc: Consolidate emmc tuning blocks
The same tuning block array exists in the dw_mmc h.c and sdhci-msm.c
files. Move these into mmc.c so that they can be shared across
drivers.
Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/mmc/core/mmc.c | 32 ++++++++++++++++++++++++++++++++
drivers/mmc/host/dw_mmc.c | 30 ------------------------------
drivers/mmc/host/sdhci-msm.c | 38 ++++----------------------------------
include/linux/mmc/mmc.h | 5 +++++
4 files changed, 41 insertions(+), 64 deletions(-)
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 793c6f7ddb04..9608cc8a1f65 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1135,6 +1135,38 @@ bus_speed:
return err;
}
+const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = {
+ 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
+ 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
+ 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
+ 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
+ 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
+ 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
+ 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
+ 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
+};
+EXPORT_SYMBOL(tuning_blk_pattern_4bit);
+
+const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = {
+ 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
+ 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
+ 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
+ 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
+ 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
+ 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
+ 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
+ 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
+ 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
+ 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
+ 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
+ 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
+ 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
+ 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
+ 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
+ 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
+};
+EXPORT_SYMBOL(tuning_blk_pattern_8bit);
+
/*
* Execute tuning sequence to seek the proper bus operating
* conditions for HS200 and HS400, which sends CMD21 to the device.
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c603b7..f1cefdf5e2d0 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -81,36 +81,6 @@ struct idmac_desc {
};
#endif /* CONFIG_MMC_DW_IDMAC */
-static const u8 tuning_blk_pattern_4bit[] = {
- 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
- 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
- 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
- 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
- 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
- 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
- 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
- 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
-};
-
-static const u8 tuning_blk_pattern_8bit[] = {
- 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
- 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
- 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
- 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
- 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
- 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
- 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
- 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
- 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
- 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
- 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
- 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
- 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
- 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
- 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
- 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
-};
-
static inline bool dw_mci_fifo_reset(struct dw_mci *host);
static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 5aabffc15ae8..da74c77f34cc 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -47,36 +47,6 @@
#define CMUX_SHIFT_PHASE_SHIFT 24
#define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
-static const u8 tuning_block_64[] = {
- 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
- 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
- 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
- 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
- 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
- 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
- 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
- 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
-};
-
-static const u8 tuning_block_128[] = {
- 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
- 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
- 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
- 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
- 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
- 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
- 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
- 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
- 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
- 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
- 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
- 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
- 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
- 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
- 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
- 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
-};
-
struct sdhci_msm_host {
struct platform_device *pdev;
void __iomem *core_mem; /* MSM SDCC mapped address */
@@ -371,8 +341,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
{
int tuning_seq_cnt = 3;
u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
- const u8 *tuning_block_pattern = tuning_block_64;
- int size = sizeof(tuning_block_64); /* Pattern size in bytes */
+ const u8 *tuning_block_pattern = tuning_blk_pattern_4bit;
+ int size = sizeof(tuning_blk_pattern_4bit);
int rc;
struct mmc_host *mmc = host->mmc;
struct mmc_ios ios = host->mmc->ios;
@@ -388,8 +358,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) &&
(mmc->ios.bus_width == MMC_BUS_WIDTH_8)) {
- tuning_block_pattern = tuning_block_128;
- size = sizeof(tuning_block_128);
+ tuning_block_pattern = tuning_blk_pattern_8bit;
+ size = sizeof(tuning_blk_pattern_8bit);
}
data_buf = kmalloc(size, GFP_KERNEL);
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 64ec963ed347..cff1f2622061 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -53,6 +53,11 @@
#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
+#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE 64
+#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE 128
+extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
+extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
+
/* class 3 */
#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-04 21:22 ` Stephen Boyd
(?)
@ 2014-09-04 21:58 ` Jaehoon Chung
-1 siblings, 0 replies; 35+ messages in thread
From: Jaehoon Chung @ 2014-09-04 21:58 UTC (permalink / raw)
To: Stephen Boyd, Ulf Hansson
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, linux-mmc,
Chris Ball, Georgi Djakov, Asutosh Das, Venkat Gopalakrishnan
On 09/05/2014 06:22 AM, Stephen Boyd wrote:
> On 09/04/14 03:53, Ulf Hansson wrote:
>> On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
>>>
>>> In dw-mmc.c, tuning_block values are same.
>>> So I think we can move these value into generic header. how about?
>> Actually, I believe these values comes from the eMMC specification?
>> Shouldn't they be moved to the mmc core instead?
>
> That sounds like good consolidation, but can we do that in a follow-up
> patch? This fixes the driver for me and I was hoping to make something
> minimal to go back to stable trees.
Sure, if my opinion is ok, i will do it after apply your patches.
Best Regards,
Jaehoon Chung
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-04 21:58 ` Jaehoon Chung
0 siblings, 0 replies; 35+ messages in thread
From: Jaehoon Chung @ 2014-09-04 21:58 UTC (permalink / raw)
To: Stephen Boyd, Ulf Hansson
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, linux-mmc,
Chris Ball, Georgi Djakov, Asutosh Das, Venkat Gopalakrishnan
On 09/05/2014 06:22 AM, Stephen Boyd wrote:
> On 09/04/14 03:53, Ulf Hansson wrote:
>> On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
>>>
>>> In dw-mmc.c, tuning_block values are same.
>>> So I think we can move these value into generic header. how about?
>> Actually, I believe these values comes from the eMMC specification?
>> Shouldn't they be moved to the mmc core instead?
>
> That sounds like good consolidation, but can we do that in a follow-up
> patch? This fixes the driver for me and I was hoping to make something
> minimal to go back to stable trees.
Sure, if my opinion is ok, i will do it after apply your patches.
Best Regards,
Jaehoon Chung
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-04 21:58 ` Jaehoon Chung
0 siblings, 0 replies; 35+ messages in thread
From: Jaehoon Chung @ 2014-09-04 21:58 UTC (permalink / raw)
To: linux-arm-kernel
On 09/05/2014 06:22 AM, Stephen Boyd wrote:
> On 09/04/14 03:53, Ulf Hansson wrote:
>> On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
>>>
>>> In dw-mmc.c, tuning_block values are same.
>>> So I think we can move these value into generic header. how about?
>> Actually, I believe these values comes from the eMMC specification?
>> Shouldn't they be moved to the mmc core instead?
>
> That sounds like good consolidation, but can we do that in a follow-up
> patch? This fixes the driver for me and I was hoping to make something
> minimal to go back to stable trees.
Sure, if my opinion is ok, i will do it after apply your patches.
Best Regards,
Jaehoon Chung
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-04 10:53 ` Ulf Hansson
(?)
@ 2014-09-04 21:22 ` Stephen Boyd
-1 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-04 21:22 UTC (permalink / raw)
To: Ulf Hansson, Jaehoon Chung
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, linux-mmc,
Chris Ball, Georgi Djakov, Asutosh Das, Venkat Gopalakrishnan
On 09/04/14 03:53, Ulf Hansson wrote:
> On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
>>
>> In dw-mmc.c, tuning_block values are same.
>> So I think we can move these value into generic header. how about?
> Actually, I believe these values comes from the eMMC specification?
> Shouldn't they be moved to the mmc core instead?
That sounds like good consolidation, but can we do that in a follow-up
patch? This fixes the driver for me and I was hoping to make something
minimal to go back to stable trees.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-04 21:22 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-04 21:22 UTC (permalink / raw)
To: Ulf Hansson, Jaehoon Chung
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, linux-mmc,
Chris Ball, Georgi Djakov, Asutosh Das, Venkat Gopalakrishnan
On 09/04/14 03:53, Ulf Hansson wrote:
> On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
>>
>> In dw-mmc.c, tuning_block values are same.
>> So I think we can move these value into generic header. how about?
> Actually, I believe these values comes from the eMMC specification?
> Shouldn't they be moved to the mmc core instead?
That sounds like good consolidation, but can we do that in a follow-up
patch? This fixes the driver for me and I was hoping to make something
minimal to go back to stable trees.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-04 21:22 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-04 21:22 UTC (permalink / raw)
To: linux-arm-kernel
On 09/04/14 03:53, Ulf Hansson wrote:
> On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
>>
>> In dw-mmc.c, tuning_block values are same.
>> So I think we can move these value into generic header. how about?
> Actually, I believe these values comes from the eMMC specification?
> Shouldn't they be moved to the mmc core instead?
That sounds like good consolidation, but can we do that in a follow-up
patch? This fixes the driver for me and I was hoping to make something
minimal to go back to stable trees.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-04 5:06 ` Jaehoon Chung
(?)
@ 2014-09-04 10:53 ` Ulf Hansson
-1 siblings, 0 replies; 35+ messages in thread
From: Ulf Hansson @ 2014-09-04 10:53 UTC (permalink / raw)
To: Jaehoon Chung
Cc: Stephen Boyd, linux-kernel, linux-arm-msm, linux-arm-kernel,
linux-mmc, Chris Ball, Georgi Djakov, Asutosh Das,
Venkat Gopalakrishnan
On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
> Hi, Stephen.
>
> On 09/03/2014 10:57 PM, Stephen Boyd wrote:
>> If we're tuning on a big-endian CPU we'll never determine we properly
>> tuned the device because we compare the data we received from the
>> controller with a table that assumes the CPU is little-endian.
>> Change the table to be an array of bytes instead of 32-bit words
>> so we can use memcmp() without needing to byte-swap every word
>> depending on the endianess of the CPU.
>>
>> Cc: Asutosh Das <asutoshd@codeaurora.org>
>> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
>> Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com>
>> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>> ---
>> drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
>> 1 file changed, 27 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
>> index 40573a58486a..5aabffc15ae8 100644
>> --- a/drivers/mmc/host/sdhci-msm.c
>> +++ b/drivers/mmc/host/sdhci-msm.c
>> @@ -47,22 +47,34 @@
>> #define CMUX_SHIFT_PHASE_SHIFT 24
>> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>>
>> -static const u32 tuning_block_64[] = {
>> - 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
>> - 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
>> - 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
>> - 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
>> +static const u8 tuning_block_64[] = {
>> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> };
>>
>> -static const u32 tuning_block_128[] = {
>> - 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
>> - 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
>> - 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
>> - 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
>> - 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
>> - 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
>> - 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
>> - 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
>> +static const u8 tuning_block_128[] = {
>> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> };
> In dw-mmc.c, tuning_block values are same.
> So I think we can move these value into generic header. how about?
Actually, I believe these values comes from the eMMC specification?
Shouldn't they be moved to the mmc core instead?
Kind regards
Uffe
>
> Best Regards,
> Jaehoon Chung
>
>>
>> struct sdhci_msm_host {
>> @@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>> {
>> int tuning_seq_cnt = 3;
>> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
>> - const u32 *tuning_block_pattern = tuning_block_64;
>> + const u8 *tuning_block_pattern = tuning_block_64;
>> int size = sizeof(tuning_block_64); /* Pattern size in bytes */
>> int rc;
>> struct mmc_host *mmc = host->mmc;
>>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-04 10:53 ` Ulf Hansson
0 siblings, 0 replies; 35+ messages in thread
From: Ulf Hansson @ 2014-09-04 10:53 UTC (permalink / raw)
To: Jaehoon Chung
Cc: Stephen Boyd, linux-kernel, linux-arm-msm, linux-arm-kernel,
linux-mmc, Chris Ball, Georgi Djakov, Asutosh Das,
Venkat Gopalakrishnan
On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
> Hi, Stephen.
>
> On 09/03/2014 10:57 PM, Stephen Boyd wrote:
>> If we're tuning on a big-endian CPU we'll never determine we properly
>> tuned the device because we compare the data we received from the
>> controller with a table that assumes the CPU is little-endian.
>> Change the table to be an array of bytes instead of 32-bit words
>> so we can use memcmp() without needing to byte-swap every word
>> depending on the endianess of the CPU.
>>
>> Cc: Asutosh Das <asutoshd@codeaurora.org>
>> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
>> Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com>
>> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>> ---
>> drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
>> 1 file changed, 27 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
>> index 40573a58486a..5aabffc15ae8 100644
>> --- a/drivers/mmc/host/sdhci-msm.c
>> +++ b/drivers/mmc/host/sdhci-msm.c
>> @@ -47,22 +47,34 @@
>> #define CMUX_SHIFT_PHASE_SHIFT 24
>> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>>
>> -static const u32 tuning_block_64[] = {
>> - 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
>> - 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
>> - 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
>> - 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
>> +static const u8 tuning_block_64[] = {
>> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> };
>>
>> -static const u32 tuning_block_128[] = {
>> - 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
>> - 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
>> - 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
>> - 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
>> - 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
>> - 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
>> - 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
>> - 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
>> +static const u8 tuning_block_128[] = {
>> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> };
> In dw-mmc.c, tuning_block values are same.
> So I think we can move these value into generic header. how about?
Actually, I believe these values comes from the eMMC specification?
Shouldn't they be moved to the mmc core instead?
Kind regards
Uffe
>
> Best Regards,
> Jaehoon Chung
>
>>
>> struct sdhci_msm_host {
>> @@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>> {
>> int tuning_seq_cnt = 3;
>> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
>> - const u32 *tuning_block_pattern = tuning_block_64;
>> + const u8 *tuning_block_pattern = tuning_block_64;
>> int size = sizeof(tuning_block_64); /* Pattern size in bytes */
>> int rc;
>> struct mmc_host *mmc = host->mmc;
>>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-04 10:53 ` Ulf Hansson
0 siblings, 0 replies; 35+ messages in thread
From: Ulf Hansson @ 2014-09-04 10:53 UTC (permalink / raw)
To: linux-arm-kernel
On 4 September 2014 07:06, Jaehoon Chung <jh80.chung@samsung.com> wrote:
> Hi, Stephen.
>
> On 09/03/2014 10:57 PM, Stephen Boyd wrote:
>> If we're tuning on a big-endian CPU we'll never determine we properly
>> tuned the device because we compare the data we received from the
>> controller with a table that assumes the CPU is little-endian.
>> Change the table to be an array of bytes instead of 32-bit words
>> so we can use memcmp() without needing to byte-swap every word
>> depending on the endianess of the CPU.
>>
>> Cc: Asutosh Das <asutoshd@codeaurora.org>
>> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
>> Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com>
>> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>> ---
>> drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
>> 1 file changed, 27 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
>> index 40573a58486a..5aabffc15ae8 100644
>> --- a/drivers/mmc/host/sdhci-msm.c
>> +++ b/drivers/mmc/host/sdhci-msm.c
>> @@ -47,22 +47,34 @@
>> #define CMUX_SHIFT_PHASE_SHIFT 24
>> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>>
>> -static const u32 tuning_block_64[] = {
>> - 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
>> - 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
>> - 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
>> - 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
>> +static const u8 tuning_block_64[] = {
>> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
>> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
>> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
>> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
>> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
>> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
>> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
>> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
>> };
>>
>> -static const u32 tuning_block_128[] = {
>> - 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
>> - 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
>> - 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
>> - 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
>> - 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
>> - 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
>> - 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
>> - 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
>> +static const u8 tuning_block_128[] = {
>> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
>> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
>> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
>> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
>> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
>> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
>> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
>> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
>> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
>> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
>> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
>> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
>> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
>> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
>> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
>> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
>> };
> In dw-mmc.c, tuning_block values are same.
> So I think we can move these value into generic header. how about?
Actually, I believe these values comes from the eMMC specification?
Shouldn't they be moved to the mmc core instead?
Kind regards
Uffe
>
> Best Regards,
> Jaehoon Chung
>
>>
>> struct sdhci_msm_host {
>> @@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>> {
>> int tuning_seq_cnt = 3;
>> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
>> - const u32 *tuning_block_pattern = tuning_block_64;
>> + const u8 *tuning_block_pattern = tuning_block_64;
>> int size = sizeof(tuning_block_64); /* Pattern size in bytes */
>> int rc;
>> struct mmc_host *mmc = host->mmc;
>>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
2014-09-03 13:57 ` Stephen Boyd
@ 2014-09-04 5:06 ` Jaehoon Chung
-1 siblings, 0 replies; 35+ messages in thread
From: Jaehoon Chung @ 2014-09-04 5:06 UTC (permalink / raw)
To: Stephen Boyd, Ulf Hansson
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, linux-mmc,
Chris Ball, Georgi Djakov, Asutosh Das, Venkat Gopalakrishnan
Hi, Stephen.
On 09/03/2014 10:57 PM, Stephen Boyd wrote:
> If we're tuning on a big-endian CPU we'll never determine we properly
> tuned the device because we compare the data we received from the
> controller with a table that assumes the CPU is little-endian.
> Change the table to be an array of bytes instead of 32-bit words
> so we can use memcmp() without needing to byte-swap every word
> depending on the endianess of the CPU.
>
> Cc: Asutosh Das <asutoshd@codeaurora.org>
> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
> Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com>
> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
> drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
> 1 file changed, 27 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 40573a58486a..5aabffc15ae8 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -47,22 +47,34 @@
> #define CMUX_SHIFT_PHASE_SHIFT 24
> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>
> -static const u32 tuning_block_64[] = {
> - 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
> - 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
> - 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
> - 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
> +static const u8 tuning_block_64[] = {
> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> };
>
> -static const u32 tuning_block_128[] = {
> - 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
> - 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
> - 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
> - 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
> - 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
> - 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
> - 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
> - 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
> +static const u8 tuning_block_128[] = {
> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> };
In dw-mmc.c, tuning_block values are same.
So I think we can move these value into generic header. how about?
Best Regards,
Jaehoon Chung
>
> struct sdhci_msm_host {
> @@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
> {
> int tuning_seq_cnt = 3;
> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
> - const u32 *tuning_block_pattern = tuning_block_64;
> + const u8 *tuning_block_pattern = tuning_block_64;
> int size = sizeof(tuning_block_64); /* Pattern size in bytes */
> int rc;
> struct mmc_host *mmc = host->mmc;
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-04 5:06 ` Jaehoon Chung
0 siblings, 0 replies; 35+ messages in thread
From: Jaehoon Chung @ 2014-09-04 5:06 UTC (permalink / raw)
To: linux-arm-kernel
Hi, Stephen.
On 09/03/2014 10:57 PM, Stephen Boyd wrote:
> If we're tuning on a big-endian CPU we'll never determine we properly
> tuned the device because we compare the data we received from the
> controller with a table that assumes the CPU is little-endian.
> Change the table to be an array of bytes instead of 32-bit words
> so we can use memcmp() without needing to byte-swap every word
> depending on the endianess of the CPU.
>
> Cc: Asutosh Das <asutoshd@codeaurora.org>
> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
> Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com>
> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
> drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
> 1 file changed, 27 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 40573a58486a..5aabffc15ae8 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -47,22 +47,34 @@
> #define CMUX_SHIFT_PHASE_SHIFT 24
> #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
>
> -static const u32 tuning_block_64[] = {
> - 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
> - 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
> - 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
> - 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
> +static const u8 tuning_block_64[] = {
> + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
> + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
> + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
> + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
> + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
> + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
> + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
> + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
> };
>
> -static const u32 tuning_block_128[] = {
> - 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
> - 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
> - 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
> - 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
> - 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
> - 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
> - 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
> - 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
> +static const u8 tuning_block_128[] = {
> + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
> + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
> + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
> + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
> + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
> + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
> + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
> + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
> + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
> + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
> + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
> + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
> + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
> + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
> + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
> + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
> };
In dw-mmc.c, tuning_block values are same.
So I think we can move these value into generic header. how about?
Best Regards,
Jaehoon Chung
>
> struct sdhci_msm_host {
> @@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
> {
> int tuning_seq_cnt = 3;
> u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
> - const u32 *tuning_block_pattern = tuning_block_64;
> + const u8 *tuning_block_pattern = tuning_block_64;
> int size = sizeof(tuning_block_64); /* Pattern size in bytes */
> int rc;
> struct mmc_host *mmc = host->mmc;
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-03 13:57 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-03 13:57 UTC (permalink / raw)
To: Ulf Hansson
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, linux-mmc,
Chris Ball, Georgi Djakov, Asutosh Das, Venkat Gopalakrishnan
If we're tuning on a big-endian CPU we'll never determine we properly
tuned the device because we compare the data we received from the
controller with a table that assumes the CPU is little-endian.
Change the table to be an array of bytes instead of 32-bit words
so we can use memcmp() without needing to byte-swap every word
depending on the endianess of the CPU.
Cc: Asutosh Das <asutoshd@codeaurora.org>
Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com>
Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
1 file changed, 27 insertions(+), 15 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 40573a58486a..5aabffc15ae8 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -47,22 +47,34 @@
#define CMUX_SHIFT_PHASE_SHIFT 24
#define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
-static const u32 tuning_block_64[] = {
- 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
- 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
- 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
- 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
+static const u8 tuning_block_64[] = {
+ 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
+ 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
+ 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
+ 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
+ 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
+ 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
+ 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
+ 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
};
-static const u32 tuning_block_128[] = {
- 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
- 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
- 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
- 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
- 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
- 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
- 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
- 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
+static const u8 tuning_block_128[] = {
+ 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
+ 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
+ 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
+ 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
+ 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
+ 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
+ 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
+ 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
+ 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
+ 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
+ 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
+ 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
+ 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
+ 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
+ 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
+ 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
};
struct sdhci_msm_host {
@@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
{
int tuning_seq_cnt = 3;
u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
- const u32 *tuning_block_pattern = tuning_block_64;
+ const u8 *tuning_block_pattern = tuning_block_64;
int size = sizeof(tuning_block_64); /* Pattern size in bytes */
int rc;
struct mmc_host *mmc = host->mmc;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic
@ 2014-09-03 13:57 ` Stephen Boyd
0 siblings, 0 replies; 35+ messages in thread
From: Stephen Boyd @ 2014-09-03 13:57 UTC (permalink / raw)
To: linux-arm-kernel
If we're tuning on a big-endian CPU we'll never determine we properly
tuned the device because we compare the data we received from the
controller with a table that assumes the CPU is little-endian.
Change the table to be an array of bytes instead of 32-bit words
so we can use memcmp() without needing to byte-swap every word
depending on the endianess of the CPU.
Cc: Asutosh Das <asutoshd@codeaurora.org>
Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com>
Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/mmc/host/sdhci-msm.c | 42 +++++++++++++++++++++++++++---------------
1 file changed, 27 insertions(+), 15 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 40573a58486a..5aabffc15ae8 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -47,22 +47,34 @@
#define CMUX_SHIFT_PHASE_SHIFT 24
#define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT)
-static const u32 tuning_block_64[] = {
- 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe,
- 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777,
- 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff,
- 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7
+static const u8 tuning_block_64[] = {
+ 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
+ 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
+ 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
+ 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
+ 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
+ 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
+ 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
+ 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
};
-static const u32 tuning_block_128[] = {
- 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc,
- 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff,
- 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff,
- 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb,
- 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc,
- 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff,
- 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb,
- 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77
+static const u8 tuning_block_128[] = {
+ 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
+ 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
+ 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
+ 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
+ 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
+ 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
+ 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
+ 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
+ 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
+ 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
+ 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
+ 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
+ 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
+ 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
+ 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
+ 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
};
struct sdhci_msm_host {
@@ -359,7 +371,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
{
int tuning_seq_cnt = 3;
u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0;
- const u32 *tuning_block_pattern = tuning_block_64;
+ const u8 *tuning_block_pattern = tuning_block_64;
int size = sizeof(tuning_block_64); /* Pattern size in bytes */
int rc;
struct mmc_host *mmc = host->mmc;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 35+ messages in thread
end of thread, other threads:[~2014-09-17 22:57 UTC | newest]
Thread overview: 35+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-09-02 23:58 [PATCH] mmc: sdhci-msm: Make tuning block table endian agnostic Stephen Boyd
2014-09-02 23:58 ` Stephen Boyd
2014-09-03 8:36 ` Ulf Hansson
2014-09-03 8:36 ` Ulf Hansson
2014-09-03 8:36 ` Ulf Hansson
2014-09-03 13:37 ` Stephen Boyd
2014-09-03 13:37 ` Stephen Boyd
2014-09-03 13:37 ` Stephen Boyd
2014-09-03 11:57 ` Georgi Djakov
2014-09-03 11:57 ` Georgi Djakov
2014-09-03 13:57 Stephen Boyd
2014-09-03 13:57 ` Stephen Boyd
2014-09-04 5:06 ` Jaehoon Chung
2014-09-04 5:06 ` Jaehoon Chung
2014-09-04 10:53 ` Ulf Hansson
2014-09-04 10:53 ` Ulf Hansson
2014-09-04 10:53 ` Ulf Hansson
2014-09-04 21:22 ` Stephen Boyd
2014-09-04 21:22 ` Stephen Boyd
2014-09-04 21:22 ` Stephen Boyd
2014-09-04 21:58 ` Jaehoon Chung
2014-09-04 21:58 ` Jaehoon Chung
2014-09-04 21:58 ` Jaehoon Chung
2014-09-04 22:01 ` Stephen Boyd
2014-09-04 22:01 ` Stephen Boyd
2014-09-04 22:01 ` Stephen Boyd
2014-09-15 21:45 ` Stephen Boyd
2014-09-15 21:45 ` Stephen Boyd
2014-09-15 21:45 ` Stephen Boyd
2014-09-17 22:36 ` Ulf Hansson
2014-09-17 22:36 ` Ulf Hansson
2014-09-17 22:36 ` Ulf Hansson
2014-09-17 22:57 ` Stephen Boyd
2014-09-17 22:57 ` Stephen Boyd
2014-09-17 22:57 ` Stephen Boyd
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