From: Felipe Balbi <balbi@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: devicetree@vger.kernel.org, Jack Pham <jackp@codeaurora.org>,
linux-usb@vger.kernel.org,
Bjorn Andersson <bjorn.andersson@sonymobile.com>,
linux-arm-msm@vger.kernel.org, Kumar Gala <galak@codeaurora.org>,
linux-kernel@vger.kernel.org, Felipe Balbi <balbi@ti.com>,
"Ivan T. Ivanov" <iivanov@mm-sol.com>,
Andy Gross <agross@codeaurora.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [Patch v9 3/3] phy: Add Qualcomm DWC3 HS/SS PHY driver
Date: Sat, 13 Sep 2014 21:24:52 -0500 [thread overview]
Message-ID: <20140914022452.GA16652@saruman.home> (raw)
In-Reply-To: <5413E829.8020804@ti.com>
[-- Attachment #1.1: Type: text/plain, Size: 1233 bytes --]
Hi,
On Sat, Sep 13, 2014 at 12:16:01PM +0530, Kishon Vijay Abraham I wrote:
> On Saturday 13 September 2014 12:58 AM, Andy Gross wrote:
> > This patch adds a new driver for the Qualcomm USB 3.0 PHY that exists on some
> > Qualcomm platforms. This driver uses the generic PHY framework and will
> > interact with the DWC3 controller.
>
> Do you have dt documentation for this driver?
see patch 1
> > +static inline void qcom_dwc3_phy_write_readback(
> > + struct qcom_dwc3_usb_phy *phy_dwc3, u32 offset,
> > + const u32 mask, u32 val)
> > +{
> > + u32 write_val, tmp = readl(phy_dwc3->base + offset);
> > +
> > + tmp &= ~mask; /* retain other bits */
> > + write_val = tmp | val;
> > +
> > + writel(write_val, phy_dwc3->base + offset);
> > +
> > + /* Read back to see if val was written */
>
> Does it fail sometime? I'm not sure if this should be present in the
> driver since this looks more of a debug code.
this was mentioned before. Silicon bug.
> > + writel_relaxed(data | SSUSB_CTRL_SS_PHY_RESET,
> > + phy_dwc3->base + SSUSB_PHY_CTRL_REG);
> > + usleep_range(2000, 2200);
>
> use msleep here..
why ? usleep_range() gives the scheduler oportunity to group timers.
--
balbi
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WARNING: multiple messages have this Message-ID (diff)
From: Felipe Balbi <balbi@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Andy Gross <agross@codeaurora.org>, Felipe Balbi <balbi@ti.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Jack Pham <jackp@codeaurora.org>,
Kumar Gala <galak@codeaurora.org>,
<linux-arm-msm@vger.kernel.org>, <linux-usb@vger.kernel.org>,
"Ivan T. Ivanov" <iivanov@mm-sol.com>,
Bjorn Andersson <bjorn.andersson@sonymobile.com>
Subject: Re: [Patch v9 3/3] phy: Add Qualcomm DWC3 HS/SS PHY driver
Date: Sat, 13 Sep 2014 21:24:52 -0500 [thread overview]
Message-ID: <20140914022452.GA16652@saruman.home> (raw)
In-Reply-To: <5413E829.8020804@ti.com>
[-- Attachment #1: Type: text/plain, Size: 1233 bytes --]
Hi,
On Sat, Sep 13, 2014 at 12:16:01PM +0530, Kishon Vijay Abraham I wrote:
> On Saturday 13 September 2014 12:58 AM, Andy Gross wrote:
> > This patch adds a new driver for the Qualcomm USB 3.0 PHY that exists on some
> > Qualcomm platforms. This driver uses the generic PHY framework and will
> > interact with the DWC3 controller.
>
> Do you have dt documentation for this driver?
see patch 1
> > +static inline void qcom_dwc3_phy_write_readback(
> > + struct qcom_dwc3_usb_phy *phy_dwc3, u32 offset,
> > + const u32 mask, u32 val)
> > +{
> > + u32 write_val, tmp = readl(phy_dwc3->base + offset);
> > +
> > + tmp &= ~mask; /* retain other bits */
> > + write_val = tmp | val;
> > +
> > + writel(write_val, phy_dwc3->base + offset);
> > +
> > + /* Read back to see if val was written */
>
> Does it fail sometime? I'm not sure if this should be present in the
> driver since this looks more of a debug code.
this was mentioned before. Silicon bug.
> > + writel_relaxed(data | SSUSB_CTRL_SS_PHY_RESET,
> > + phy_dwc3->base + SSUSB_PHY_CTRL_REG);
> > + usleep_range(2000, 2200);
>
> use msleep here..
why ? usleep_range() gives the scheduler oportunity to group timers.
--
balbi
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WARNING: multiple messages have this Message-ID (diff)
From: balbi@ti.com (Felipe Balbi)
To: linux-arm-kernel@lists.infradead.org
Subject: [Patch v9 3/3] phy: Add Qualcomm DWC3 HS/SS PHY driver
Date: Sat, 13 Sep 2014 21:24:52 -0500 [thread overview]
Message-ID: <20140914022452.GA16652@saruman.home> (raw)
In-Reply-To: <5413E829.8020804@ti.com>
Hi,
On Sat, Sep 13, 2014 at 12:16:01PM +0530, Kishon Vijay Abraham I wrote:
> On Saturday 13 September 2014 12:58 AM, Andy Gross wrote:
> > This patch adds a new driver for the Qualcomm USB 3.0 PHY that exists on some
> > Qualcomm platforms. This driver uses the generic PHY framework and will
> > interact with the DWC3 controller.
>
> Do you have dt documentation for this driver?
see patch 1
> > +static inline void qcom_dwc3_phy_write_readback(
> > + struct qcom_dwc3_usb_phy *phy_dwc3, u32 offset,
> > + const u32 mask, u32 val)
> > +{
> > + u32 write_val, tmp = readl(phy_dwc3->base + offset);
> > +
> > + tmp &= ~mask; /* retain other bits */
> > + write_val = tmp | val;
> > +
> > + writel(write_val, phy_dwc3->base + offset);
> > +
> > + /* Read back to see if val was written */
>
> Does it fail sometime? I'm not sure if this should be present in the
> driver since this looks more of a debug code.
this was mentioned before. Silicon bug.
> > + writel_relaxed(data | SSUSB_CTRL_SS_PHY_RESET,
> > + phy_dwc3->base + SSUSB_PHY_CTRL_REG);
> > + usleep_range(2000, 2200);
>
> use msleep here..
why ? usleep_range() gives the scheduler oportunity to group timers.
--
balbi
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next prev parent reply other threads:[~2014-09-14 2:24 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-12 19:28 [Patch v9 0/3] DWC3 USB support for Qualcomm platform Andy Gross
2014-09-12 19:28 ` Andy Gross
2014-09-12 19:28 ` Andy Gross
2014-09-12 19:28 ` [Patch v9 1/3] usb: dwc3: qcom: Add device tree binding Andy Gross
2014-09-12 19:28 ` Andy Gross
2014-09-12 19:28 ` Andy Gross
2014-09-16 18:15 ` Jack Pham
2014-09-16 18:15 ` Jack Pham
2014-09-16 18:29 ` Felipe Balbi
2014-09-16 18:29 ` Felipe Balbi
2014-09-16 18:29 ` Felipe Balbi
2014-09-12 19:28 ` [Patch v9 2/3] usb: dwc3: Add Qualcomm DWC3 glue layer driver Andy Gross
2014-09-12 19:28 ` Andy Gross
[not found] ` <CAMf-jSm2fPPstFD2h4-gG=MCDty34f-O0ooizDEKyQUd3+CxGQ@mail.gmail.com>
2014-09-12 20:20 ` Felipe Balbi
2014-09-12 20:20 ` Felipe Balbi
2014-09-12 20:20 ` Felipe Balbi
2014-09-12 20:25 ` Pramod Gurav
2014-09-12 20:25 ` Pramod Gurav
2014-09-12 20:25 ` Pramod Gurav
2014-09-12 20:29 ` Felipe Balbi
2014-09-12 20:29 ` Felipe Balbi
2014-09-12 20:29 ` Felipe Balbi
[not found] ` <20140912202942.GC25500-HgARHv6XitL9zxVx7UNMDg@public.gmane.org>
2014-09-12 20:33 ` Pramod Gurav
2014-09-12 20:33 ` Pramod Gurav
2014-09-12 20:33 ` Pramod Gurav
2014-09-12 19:28 ` [Patch v9 3/3] phy: Add Qualcomm DWC3 HS/SS PHY driver Andy Gross
2014-09-12 19:28 ` Andy Gross
2014-09-13 6:46 ` Kishon Vijay Abraham I
2014-09-13 6:46 ` Kishon Vijay Abraham I
2014-09-13 6:46 ` Kishon Vijay Abraham I
2014-09-14 2:24 ` Felipe Balbi [this message]
2014-09-14 2:24 ` Felipe Balbi
2014-09-14 2:24 ` Felipe Balbi
2014-09-15 6:37 ` Kishon Vijay Abraham I
2014-09-15 6:37 ` Kishon Vijay Abraham I
2014-09-15 6:37 ` Kishon Vijay Abraham I
2014-09-16 18:27 ` Jack Pham
2014-09-16 18:27 ` Jack Pham
[not found] ` <20140916182752.GB19101-NjF/qFWh7jSrUKQWM4GlyCPyLMyjRtWwAL8bYrjMMd8@public.gmane.org>
2014-09-16 20:39 ` Andy Gross
2014-09-16 20:39 ` Andy Gross
2014-09-16 20:39 ` Andy Gross
[not found] ` <1410550088-8754-4-git-send-email-agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-01-22 18:59 ` Jack Pham
2015-01-22 18:59 ` Jack Pham
2015-01-22 18:59 ` Jack Pham
2015-01-22 21:44 ` Andy Gross
2015-01-22 21:44 ` Andy Gross
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