From: Jack Pham <jackp@codeaurora.org> To: Andy Gross <agross@codeaurora.org> Cc: Felipe Balbi <balbi@ti.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kishon Vijay Abraham I <kishon@ti.com>, Kumar Gala <galak@codeaurora.org>, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, "Ivan T. Ivanov" <iivanov@mm-sol.com>, Bjorn Andersson <bjorn.andersson@sonymobile.com> Subject: Re: [Patch v9 1/3] usb: dwc3: qcom: Add device tree binding Date: Tue, 16 Sep 2014 11:15:43 -0700 [thread overview] Message-ID: <20140916181543.GA19101@usblab-sd-06.qualcomm.com> (raw) In-Reply-To: <1410550088-8754-2-git-send-email-agross@codeaurora.org> Hi Andy, On Fri, Sep 12, 2014 at 02:28:06PM -0500, Andy Gross wrote: > +Example device nodes: > + > + hs_phy: phy@100f8800 { > + compatible = "qcom,dwc3-hs-usb-phy"; > + reg = <0x100f8800 0x30>; Just wanted to point out that in our downstream code, the glue device/driver, i.e. "qcom,dwc3", does claim an entire register region that encompasses the same registers used by these PHYs. I noticed you're not adding a reg resource to the glue node below in this patchset. In order to allow multiple devices to use the overlapping regions, we avoid calling devm_ioremap_resource() and instead call devm_ioremap_nocache() directly which bypasses the request_mem_region() call, which I don't think is an entirely correct thing to do. On the other hand I'm trying to think of use cases on our other SOCs (MSM8974, APQ8084) where the glue actually would need access to the same or adjacent IO registers that couldn't just be handled directly by these PHY drivers. Should we accommodate for the potential of overlapping regions or should we just hold the line here and maybe only expose with finer granularity the registers that will actually be needed by the PHYs & glue respectively? > + clocks = <&gcc USB30_0_UTMI_CLK>; > + clock-names = "ref"; > + #phy-cells = <0>; > + > + status = "ok"; > + }; > + > + ss_phy: phy@100f8830 { > + compatible = "qcom,dwc3-ss-usb-phy"; > + reg = <0x100f8830 0x30>; > + clocks = <&gcc USB30_0_MASTER_CLK>; > + clock-names = "ref"; > + #phy-cells = <0>; > + > + status = "ok"; > + }; > + > + usb3_0: usb30@0 { > + compatible = "qcom,dwc3"; > + #address-cells = <1>; > + #size-cells = <1>; > + clocks = <&gcc USB30_0_MASTER_CLK>; > + clock-names = "core"; > + > + ranges; > + > + status = "ok"; > + > + dwc3@10000000 { > + compatible = "snps,dwc3"; > + reg = <0x10000000 0xcd00>; > + interrupts = <0 205 0x4>; > + phys = <&hs_phy>, <&ss_phy>; > + phy-names = "usb2-phy", "usb3-phy"; > + tx-fifo-resize; > + dr_mode = "host"; > + }; > + }; > + Thanks, Jack -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: jackp@codeaurora.org (Jack Pham) To: linux-arm-kernel@lists.infradead.org Subject: [Patch v9 1/3] usb: dwc3: qcom: Add device tree binding Date: Tue, 16 Sep 2014 11:15:43 -0700 [thread overview] Message-ID: <20140916181543.GA19101@usblab-sd-06.qualcomm.com> (raw) In-Reply-To: <1410550088-8754-2-git-send-email-agross@codeaurora.org> Hi Andy, On Fri, Sep 12, 2014 at 02:28:06PM -0500, Andy Gross wrote: > +Example device nodes: > + > + hs_phy: phy at 100f8800 { > + compatible = "qcom,dwc3-hs-usb-phy"; > + reg = <0x100f8800 0x30>; Just wanted to point out that in our downstream code, the glue device/driver, i.e. "qcom,dwc3", does claim an entire register region that encompasses the same registers used by these PHYs. I noticed you're not adding a reg resource to the glue node below in this patchset. In order to allow multiple devices to use the overlapping regions, we avoid calling devm_ioremap_resource() and instead call devm_ioremap_nocache() directly which bypasses the request_mem_region() call, which I don't think is an entirely correct thing to do. On the other hand I'm trying to think of use cases on our other SOCs (MSM8974, APQ8084) where the glue actually would need access to the same or adjacent IO registers that couldn't just be handled directly by these PHY drivers. Should we accommodate for the potential of overlapping regions or should we just hold the line here and maybe only expose with finer granularity the registers that will actually be needed by the PHYs & glue respectively? > + clocks = <&gcc USB30_0_UTMI_CLK>; > + clock-names = "ref"; > + #phy-cells = <0>; > + > + status = "ok"; > + }; > + > + ss_phy: phy at 100f8830 { > + compatible = "qcom,dwc3-ss-usb-phy"; > + reg = <0x100f8830 0x30>; > + clocks = <&gcc USB30_0_MASTER_CLK>; > + clock-names = "ref"; > + #phy-cells = <0>; > + > + status = "ok"; > + }; > + > + usb3_0: usb30 at 0 { > + compatible = "qcom,dwc3"; > + #address-cells = <1>; > + #size-cells = <1>; > + clocks = <&gcc USB30_0_MASTER_CLK>; > + clock-names = "core"; > + > + ranges; > + > + status = "ok"; > + > + dwc3 at 10000000 { > + compatible = "snps,dwc3"; > + reg = <0x10000000 0xcd00>; > + interrupts = <0 205 0x4>; > + phys = <&hs_phy>, <&ss_phy>; > + phy-names = "usb2-phy", "usb3-phy"; > + tx-fifo-resize; > + dr_mode = "host"; > + }; > + }; > + Thanks, Jack -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2014-09-16 18:15 UTC|newest] Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-09-12 19:28 [Patch v9 0/3] DWC3 USB support for Qualcomm platform Andy Gross 2014-09-12 19:28 ` Andy Gross 2014-09-12 19:28 ` Andy Gross 2014-09-12 19:28 ` [Patch v9 1/3] usb: dwc3: qcom: Add device tree binding Andy Gross 2014-09-12 19:28 ` Andy Gross 2014-09-12 19:28 ` Andy Gross 2014-09-16 18:15 ` Jack Pham [this message] 2014-09-16 18:15 ` Jack Pham 2014-09-16 18:29 ` Felipe Balbi 2014-09-16 18:29 ` Felipe Balbi 2014-09-16 18:29 ` Felipe Balbi 2014-09-12 19:28 ` [Patch v9 2/3] usb: dwc3: Add Qualcomm DWC3 glue layer driver Andy Gross 2014-09-12 19:28 ` Andy Gross [not found] ` <CAMf-jSm2fPPstFD2h4-gG=MCDty34f-O0ooizDEKyQUd3+CxGQ@mail.gmail.com> 2014-09-12 20:20 ` Felipe Balbi 2014-09-12 20:20 ` Felipe Balbi 2014-09-12 20:20 ` Felipe Balbi 2014-09-12 20:25 ` Pramod Gurav 2014-09-12 20:25 ` Pramod Gurav 2014-09-12 20:25 ` Pramod Gurav 2014-09-12 20:29 ` Felipe Balbi 2014-09-12 20:29 ` Felipe Balbi 2014-09-12 20:29 ` Felipe Balbi [not found] ` <20140912202942.GC25500-HgARHv6XitL9zxVx7UNMDg@public.gmane.org> 2014-09-12 20:33 ` Pramod Gurav 2014-09-12 20:33 ` Pramod Gurav 2014-09-12 20:33 ` Pramod Gurav 2014-09-12 19:28 ` [Patch v9 3/3] phy: Add Qualcomm DWC3 HS/SS PHY driver Andy Gross 2014-09-12 19:28 ` Andy Gross 2014-09-13 6:46 ` Kishon Vijay Abraham I 2014-09-13 6:46 ` Kishon Vijay Abraham I 2014-09-13 6:46 ` Kishon Vijay Abraham I 2014-09-14 2:24 ` Felipe Balbi 2014-09-14 2:24 ` Felipe Balbi 2014-09-14 2:24 ` Felipe Balbi 2014-09-15 6:37 ` Kishon Vijay Abraham I 2014-09-15 6:37 ` Kishon Vijay Abraham I 2014-09-15 6:37 ` Kishon Vijay Abraham I 2014-09-16 18:27 ` Jack Pham 2014-09-16 18:27 ` Jack Pham [not found] ` <20140916182752.GB19101-NjF/qFWh7jSrUKQWM4GlyCPyLMyjRtWwAL8bYrjMMd8@public.gmane.org> 2014-09-16 20:39 ` Andy Gross 2014-09-16 20:39 ` Andy Gross 2014-09-16 20:39 ` Andy Gross [not found] ` <1410550088-8754-4-git-send-email-agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> 2015-01-22 18:59 ` Jack Pham 2015-01-22 18:59 ` Jack Pham 2015-01-22 18:59 ` Jack Pham 2015-01-22 21:44 ` Andy Gross 2015-01-22 21:44 ` Andy Gross
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