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* [PATCH] clk: ti: Fix FAPLL parent enable bit handling
@ 2015-01-28 17:00 ` Tony Lindgren
  0 siblings, 0 replies; 4+ messages in thread
From: Tony Lindgren @ 2015-01-28 17:00 UTC (permalink / raw)
  To: Mike Turquette
  Cc: linux-omap, Dan Carpenter, linux-arm-kernel, Brian Hutchinson

Commit 163152cbbe32 ("clk: ti: Add support for FAPLL on dm816x")
added basic support for the FAPLL on dm818x, but has a bug for the
parent PLL enable bit. The FAPLL_MAIN_PLLEN is defined as BIT(3)
but the code is doing a shift on it.

This means the parent PLL won't get disabled even if all it's child
synthesizers are disabled.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/drivers/clk/ti/fapll.c
+++ b/drivers/clk/ti/fapll.c
@@ -84,7 +84,7 @@ static int ti_fapll_enable(struct clk_hw *hw)
 	struct fapll_data *fd = to_fapll(hw);
 	u32 v = readl_relaxed(fd->base);
 
-	v |= (1 << FAPLL_MAIN_PLLEN);
+	v |= FAPLL_MAIN_PLLEN;
 	writel_relaxed(v, fd->base);
 
 	return 0;
@@ -95,7 +95,7 @@ static void ti_fapll_disable(struct clk_hw *hw)
 	struct fapll_data *fd = to_fapll(hw);
 	u32 v = readl_relaxed(fd->base);
 
-	v &= ~(1 << FAPLL_MAIN_PLLEN);
+	v &= ~FAPLL_MAIN_PLLEN;
 	writel_relaxed(v, fd->base);
 }
 
@@ -104,7 +104,7 @@ static int ti_fapll_is_enabled(struct clk_hw *hw)
 	struct fapll_data *fd = to_fapll(hw);
 	u32 v = readl_relaxed(fd->base);
 
-	return v & (1 << FAPLL_MAIN_PLLEN);
+	return v & FAPLL_MAIN_PLLEN;
 }
 
 static unsigned long ti_fapll_recalc_rate(struct clk_hw *hw,

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [PATCH] clk: ti: Fix FAPLL parent enable bit handling
@ 2015-01-28 17:00 ` Tony Lindgren
  0 siblings, 0 replies; 4+ messages in thread
From: Tony Lindgren @ 2015-01-28 17:00 UTC (permalink / raw)
  To: linux-arm-kernel

Commit 163152cbbe32 ("clk: ti: Add support for FAPLL on dm816x")
added basic support for the FAPLL on dm818x, but has a bug for the
parent PLL enable bit. The FAPLL_MAIN_PLLEN is defined as BIT(3)
but the code is doing a shift on it.

This means the parent PLL won't get disabled even if all it's child
synthesizers are disabled.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/drivers/clk/ti/fapll.c
+++ b/drivers/clk/ti/fapll.c
@@ -84,7 +84,7 @@ static int ti_fapll_enable(struct clk_hw *hw)
 	struct fapll_data *fd = to_fapll(hw);
 	u32 v = readl_relaxed(fd->base);
 
-	v |= (1 << FAPLL_MAIN_PLLEN);
+	v |= FAPLL_MAIN_PLLEN;
 	writel_relaxed(v, fd->base);
 
 	return 0;
@@ -95,7 +95,7 @@ static void ti_fapll_disable(struct clk_hw *hw)
 	struct fapll_data *fd = to_fapll(hw);
 	u32 v = readl_relaxed(fd->base);
 
-	v &= ~(1 << FAPLL_MAIN_PLLEN);
+	v &= ~FAPLL_MAIN_PLLEN;
 	writel_relaxed(v, fd->base);
 }
 
@@ -104,7 +104,7 @@ static int ti_fapll_is_enabled(struct clk_hw *hw)
 	struct fapll_data *fd = to_fapll(hw);
 	u32 v = readl_relaxed(fd->base);
 
-	return v & (1 << FAPLL_MAIN_PLLEN);
+	return v & FAPLL_MAIN_PLLEN;
 }
 
 static unsigned long ti_fapll_recalc_rate(struct clk_hw *hw,

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH] clk: ti: Fix FAPLL parent enable bit handling
  2015-01-28 17:00 ` Tony Lindgren
@ 2015-02-25 20:07   ` Mike Turquette
  -1 siblings, 0 replies; 4+ messages in thread
From: Mike Turquette @ 2015-02-25 20:07 UTC (permalink / raw)
  To: Tony Lindgren
  Cc: linux-omap, Dan Carpenter, linux-arm-kernel, Brian Hutchinson

Quoting Tony Lindgren (2015-01-28 09:00:49)
> Commit 163152cbbe32 ("clk: ti: Add support for FAPLL on dm816x")
> added basic support for the FAPLL on dm818x, but has a bug for the
> parent PLL enable bit. The FAPLL_MAIN_PLLEN is defined as BIT(3)
> but the code is doing a shift on it.
> 
> This means the parent PLL won't get disabled even if all it's child
> synthesizers are disabled.
> 
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> Cc: Brian Hutchinson <b.hutchman@gmail.com>
> Signed-off-by: Tony Lindgren <tony@atomide.com>

Missed this one for 3.20. Applied to clk-fixes.

Regards,
Mike

> 
> --- a/drivers/clk/ti/fapll.c
> +++ b/drivers/clk/ti/fapll.c
> @@ -84,7 +84,7 @@ static int ti_fapll_enable(struct clk_hw *hw)
>         struct fapll_data *fd = to_fapll(hw);
>         u32 v = readl_relaxed(fd->base);
>  
> -       v |= (1 << FAPLL_MAIN_PLLEN);
> +       v |= FAPLL_MAIN_PLLEN;
>         writel_relaxed(v, fd->base);
>  
>         return 0;
> @@ -95,7 +95,7 @@ static void ti_fapll_disable(struct clk_hw *hw)
>         struct fapll_data *fd = to_fapll(hw);
>         u32 v = readl_relaxed(fd->base);
>  
> -       v &= ~(1 << FAPLL_MAIN_PLLEN);
> +       v &= ~FAPLL_MAIN_PLLEN;
>         writel_relaxed(v, fd->base);
>  }
>  
> @@ -104,7 +104,7 @@ static int ti_fapll_is_enabled(struct clk_hw *hw)
>         struct fapll_data *fd = to_fapll(hw);
>         u32 v = readl_relaxed(fd->base);
>  
> -       return v & (1 << FAPLL_MAIN_PLLEN);
> +       return v & FAPLL_MAIN_PLLEN;
>  }
>  
>  static unsigned long ti_fapll_recalc_rate(struct clk_hw *hw,

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [PATCH] clk: ti: Fix FAPLL parent enable bit handling
@ 2015-02-25 20:07   ` Mike Turquette
  0 siblings, 0 replies; 4+ messages in thread
From: Mike Turquette @ 2015-02-25 20:07 UTC (permalink / raw)
  To: linux-arm-kernel

Quoting Tony Lindgren (2015-01-28 09:00:49)
> Commit 163152cbbe32 ("clk: ti: Add support for FAPLL on dm816x")
> added basic support for the FAPLL on dm818x, but has a bug for the
> parent PLL enable bit. The FAPLL_MAIN_PLLEN is defined as BIT(3)
> but the code is doing a shift on it.
> 
> This means the parent PLL won't get disabled even if all it's child
> synthesizers are disabled.
> 
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> Cc: Brian Hutchinson <b.hutchman@gmail.com>
> Signed-off-by: Tony Lindgren <tony@atomide.com>

Missed this one for 3.20. Applied to clk-fixes.

Regards,
Mike

> 
> --- a/drivers/clk/ti/fapll.c
> +++ b/drivers/clk/ti/fapll.c
> @@ -84,7 +84,7 @@ static int ti_fapll_enable(struct clk_hw *hw)
>         struct fapll_data *fd = to_fapll(hw);
>         u32 v = readl_relaxed(fd->base);
>  
> -       v |= (1 << FAPLL_MAIN_PLLEN);
> +       v |= FAPLL_MAIN_PLLEN;
>         writel_relaxed(v, fd->base);
>  
>         return 0;
> @@ -95,7 +95,7 @@ static void ti_fapll_disable(struct clk_hw *hw)
>         struct fapll_data *fd = to_fapll(hw);
>         u32 v = readl_relaxed(fd->base);
>  
> -       v &= ~(1 << FAPLL_MAIN_PLLEN);
> +       v &= ~FAPLL_MAIN_PLLEN;
>         writel_relaxed(v, fd->base);
>  }
>  
> @@ -104,7 +104,7 @@ static int ti_fapll_is_enabled(struct clk_hw *hw)
>         struct fapll_data *fd = to_fapll(hw);
>         u32 v = readl_relaxed(fd->base);
>  
> -       return v & (1 << FAPLL_MAIN_PLLEN);
> +       return v & FAPLL_MAIN_PLLEN;
>  }
>  
>  static unsigned long ti_fapll_recalc_rate(struct clk_hw *hw,

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2015-02-25 20:07 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-01-28 17:00 [PATCH] clk: ti: Fix FAPLL parent enable bit handling Tony Lindgren
2015-01-28 17:00 ` Tony Lindgren
2015-02-25 20:07 ` Mike Turquette
2015-02-25 20:07   ` Mike Turquette

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