From: Hans-Christian Noren Egtvedt <egtvedt@samfundet.no> To: Mans Rullgard <mans@mansr.com> Cc: Viresh Kumar <vireshk@kernel.org>, Andy Shevchenko <andriy.shevchenko@linux.intel.com>, Vinod Koul <vinod.koul@intel.com>, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Kumar Gala <galak@codeaurora.org>, Haavard Skinnemoen <hskinnemoen@gmail.com>, Tejun Heo <tj@kernel.org>, Dan Williams <dan.j.williams@intel.com>, Daniel Mack <daniel@zonque.org>, Haojian Zhuang <haojian.zhuang@gmail.com>, Robert Jarzmik <robert.jarzmik@free.fr>, Mark Brown <broonie@kernel.org>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jiri Slaby <jslaby@suse.com>, devicetree@vger.kernel.org, linux-ide@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org Subject: Re: [PATCH 03/15] dmaengine: dw: rename masters to reflect actual topology Date: Sun, 24 Jan 2016 21:09:59 +0100 [thread overview] Message-ID: <20160124200959.GA15633@samfundet.no> (raw) In-Reply-To: <1453663322-14474-4-git-send-email-mans@mansr.com> Around Sun 24 Jan 2016 19:21:50 +0000 or thereabout, Mans Rullgard wrote: > From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > The source and destination masters are reflecting buses or their layers to > where the different devices can be connected. The patch changes the master > names to reflect which one is related to which independently on the transfer > direction. > > The outcome of the change is that the memory data width is now always limited > by a data width of the master which is dedicated to communicate to memory. > > The patch will not break anything since all current users have the same data > width for all masters. Though it would be nice to revisit avr32 plaforms to > check what is the actual hardware topology is used there. It seems that it has > one bus and two masters on it as stated by Table 8-2, that's why everything > works independently on the master in use. The purpose of the sequential patch > is to fix the driver for configuration of more that one bus. Not entirely sure what you want to have confirmed here. There are multiple masters and slaves on the HMATRIX internal bus on AVR32, and the DMA controller supports up to three simultaneous configurations. Sounds good to support configuration of more than one bus. I thought we always did support that? Perhaps it was a non-standard avr32 implementation. > The change is done in the assumption that src_master and dst_master are > reflecting a connection to the memory and peripheral correspondently on all > platforms except 460ex. > > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Signed-off-by: Mans Rullgard <mans@mansr.com> For the avr32 related stuff: Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> > --- > Documentation/devicetree/bindings/dma/snps-dma.txt | 4 ++-- > arch/avr32/mach-at32ap/at32ap700x.c | 16 ++++++++-------- > drivers/ata/sata_dwc_460ex.c | 4 ++-- > drivers/dma/dw/core.c | 15 +++++++-------- > drivers/dma/dw/platform.c | 12 ++++++------ > drivers/dma/dw/regs.h | 4 ++-- > drivers/spi/spi-pxa2xx-pci.c | 8 ++++---- > drivers/tty/serial/8250/8250_pci.c | 8 ++++---- > include/linux/platform_data/dma-dw.h | 8 ++++---- > 9 files changed, 39 insertions(+), 40 deletions(-) <snipp diff> -- Best regards, Hans-Christian Egtvedt
WARNING: multiple messages have this Message-ID (diff)
From: egtvedt@samfundet.no (Hans-Christian Noren Egtvedt) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 03/15] dmaengine: dw: rename masters to reflect actual topology Date: Sun, 24 Jan 2016 21:09:59 +0100 [thread overview] Message-ID: <20160124200959.GA15633@samfundet.no> (raw) In-Reply-To: <1453663322-14474-4-git-send-email-mans@mansr.com> Around Sun 24 Jan 2016 19:21:50 +0000 or thereabout, Mans Rullgard wrote: > From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > The source and destination masters are reflecting buses or their layers to > where the different devices can be connected. The patch changes the master > names to reflect which one is related to which independently on the transfer > direction. > > The outcome of the change is that the memory data width is now always limited > by a data width of the master which is dedicated to communicate to memory. > > The patch will not break anything since all current users have the same data > width for all masters. Though it would be nice to revisit avr32 plaforms to > check what is the actual hardware topology is used there. It seems that it has > one bus and two masters on it as stated by Table 8-2, that's why everything > works independently on the master in use. The purpose of the sequential patch > is to fix the driver for configuration of more that one bus. Not entirely sure what you want to have confirmed here. There are multiple masters and slaves on the HMATRIX internal bus on AVR32, and the DMA controller supports up to three simultaneous configurations. Sounds good to support configuration of more than one bus. I thought we always did support that? Perhaps it was a non-standard avr32 implementation. > The change is done in the assumption that src_master and dst_master are > reflecting a connection to the memory and peripheral correspondently on all > platforms except 460ex. > > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Signed-off-by: Mans Rullgard <mans@mansr.com> For the avr32 related stuff: Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> > --- > Documentation/devicetree/bindings/dma/snps-dma.txt | 4 ++-- > arch/avr32/mach-at32ap/at32ap700x.c | 16 ++++++++-------- > drivers/ata/sata_dwc_460ex.c | 4 ++-- > drivers/dma/dw/core.c | 15 +++++++-------- > drivers/dma/dw/platform.c | 12 ++++++------ > drivers/dma/dw/regs.h | 4 ++-- > drivers/spi/spi-pxa2xx-pci.c | 8 ++++---- > drivers/tty/serial/8250/8250_pci.c | 8 ++++---- > include/linux/platform_data/dma-dw.h | 8 ++++---- > 9 files changed, 39 insertions(+), 40 deletions(-) <snipp diff> -- Best regards, Hans-Christian Egtvedt
next prev parent reply other threads:[~2016-01-24 20:11 UTC|newest] Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-01-24 19:21 [PATCH 00/15] dmaengine: dw: various fixes and cleanups Mans Rullgard 2016-01-24 19:21 ` [PATCH 01/15] dmaengine: dw: fix byte order of hw descriptor fields Mans Rullgard 2016-01-24 19:21 ` [PATCH 02/15] dmaengine: dw: clear LLP_[SD]_EN bits in last descriptor of a chain Mans Rullgard [not found] ` <1453663322-14474-1-git-send-email-mans-2StjZFpD7GcAvxtiuMwx3w@public.gmane.org> 2016-01-24 19:21 ` [PATCH 03/15] dmaengine: dw: rename masters to reflect actual topology Mans Rullgard 2016-01-24 19:21 ` Mans Rullgard 2016-01-24 19:21 ` Mans Rullgard 2016-01-24 20:09 ` Hans-Christian Noren Egtvedt [this message] 2016-01-24 20:09 ` Hans-Christian Noren Egtvedt [not found] ` <20160124200959.GA15633-BrfabpQBY5qlHtIdYg32fQ@public.gmane.org> 2016-01-24 20:19 ` Måns Rullgård 2016-01-24 20:19 ` Måns Rullgård 2016-01-24 20:19 ` Måns Rullgård 2016-01-24 20:37 ` Hans-Christian Noren Egtvedt 2016-01-24 20:37 ` Hans-Christian Noren Egtvedt [not found] ` <20160124203720.GA29010-BrfabpQBY5qlHtIdYg32fQ@public.gmane.org> 2016-01-24 20:57 ` Måns Rullgård 2016-01-24 20:57 ` Måns Rullgård 2016-01-24 20:57 ` Måns Rullgård [not found] ` <1453663322-14474-4-git-send-email-mans-2StjZFpD7GcAvxtiuMwx3w@public.gmane.org> 2016-01-24 22:36 ` Mark Brown 2016-01-24 22:36 ` Mark Brown 2016-01-24 22:36 ` Mark Brown 2016-01-24 22:38 ` Måns Rullgård 2016-01-24 22:38 ` Måns Rullgård [not found] ` <yw1xk2myli0u.fsf-OEaqT8BN2ezZK2NkWkPsZwC/G2K4zDHf@public.gmane.org> 2016-01-25 6:03 ` Viresh Kumar 2016-01-25 6:03 ` Viresh Kumar 2016-01-25 6:03 ` Viresh Kumar 2016-01-25 6:03 ` Viresh Kumar 2016-01-25 12:05 ` Vinod Koul 2016-01-25 12:05 ` Vinod Koul 2016-01-25 12:23 ` Mark Brown 2016-01-25 12:23 ` Mark Brown 2016-01-25 8:35 ` Andy Shevchenko 2016-01-25 8:35 ` Andy Shevchenko 2016-01-25 12:24 ` Mark Brown 2016-01-25 12:24 ` Mark Brown 2016-01-25 14:01 ` Andy Shevchenko 2016-01-25 14:01 ` Andy Shevchenko 2016-01-27 12:47 ` Mark Brown 2016-01-27 12:47 ` Mark Brown 2016-01-24 19:21 ` [PATCH 04/15] dmaengine: dw: set src and dst master select according to xfer direction Mans Rullgard 2016-01-24 19:21 ` [PATCH 05/15] dmaengine: dw: set LMS field in descriptors Mans Rullgard 2016-01-24 19:21 ` [PATCH 06/15] dmaengine: dw: substitute dma_read_byaddr by dma_readl_native Mans Rullgard 2016-01-24 19:21 ` [PATCH 07/15] dmaengine: dw: revisit data_width property Mans Rullgard 2016-01-24 19:21 ` Mans Rullgard 2016-01-24 19:21 ` Mans Rullgard 2016-01-25 7:32 ` Vineet Gupta 2016-01-25 7:32 ` Vineet Gupta 2016-01-25 7:32 ` Vineet Gupta 2016-01-25 7:32 ` Vineet Gupta 2016-01-25 8:45 ` Andy Shevchenko 2016-01-25 8:45 ` Andy Shevchenko 2016-01-25 8:45 ` Andy Shevchenko 2016-01-25 8:45 ` Andy Shevchenko 2016-01-25 10:31 ` Måns Rullgård 2016-01-25 10:31 ` Måns Rullgård 2016-01-25 10:31 ` Måns Rullgård 2016-01-25 10:31 ` Måns Rullgård 2016-01-25 10:36 ` Andy Shevchenko 2016-01-25 10:36 ` Andy Shevchenko 2016-01-25 10:36 ` Andy Shevchenko 2016-01-25 10:36 ` Andy Shevchenko 2016-01-25 8:42 ` Andy Shevchenko 2016-01-25 8:42 ` Andy Shevchenko 2016-01-25 8:42 ` Andy Shevchenko 2016-01-25 8:42 ` Andy Shevchenko 2016-01-26 21:07 ` Rob Herring 2016-01-26 21:07 ` Rob Herring 2016-01-26 21:07 ` Rob Herring 2016-01-26 21:07 ` Rob Herring 2016-01-27 12:26 ` Andy Shevchenko 2016-01-27 12:26 ` Andy Shevchenko 2016-01-27 12:26 ` Andy Shevchenko 2016-01-27 12:26 ` Andy Shevchenko 2016-01-24 19:21 ` [PATCH 08/15] dmaengine: dw: define counter variables as unsigned int Mans Rullgard 2016-01-24 19:21 ` [PATCH 09/15] dmaengine: dw: keep entire platform data in struct dw_dma Mans Rullgard 2016-01-24 19:21 ` [PATCH 10/15] dmaengine: dw: pass platform data via struct dw_dma_chip Mans Rullgard 2016-01-24 19:21 ` [PATCH 11/15] dmaengine: dw: platform: use field-by-field initialization Mans Rullgard 2016-01-25 8:48 ` Andy Shevchenko 2016-01-24 19:21 ` [PATCH 12/15] dmaengine: dw: move dwc->paused to dwc->flags Mans Rullgard 2016-01-24 19:22 ` [PATCH 13/15] dmaengine: dw: move dwc->initialized " Mans Rullgard 2016-01-24 19:22 ` [PATCH 14/15] dmaengine: dw: move residue to a descriptor Mans Rullgard 2016-01-24 19:22 ` [PATCH 15/15] dmaengine: dw: set cdesc to NULL when free cyclic transfers Mans Rullgard 2016-01-25 10:37 ` [PATCH 00/15] dmaengine: dw: various fixes and cleanups Andy Shevchenko 2016-01-25 12:07 ` Vinod Koul
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