* [PATCH v4 1/4] KVM: Recover IRTE to remapped mode if the interrupt is not single-destination
2016-01-25 8:53 [PATCH v4 0/4] VT-d posted-interrupts follow ups Feng Wu
@ 2016-01-25 8:53 ` Feng Wu
2016-01-26 18:50 ` Radim Krčmář
2016-01-25 8:53 ` [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Feng Wu
` (2 subsequent siblings)
3 siblings, 1 reply; 11+ messages in thread
From: Feng Wu @ 2016-01-25 8:53 UTC (permalink / raw)
To: pbonzini, rkrcmar; +Cc: linux-kernel, kvm, Feng Wu
When the interrupt is not single destination any more, we need
to change back IRTE to remapped mode explicitly.
Signed-off-by: Feng Wu <feng.wu@intel.com>
---
v4:
- Don't need to Set SN before changing back to remapped mode
arch/x86/kvm/vmx.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index e2951b6..a4b4aa4 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -10764,8 +10764,21 @@ static int vmx_update_pi_irte(struct kvm *kvm, unsigned int host_irq,
*/
kvm_set_msi_irq(e, &irq);
- if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu))
+ if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu)) {
+ /*
+ * Make sure the IRTE is in remapped mode if
+ * we don't handle it in posted mode.
+ */
+ ret = irq_set_vcpu_affinity(host_irq, NULL);
+ if (ret < 0) {
+ printk(KERN_INFO
+ "failed to back to remapped mode, irq: %u\n",
+ host_irq);
+ goto out;
+ }
+
continue;
+ }
vcpu_info.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu));
vcpu_info.vector = irq.vector;
--
2.1.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
2016-01-25 8:53 [PATCH v4 0/4] VT-d posted-interrupts follow ups Feng Wu
2016-01-25 8:53 ` [PATCH v4 1/4] KVM: Recover IRTE to remapped mode if the interrupt is not single-destination Feng Wu
@ 2016-01-25 8:53 ` Feng Wu
2016-01-26 18:59 ` Radim Krčmář
2016-01-25 8:53 ` [PATCH v4 3/4] KVM: x86: Add lowest-priority support for vt-d posted-interrupts Feng Wu
2016-01-25 8:53 ` [PATCH v4 4/4] KVM/VMX: Add host irq information in trace event when updating IRTE for posted interrupts Feng Wu
3 siblings, 1 reply; 11+ messages in thread
From: Feng Wu @ 2016-01-25 8:53 UTC (permalink / raw)
To: pbonzini, rkrcmar; +Cc: linux-kernel, kvm, Feng Wu
Use vector-hashing to deliver lowest-priority interrupts, As an
example, modern Intel CPUs in server platform use this method to
handle lowest-priority interrupts.
Signed-off-by: Feng Wu <feng.wu@intel.com>
---
v4:
- Stylistic changes
v3:
- Fix a bug for sparse topologies, in that case, vcpu_id is not equal
to the return value got by kvm_get_vcpu().
- Remove unnecessary check in fast irq delivery patch.
- print a error message only once for each guest when we find hardware
disabled LAPIC during interrupt injection.
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/irq_comm.c | 25 +++++++++++++++++----
arch/x86/kvm/lapic.c | 50 ++++++++++++++++++++++++++++++++++++++---
arch/x86/kvm/lapic.h | 2 ++
arch/x86/kvm/x86.c | 9 ++++++++
arch/x86/kvm/x86.h | 1 +
6 files changed, 82 insertions(+), 7 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 44adbb8..7b54599 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -754,6 +754,8 @@ struct kvm_arch {
bool irqchip_split;
u8 nr_reserved_ioapic_pins;
+
+ bool disabled_lapic_found;
};
struct kvm_vm_stat {
diff --git a/arch/x86/kvm/irq_comm.c b/arch/x86/kvm/irq_comm.c
index 8fc89ef..3721736 100644
--- a/arch/x86/kvm/irq_comm.c
+++ b/arch/x86/kvm/irq_comm.c
@@ -34,6 +34,7 @@
#include "lapic.h"
#include "hyperv.h"
+#include "x86.h"
static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
struct kvm *kvm, int irq_source_id, int level,
@@ -57,6 +58,8 @@ int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
{
int i, r = -1;
struct kvm_vcpu *vcpu, *lowest = NULL;
+ unsigned long dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
+ unsigned int dest_vcpus = 0;
if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
kvm_lowest_prio_delivery(irq)) {
@@ -67,6 +70,8 @@ int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
return r;
+ memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
+
kvm_for_each_vcpu(i, vcpu, kvm) {
if (!kvm_apic_present(vcpu))
continue;
@@ -80,13 +85,25 @@ int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
r = 0;
r += kvm_apic_set_irq(vcpu, irq, dest_map);
} else if (kvm_lapic_enabled(vcpu)) {
- if (!lowest)
- lowest = vcpu;
- else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
- lowest = vcpu;
+ if (!kvm_vector_hashing_enabled()) {
+ if (!lowest)
+ lowest = vcpu;
+ else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
+ lowest = vcpu;
+ } else {
+ __set_bit(i, dest_vcpu_bitmap);
+ dest_vcpus++;
+ }
}
}
+ if (dest_vcpus != 0) {
+ int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
+ dest_vcpu_bitmap, KVM_MAX_VCPUS);
+
+ lowest = kvm_get_vcpu(kvm, idx);
+ }
+
if (lowest)
r = kvm_apic_set_irq(lowest, irq, dest_map);
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 36591fa..1a4ca1d 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -675,6 +675,22 @@ bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
}
}
+int kvm_vector_to_index(u32 vector, u32 dest_vcpus,
+ const unsigned long *bitmap, u32 bitmap_size)
+{
+ u32 mod;
+ int i, idx = -1;
+
+ mod = vector % dest_vcpus;
+
+ for (i = 0; i <= mod; i++) {
+ idx = find_next_bit(bitmap, bitmap_size, idx + 1);
+ BUG_ON(idx == bitmap_size);
+ }
+
+ return idx;
+}
+
bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
struct kvm_lapic_irq *irq, int *r, unsigned long *dest_map)
{
@@ -727,21 +743,49 @@ bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
dst = map->logical_map[cid];
- if (kvm_lowest_prio_delivery(irq)) {
+ if (!kvm_lowest_prio_delivery(irq))
+ goto set_irq;
+
+ if (!kvm_vector_hashing_enabled()) {
int l = -1;
for_each_set_bit(i, &bitmap, 16) {
if (!dst[i])
continue;
if (l < 0)
l = i;
- else if (kvm_apic_compare_prio(dst[i]->vcpu, dst[l]->vcpu) < 0)
+ else if (kvm_apic_compare_prio(dst[i]->vcpu,
+ dst[l]->vcpu) < 0)
l = i;
}
-
bitmap = (l >= 0) ? 1 << l : 0;
+ } else {
+ int idx;
+ unsigned int dest_vcpus;
+
+ dest_vcpus = hweight16(bitmap);
+ if (dest_vcpus == 0)
+ goto out;
+
+ idx = kvm_vector_to_index(irq->vector,
+ dest_vcpus, &bitmap, 16);
+
+ /*
+ * We may find a hardware disabled LAPIC here, if that
+ * is the case, print out a error message once for each
+ * guest and return.
+ */
+ if (!dst[idx] && !kvm->arch.disabled_lapic_found) {
+ kvm->arch.disabled_lapic_found = true;
+ printk(KERN_INFO
+ "Disabled LAPIC found during irq injection\n");
+ goto out;
+ }
+
+ bitmap = (idx >= 0) ? 1 << idx : 0;
}
}
+set_irq:
for_each_set_bit(i, &bitmap, 16) {
if (!dst[i])
continue;
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index 41bdb35..afccf40 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -175,4 +175,6 @@ void wait_lapic_expire(struct kvm_vcpu *vcpu);
bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
struct kvm_vcpu **dest_vcpu);
+int kvm_vector_to_index(u32 vector, u32 dest_vcpus,
+ const unsigned long *bitmap, u32 bitmap_size);
#endif
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 4244c2b..896e83e 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -123,6 +123,9 @@ module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
unsigned int __read_mostly lapic_timer_advance_ns = 0;
module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
+bool __read_mostly vector_hashing = true;
+module_param(vector_hashing, bool, S_IRUGO);
+
static bool __read_mostly backwards_tsc_observed = false;
#define KVM_NR_SHARED_MSRS 16
@@ -8370,6 +8373,12 @@ int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
}
+bool kvm_vector_hashing_enabled(void)
+{
+ return vector_hashing;
+}
+EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
+
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index f2afa5f..04bd0f9 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -179,6 +179,7 @@ int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
int page_num);
+bool kvm_vector_hashing_enabled(void);
#define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
| XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
--
2.1.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
2016-01-25 8:53 ` [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Feng Wu
@ 2016-01-26 18:59 ` Radim Krčmář
2016-01-28 1:51 ` Wu, Feng
0 siblings, 1 reply; 11+ messages in thread
From: Radim Krčmář @ 2016-01-26 18:59 UTC (permalink / raw)
To: Feng Wu; +Cc: pbonzini, linux-kernel, kvm
2016-01-25 16:53+0800, Feng Wu:
> Use vector-hashing to deliver lowest-priority interrupts, As an
> example, modern Intel CPUs in server platform use this method to
> handle lowest-priority interrupts.
>
> Signed-off-by: Feng Wu <feng.wu@intel.com>
> ---
With any proposed resolution of BUG_ON in kvm_vector_to_index,
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> @@ -123,6 +123,9 @@ module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
> +bool __read_mostly vector_hashing = true;
(Module param can be static.)
> +module_param(vector_hashing, bool, S_IRUGO);
^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
2016-01-26 18:59 ` Radim Krčmář
@ 2016-01-28 1:51 ` Wu, Feng
2016-01-29 8:17 ` Paolo Bonzini
0 siblings, 1 reply; 11+ messages in thread
From: Wu, Feng @ 2016-01-28 1:51 UTC (permalink / raw)
To: Radim Krcmár, pbonzini; +Cc: linux-kernel, kvm, Wu, Feng
> -----Original Message-----
> From: Radim Krčmář [mailto:rkrcmar@redhat.com]
> Sent: Wednesday, January 27, 2016 2:59 AM
> To: Wu, Feng <feng.wu@intel.com>
> Cc: pbonzini@redhat.com; linux-kernel@vger.kernel.org; kvm@vger.kernel.org
> Subject: Re: [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-
> priority interrupts
>
> 2016-01-25 16:53+0800, Feng Wu:
> > Use vector-hashing to deliver lowest-priority interrupts, As an
> > example, modern Intel CPUs in server platform use this method to
> > handle lowest-priority interrupts.
> >
> > Signed-off-by: Feng Wu <feng.wu@intel.com>
> > ---
>
> With any proposed resolution of BUG_ON in kvm_vector_to_index,
>
> Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
>
> > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> > @@ -123,6 +123,9 @@ module_param(tsc_tolerance_ppm, uint, S_IRUGO |
> S_IWUSR);
> > +bool __read_mostly vector_hashing = true;
>
> (Module param can be static.)
>
> > +module_param(vector_hashing, bool, S_IRUGO);
Thanks a lot for your comments, Radim & Paolo!
Paolo, given that the only two comments above, do I need to send v5? Or
you can handle it while merging them? I am fine with both methods.
Thanks,
Feng
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
2016-01-28 1:51 ` Wu, Feng
@ 2016-01-29 8:17 ` Paolo Bonzini
2016-01-29 8:23 ` Wu, Feng
0 siblings, 1 reply; 11+ messages in thread
From: Paolo Bonzini @ 2016-01-29 8:17 UTC (permalink / raw)
To: Wu, Feng, Radim Krcmár; +Cc: linux-kernel, kvm
On 28/01/2016 02:51, Wu, Feng wrote:
>
>
>> -----Original Message-----
>> From: Radim Krčmář [mailto:rkrcmar@redhat.com]
>> Sent: Wednesday, January 27, 2016 2:59 AM
>> To: Wu, Feng <feng.wu@intel.com>
>> Cc: pbonzini@redhat.com; linux-kernel@vger.kernel.org; kvm@vger.kernel.org
>> Subject: Re: [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-
>> priority interrupts
>>
>> 2016-01-25 16:53+0800, Feng Wu:
>>> Use vector-hashing to deliver lowest-priority interrupts, As an
>>> example, modern Intel CPUs in server platform use this method to
>>> handle lowest-priority interrupts.
>>>
>>> Signed-off-by: Feng Wu <feng.wu@intel.com>
>>> ---
>>
>> With any proposed resolution of BUG_ON in kvm_vector_to_index,
>>
>> Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
>>
>>> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
>>> @@ -123,6 +123,9 @@ module_param(tsc_tolerance_ppm, uint, S_IRUGO |
>> S_IWUSR);
>>> +bool __read_mostly vector_hashing = true;
>>
>> (Module param can be static.)
>>
>>> +module_param(vector_hashing, bool, S_IRUGO);
>
> Thanks a lot for your comments, Radim & Paolo!
>
> Paolo, given that the only two comments above, do I need to send v5? Or
> you can handle it while merging them? I am fine with both methods.
It's fine, I'm merging it.
Paolo
^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
2016-01-29 8:17 ` Paolo Bonzini
@ 2016-01-29 8:23 ` Wu, Feng
0 siblings, 0 replies; 11+ messages in thread
From: Wu, Feng @ 2016-01-29 8:23 UTC (permalink / raw)
To: Paolo Bonzini, Radim Krcmár; +Cc: linux-kernel, kvm, Wu, Feng
> -----Original Message-----
> From: linux-kernel-owner@vger.kernel.org [mailto:linux-kernel-
> owner@vger.kernel.org] On Behalf Of Paolo Bonzini
> Sent: Friday, January 29, 2016 4:18 PM
> To: Wu, Feng <feng.wu@intel.com>; Radim Krcmár <rkrcmar@redhat.com>
> Cc: linux-kernel@vger.kernel.org; kvm@vger.kernel.org
> Subject: Re: [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-
> priority interrupts
>
> >>> +module_param(vector_hashing, bool, S_IRUGO);
> >
> > Thanks a lot for your comments, Radim & Paolo!
> >
> > Paolo, given that the only two comments above, do I need to send v5? Or
> > you can handle it while merging them? I am fine with both methods.
>
> It's fine, I'm merging it.
Thanks a lot, Paolo.
Thanks,
Feng
>
> Paolo
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v4 3/4] KVM: x86: Add lowest-priority support for vt-d posted-interrupts
2016-01-25 8:53 [PATCH v4 0/4] VT-d posted-interrupts follow ups Feng Wu
2016-01-25 8:53 ` [PATCH v4 1/4] KVM: Recover IRTE to remapped mode if the interrupt is not single-destination Feng Wu
2016-01-25 8:53 ` [PATCH v4 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Feng Wu
@ 2016-01-25 8:53 ` Feng Wu
2016-01-26 19:05 ` Radim Krčmář
2016-01-25 8:53 ` [PATCH v4 4/4] KVM/VMX: Add host irq information in trace event when updating IRTE for posted interrupts Feng Wu
3 siblings, 1 reply; 11+ messages in thread
From: Feng Wu @ 2016-01-25 8:53 UTC (permalink / raw)
To: pbonzini, rkrcmar; +Cc: linux-kernel, kvm, Feng Wu
Use vector-hashing to deliver lowest-priority interrupts for
VT-d posted-interrupts. This patch extends kvm_intr_is_single_vcpu()
to support lowest-priority handling.
Signed-off-by: Feng Wu <feng.wu@intel.com>
---
v4:
- Recover the function name to 'kvm_intr_is_single_vcpu'
- Stylistic changes
v3:
- Remove unnecessary check in fast irq delivery patch
- print a error message only once for each guest when we find hardware
disabled LAPIC during interrupt injection.
arch/x86/kvm/lapic.c | 56 +++++++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 49 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 1a4ca1d..1520d1a 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -798,6 +798,20 @@ out:
return ret;
}
+/*
+ * This routine tries to handler interrupts in posted mode, here is how
+ * it deals with different cases:
+ * - For single-destination interrupts, handle it in posted mode
+ * - Else if vector hashing is enabled and it is a lowest-priority
+ * interrupt, handle it in posted mode and use the following mechanism
+ * to find the destinaiton vCPU.
+ * 1. For lowest-priority interrupts, store all the possible
+ * destination vCPUs in an array.
+ * 2. Use "guest vector % max number of destination vCPUs" to find
+ * the right destination vCPU in the array for the lowest-priority
+ * interrupt.
+ * - Otherwise, use remapped mode to inject the interrupt.
+ */
bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
struct kvm_vcpu **dest_vcpu)
{
@@ -839,16 +853,44 @@ bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
if (cid >= ARRAY_SIZE(map->logical_map))
goto out;
- for_each_set_bit(i, &bitmap, 16) {
- dst = map->logical_map[cid][i];
- if (++r == 2)
+ if (kvm_vector_hashing_enabled() &&
+ kvm_lowest_prio_delivery(irq)) {
+ int idx;
+ unsigned int dest_vcpus;
+
+ dest_vcpus = hweight16(bitmap);
+ if (dest_vcpus == 0)
goto out;
- }
- if (dst && kvm_apic_present(dst->vcpu))
+ idx = kvm_vector_to_index(irq->vector, dest_vcpus,
+ &bitmap, 16);
+
+ /*
+ * We may find a hardware disabled LAPIC here, if that
+ * is the case, print out a error message once for each
+ * guest and return
+ */
+ dst = map->logical_map[cid][idx];
+ if (!dst && !kvm->arch.disabled_lapic_found) {
+ kvm->arch.disabled_lapic_found = true;
+ printk(KERN_INFO
+ "Disabled LAPIC found during irq injection\n");
+ goto out;
+ }
+
*dest_vcpu = dst->vcpu;
- else
- goto out;
+ } else {
+ for_each_set_bit(i, &bitmap, 16) {
+ dst = map->logical_map[cid][i];
+ if (++r == 2)
+ goto out;
+ }
+
+ if (dst && kvm_apic_present(dst->vcpu))
+ *dest_vcpu = dst->vcpu;
+ else
+ goto out;
+ }
}
ret = true;
--
2.1.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v4 4/4] KVM/VMX: Add host irq information in trace event when updating IRTE for posted interrupts
2016-01-25 8:53 [PATCH v4 0/4] VT-d posted-interrupts follow ups Feng Wu
` (2 preceding siblings ...)
2016-01-25 8:53 ` [PATCH v4 3/4] KVM: x86: Add lowest-priority support for vt-d posted-interrupts Feng Wu
@ 2016-01-25 8:53 ` Feng Wu
3 siblings, 0 replies; 11+ messages in thread
From: Feng Wu @ 2016-01-25 8:53 UTC (permalink / raw)
To: pbonzini, rkrcmar; +Cc: linux-kernel, kvm, Feng Wu
Add host irq information in trace event, so we can better understand
which irq is in posted mode.
Signed-off-by: Feng Wu <feng.wu@intel.com>
Reviewed-by: Radim Krcmar <rkrcmar@redhat.com>
---
arch/x86/kvm/trace.h | 12 ++++++++----
arch/x86/kvm/vmx.c | 2 +-
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/trace.h b/arch/x86/kvm/trace.h
index ad9f6a2..2f1ea2f 100644
--- a/arch/x86/kvm/trace.h
+++ b/arch/x86/kvm/trace.h
@@ -996,11 +996,13 @@ TRACE_EVENT(kvm_enter_smm,
* Tracepoint for VT-d posted-interrupts.
*/
TRACE_EVENT(kvm_pi_irte_update,
- TP_PROTO(unsigned int vcpu_id, unsigned int gsi,
- unsigned int gvec, u64 pi_desc_addr, bool set),
- TP_ARGS(vcpu_id, gsi, gvec, pi_desc_addr, set),
+ TP_PROTO(unsigned int host_irq, unsigned int vcpu_id,
+ unsigned int gsi, unsigned int gvec,
+ u64 pi_desc_addr, bool set),
+ TP_ARGS(host_irq, vcpu_id, gsi, gvec, pi_desc_addr, set),
TP_STRUCT__entry(
+ __field( unsigned int, host_irq )
__field( unsigned int, vcpu_id )
__field( unsigned int, gsi )
__field( unsigned int, gvec )
@@ -1009,6 +1011,7 @@ TRACE_EVENT(kvm_pi_irte_update,
),
TP_fast_assign(
+ __entry->host_irq = host_irq;
__entry->vcpu_id = vcpu_id;
__entry->gsi = gsi;
__entry->gvec = gvec;
@@ -1016,9 +1019,10 @@ TRACE_EVENT(kvm_pi_irte_update,
__entry->set = set;
),
- TP_printk("VT-d PI is %s for this irq, vcpu %u, gsi: 0x%x, "
+ TP_printk("VT-d PI is %s for irq %u, vcpu %u, gsi: 0x%x, "
"gvec: 0x%x, pi_desc_addr: 0x%llx",
__entry->set ? "enabled and being updated" : "disabled",
+ __entry->host_irq,
__entry->vcpu_id,
__entry->gsi,
__entry->gvec,
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a4b4aa4..164eb9e 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -10783,7 +10783,7 @@ static int vmx_update_pi_irte(struct kvm *kvm, unsigned int host_irq,
vcpu_info.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu));
vcpu_info.vector = irq.vector;
- trace_kvm_pi_irte_update(vcpu->vcpu_id, e->gsi,
+ trace_kvm_pi_irte_update(vcpu->vcpu_id, host_irq, e->gsi,
vcpu_info.vector, vcpu_info.pi_desc_addr, set);
if (set)
--
2.1.0
^ permalink raw reply related [flat|nested] 11+ messages in thread