* [PATCH 1/1] imx25: Fix LCD pixelclock configuration
@ 2015-12-23 20:30 ` Carlos Soto
0 siblings, 0 replies; 6+ messages in thread
From: Carlos Soto @ 2015-12-23 20:30 UTC (permalink / raw)
To: Shawn Guo, Sascha Hauer, Michael Turquette, Stephen Boyd,
linux-arm-kernel, linux-clk
Cc: linux-kernel, Carlos Soto
Set LCDC base clock (per_7) parent clock to UPLL clock.
This is needed to allow finer resolution in pixelclock
Signed-off-by: Carlos Soto <csotoalonso@gmail.com>
---
drivers/clk/imx/clk-imx25.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
index c4c141c..656340e 100644
--- a/drivers/clk/imx/clk-imx25.c
+++ b/drivers/clk/imx/clk-imx25.c
@@ -238,6 +238,12 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
clk_set_parent(clk[per5_sel], clk[ahb]);
/*
+ * set LCDC base clock (per 7) to highest possible frequency (UPLL)
+ * to get best resolution for pixel clock
+ */
+ clk_set_parent(clk[per7_sel], clk[upll]);
+
+ /*
* Let's initially set up CLKO parent as ipg, since this configuration
* is used on some imx25 board designs to clock the audio codec.
*/
--
1.7.10.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 1/1] imx25: Fix LCD pixelclock configuration
@ 2015-12-23 20:30 ` Carlos Soto
0 siblings, 0 replies; 6+ messages in thread
From: Carlos Soto @ 2015-12-23 20:30 UTC (permalink / raw)
To: linux-arm-kernel
Set LCDC base clock (per_7) parent clock to UPLL clock.
This is needed to allow finer resolution in pixelclock
Signed-off-by: Carlos Soto <csotoalonso@gmail.com>
---
drivers/clk/imx/clk-imx25.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
index c4c141c..656340e 100644
--- a/drivers/clk/imx/clk-imx25.c
+++ b/drivers/clk/imx/clk-imx25.c
@@ -238,6 +238,12 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
clk_set_parent(clk[per5_sel], clk[ahb]);
/*
+ * set LCDC base clock (per 7) to highest possible frequency (UPLL)
+ * to get best resolution for pixel clock
+ */
+ clk_set_parent(clk[per7_sel], clk[upll]);
+
+ /*
* Let's initially set up CLKO parent as ipg, since this configuration
* is used on some imx25 board designs to clock the audio codec.
*/
--
1.7.10.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/1] imx25: Fix LCD pixelclock configuration
2015-12-23 20:30 ` Carlos Soto
@ 2016-01-28 6:32 ` Shawn Guo
-1 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2016-01-28 6:32 UTC (permalink / raw)
To: Carlos Soto
Cc: Sascha Hauer, Michael Turquette, Stephen Boyd, linux-arm-kernel,
linux-clk, linux-kernel
On Wed, Dec 23, 2015 at 09:30:10PM +0100, Carlos Soto wrote:
> Set LCDC base clock (per_7) parent clock to UPLL clock.
> This is needed to allow finer resolution in pixelclock
>
> Signed-off-by: Carlos Soto <csotoalonso@gmail.com>
> ---
> drivers/clk/imx/clk-imx25.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
> index c4c141c..656340e 100644
> --- a/drivers/clk/imx/clk-imx25.c
> +++ b/drivers/clk/imx/clk-imx25.c
> @@ -238,6 +238,12 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
> clk_set_parent(clk[per5_sel], clk[ahb]);
>
> /*
> + * set LCDC base clock (per 7) to highest possible frequency (UPLL)
> + * to get best resolution for pixel clock
> + */
> + clk_set_parent(clk[per7_sel], clk[upll]);
This can be done in device tree via assigned-clock-parents without the
need of touching kernel.
Shawn
> +
> + /*
> * Let's initially set up CLKO parent as ipg, since this configuration
> * is used on some imx25 board designs to clock the audio codec.
> */
> --
> 1.7.10.4
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/1] imx25: Fix LCD pixelclock configuration
@ 2016-01-28 6:32 ` Shawn Guo
0 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2016-01-28 6:32 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Dec 23, 2015 at 09:30:10PM +0100, Carlos Soto wrote:
> Set LCDC base clock (per_7) parent clock to UPLL clock.
> This is needed to allow finer resolution in pixelclock
>
> Signed-off-by: Carlos Soto <csotoalonso@gmail.com>
> ---
> drivers/clk/imx/clk-imx25.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
> index c4c141c..656340e 100644
> --- a/drivers/clk/imx/clk-imx25.c
> +++ b/drivers/clk/imx/clk-imx25.c
> @@ -238,6 +238,12 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
> clk_set_parent(clk[per5_sel], clk[ahb]);
>
> /*
> + * set LCDC base clock (per 7) to highest possible frequency (UPLL)
> + * to get best resolution for pixel clock
> + */
> + clk_set_parent(clk[per7_sel], clk[upll]);
This can be done in device tree via assigned-clock-parents without the
need of touching kernel.
Shawn
> +
> + /*
> * Let's initially set up CLKO parent as ipg, since this configuration
> * is used on some imx25 board designs to clock the audio codec.
> */
> --
> 1.7.10.4
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/1] imx25: Fix LCD pixelclock configuration
2016-01-28 6:32 ` Shawn Guo
@ 2016-02-07 18:59 ` Carlos Soto
-1 siblings, 0 replies; 6+ messages in thread
From: Carlos Soto @ 2016-02-07 18:59 UTC (permalink / raw)
To: Shawn Guo
Cc: Sascha Hauer, Michael Turquette, Stephen Boyd, linux-arm-kernel,
linux-clk, linux-kernel
2016-01-28 7:32 GMT+01:00 Shawn Guo <shawnguo@kernel.org>:
> On Wed, Dec 23, 2015 at 09:30:10PM +0100, Carlos Soto wrote:
>> Set LCDC base clock (per_7) parent clock to UPLL clock.
>> This is needed to allow finer resolution in pixelclock
>>
>> Signed-off-by: Carlos Soto <csotoalonso@gmail.com>
>> ---
>> drivers/clk/imx/clk-imx25.c | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
>> index c4c141c..656340e 100644
>> --- a/drivers/clk/imx/clk-imx25.c
>> +++ b/drivers/clk/imx/clk-imx25.c
>> @@ -238,6 +238,12 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
>> clk_set_parent(clk[per5_sel], clk[ahb]);
>>
>> /*
>> + * set LCDC base clock (per 7) to highest possible frequency (UPLL)
>> + * to get best resolution for pixel clock
>> + */
>> + clk_set_parent(clk[per7_sel], clk[upll]);
>
> This can be done in device tree via assigned-clock-parents without the
> need of touching kernel.
>
> Shawn
>
Sorry, I was not aware of this feature. Already tested and it works fine via DT
Thanks for the help
Carlos
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/1] imx25: Fix LCD pixelclock configuration
@ 2016-02-07 18:59 ` Carlos Soto
0 siblings, 0 replies; 6+ messages in thread
From: Carlos Soto @ 2016-02-07 18:59 UTC (permalink / raw)
To: linux-arm-kernel
2016-01-28 7:32 GMT+01:00 Shawn Guo <shawnguo@kernel.org>:
> On Wed, Dec 23, 2015 at 09:30:10PM +0100, Carlos Soto wrote:
>> Set LCDC base clock (per_7) parent clock to UPLL clock.
>> This is needed to allow finer resolution in pixelclock
>>
>> Signed-off-by: Carlos Soto <csotoalonso@gmail.com>
>> ---
>> drivers/clk/imx/clk-imx25.c | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
>> index c4c141c..656340e 100644
>> --- a/drivers/clk/imx/clk-imx25.c
>> +++ b/drivers/clk/imx/clk-imx25.c
>> @@ -238,6 +238,12 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
>> clk_set_parent(clk[per5_sel], clk[ahb]);
>>
>> /*
>> + * set LCDC base clock (per 7) to highest possible frequency (UPLL)
>> + * to get best resolution for pixel clock
>> + */
>> + clk_set_parent(clk[per7_sel], clk[upll]);
>
> This can be done in device tree via assigned-clock-parents without the
> need of touching kernel.
>
> Shawn
>
Sorry, I was not aware of this feature. Already tested and it works fine via DT
Thanks for the help
Carlos
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-02-07 18:59 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2015-12-23 20:30 [PATCH 1/1] imx25: Fix LCD pixelclock configuration Carlos Soto
2015-12-23 20:30 ` Carlos Soto
2016-01-28 6:32 ` Shawn Guo
2016-01-28 6:32 ` Shawn Guo
2016-02-07 18:59 ` Carlos Soto
2016-02-07 18:59 ` Carlos Soto
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