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From: Will Deacon <will.deacon@arm.com>
To: Shannon Zhao <zhaoshenglong@huawei.com>
Cc: kvmarm@lists.cs.columbia.edu, marc.zyngier@arm.com,
	christoffer.dall@linaro.org,
	linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
	wei@redhat.com, drjones@redhat.com, cov@codeaurora.org,
	shannon.zhao@linaro.org, peter.huangpeng@huawei.com,
	hangaohuai@huawei.com, Anup Patel <anup.patel@linaro.org>
Subject: Re: [PATCH v10 01/21] ARM64: Move PMU register related defines to asm/pmu.h
Date: Wed, 10 Feb 2016 10:36:01 +0000	[thread overview]
Message-ID: <20160210103600.GE1052@arm.com> (raw)
In-Reply-To: <1453866709-20324-2-git-send-email-zhaoshenglong@huawei.com>

On Wed, Jan 27, 2016 at 11:51:29AM +0800, Shannon Zhao wrote:
> From: Shannon Zhao <shannon.zhao@linaro.org>
> 
> To use the ARMv8 PMU related register defines from the KVM code,
> we move the relevant definitions to asm/pmu.h header file.
> 
> Signed-off-by: Anup Patel <anup.patel@linaro.org>
> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  arch/arm64/include/asm/pmu.h   | 67 ++++++++++++++++++++++++++++++++++++++++++
>  arch/arm64/kernel/perf_event.c | 36 +----------------------
>  2 files changed, 68 insertions(+), 35 deletions(-)
>  create mode 100644 arch/arm64/include/asm/pmu.h
> 
> diff --git a/arch/arm64/include/asm/pmu.h b/arch/arm64/include/asm/pmu.h
> new file mode 100644
> index 0000000..4406184
> --- /dev/null
> +++ b/arch/arm64/include/asm/pmu.h

I think you can stick this in perf_event.h and avoid having a brand
new header.

> @@ -0,0 +1,67 @@
> +/*
> + * PMU support
> + *
> + * Copyright (C) 2012 ARM Limited
> + * Author: Will Deacon <will.deacon@arm.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> + */
> +#ifndef __ASM_PMU_H
> +#define __ASM_PMU_H
> +
> +#define ARMV8_MAX_COUNTERS      32
> +#define ARMV8_COUNTER_MASK      (ARMV8_MAX_COUNTERS - 1)

[...]

> +/*
> + * Event filters for PMUv3
> + */
> +#define	ARMV8_EXCLUDE_EL1	(1 << 31)
> +#define	ARMV8_EXCLUDE_EL0	(1 << 30)
> +#define	ARMV8_INCLUDE_EL2	(1 << 27)

You should prefix these more specifically if they're going to be exposed
like this. Something like ARMV8_PMU_*.

Will

WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v10 01/21] ARM64: Move PMU register related defines to asm/pmu.h
Date: Wed, 10 Feb 2016 10:36:01 +0000	[thread overview]
Message-ID: <20160210103600.GE1052@arm.com> (raw)
In-Reply-To: <1453866709-20324-2-git-send-email-zhaoshenglong@huawei.com>

On Wed, Jan 27, 2016 at 11:51:29AM +0800, Shannon Zhao wrote:
> From: Shannon Zhao <shannon.zhao@linaro.org>
> 
> To use the ARMv8 PMU related register defines from the KVM code,
> we move the relevant definitions to asm/pmu.h header file.
> 
> Signed-off-by: Anup Patel <anup.patel@linaro.org>
> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  arch/arm64/include/asm/pmu.h   | 67 ++++++++++++++++++++++++++++++++++++++++++
>  arch/arm64/kernel/perf_event.c | 36 +----------------------
>  2 files changed, 68 insertions(+), 35 deletions(-)
>  create mode 100644 arch/arm64/include/asm/pmu.h
> 
> diff --git a/arch/arm64/include/asm/pmu.h b/arch/arm64/include/asm/pmu.h
> new file mode 100644
> index 0000000..4406184
> --- /dev/null
> +++ b/arch/arm64/include/asm/pmu.h

I think you can stick this in perf_event.h and avoid having a brand
new header.

> @@ -0,0 +1,67 @@
> +/*
> + * PMU support
> + *
> + * Copyright (C) 2012 ARM Limited
> + * Author: Will Deacon <will.deacon@arm.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> + */
> +#ifndef __ASM_PMU_H
> +#define __ASM_PMU_H
> +
> +#define ARMV8_MAX_COUNTERS      32
> +#define ARMV8_COUNTER_MASK      (ARMV8_MAX_COUNTERS - 1)

[...]

> +/*
> + * Event filters for PMUv3
> + */
> +#define	ARMV8_EXCLUDE_EL1	(1 << 31)
> +#define	ARMV8_EXCLUDE_EL0	(1 << 30)
> +#define	ARMV8_INCLUDE_EL2	(1 << 27)

You should prefix these more specifically if they're going to be exposed
like this. Something like ARMV8_PMU_*.

Will

  reply	other threads:[~2016-02-10 10:35 UTC|newest]

Thread overview: 127+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-27  3:51 [PATCH v10 00/21] KVM: ARM64: Add guest PMU support Shannon Zhao
2016-01-27  3:51 ` Shannon Zhao
2016-01-27  3:51 ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 01/21] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-02-10 10:36   ` Will Deacon [this message]
2016-02-10 10:36     ` Will Deacon
2016-01-27  3:51 ` [PATCH v10 02/21] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 03/21] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 04/21] KVM: ARM64: Add access handler for PMCR register Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 15:36   ` Andrew Jones
2016-01-28 15:36     ` Andrew Jones
2016-01-28 20:43     ` Andrew Jones
2016-01-28 20:43       ` Andrew Jones
2016-01-29  2:07       ` Shannon Zhao
2016-01-29  2:07         ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 05/21] KVM: ARM64: Add access handler for PMSELR register Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 20:10   ` Andrew Jones
2016-01-28 20:10     ` Andrew Jones
2016-01-27  3:51 ` [PATCH v10 06/21] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 20:34   ` Andrew Jones
2016-01-28 20:34     ` Andrew Jones
2016-01-29  3:47     ` Shannon Zhao
2016-01-29  3:47       ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 16:31   ` Andrew Jones
2016-01-28 16:31     ` Andrew Jones
2016-01-28 16:45     ` Marc Zyngier
2016-01-28 16:45       ` Marc Zyngier
2016-01-28 18:06       ` Will Deacon
2016-01-28 18:06         ` Will Deacon
2016-01-29  6:14         ` Shannon Zhao
2016-01-29  6:14           ` Shannon Zhao
2016-01-29  6:14           ` Shannon Zhao
2016-01-29  6:26         ` Shannon Zhao
2016-01-29  6:26           ` Shannon Zhao
2016-01-29  6:26           ` Shannon Zhao
2016-01-29 10:18           ` Will Deacon
2016-01-29 10:18             ` Will Deacon
2016-01-29 13:11             ` Shannon Zhao
2016-01-29 13:11               ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 08/21] KVM: ARM64: Add access handler for event type register Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 20:11   ` Andrew Jones
2016-01-28 20:11     ` Andrew Jones
2016-01-29  1:42     ` Shannon Zhao
2016-01-29  1:42       ` Shannon Zhao
2016-01-29  1:42       ` Shannon Zhao
2016-01-29 11:25       ` Andrew Jones
2016-01-29 11:25         ` Andrew Jones
2016-01-27  3:51 ` [PATCH v10 09/21] KVM: ARM64: Add access handler for event counter register Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 10/21] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 18:08   ` Andrew Jones
2016-01-28 18:08     ` Andrew Jones
2016-01-28 18:12     ` Andrew Jones
2016-01-28 18:12       ` Andrew Jones
2016-01-27  3:51 ` [PATCH v10 11/21] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 18:18   ` Andrew Jones
2016-01-28 18:18     ` Andrew Jones
2016-01-27  3:51 ` [PATCH v10 12/21] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 13/21] KVM: ARM64: Add access handler for PMSWINC register Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 18:37   ` Andrew Jones
2016-01-28 18:37     ` Andrew Jones
2016-01-27  3:51 ` [PATCH v10 14/21] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 19:15   ` Andrew Jones
2016-01-28 19:15     ` Andrew Jones
2016-01-27  3:51 ` [PATCH v10 15/21] KVM: ARM64: Add access handler for PMUSERENR register Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 19:58   ` Andrew Jones
2016-01-28 19:58     ` Andrew Jones
2016-01-29  7:37     ` Shannon Zhao
2016-01-29  7:37       ` Shannon Zhao
2016-01-29 11:08       ` Andrew Jones
2016-01-29 11:08         ` Andrew Jones
2016-01-29 13:17         ` Shannon Zhao
2016-01-29 13:17           ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 16/21] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 17/21] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 18/21] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 19/21] KVM: ARM64: Add a new feature bit for PMUv3 Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 20:54   ` Andrew Jones
2016-01-28 20:54     ` Andrew Jones
2016-01-27  3:51 ` [PATCH v10 20/21] KVM: ARM: Introduce per-vcpu kvm device controls Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51 ` [PATCH v10 21/21] KVM: ARM64: Add a new vcpu device control group for PMUv3 Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-27  3:51   ` Shannon Zhao
2016-01-28 21:12   ` Andrew Jones
2016-01-28 21:12     ` Andrew Jones
2016-01-28 21:30 ` [PATCH v10 00/21] KVM: ARM64: Add guest PMU support Andrew Jones
2016-01-28 21:30   ` Andrew Jones

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