* [Qemu-devel] Bug in ppc/BookE wait instruction @ 2016-06-03 15:45 Jakub Horak 2016-06-03 17:11 ` Mark Cave-Ayland 2016-06-06 1:34 ` David Gibson 0 siblings, 2 replies; 5+ messages in thread From: Jakub Horak @ 2016-06-03 15:45 UTC (permalink / raw) To: qemu-devel Hello, I think there's a bug in "wait" instruction code generator for PowerPC architecture. It doesn't make sense to store a non-initialized register. Best regards, Jakub Horak diff --git a/target-ppc/translate.c b/target-ppc/translate.c index f5ceae5..6af567b 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3439,7 +3439,7 @@ static void gen_sync(DisasContext *ctx) /* wait */ static void gen_wait(DisasContext *ctx) { - TCGv_i32 t0 = tcg_temp_new_i32(); + TCGv_i32 t0 = tcg_const_i32(1); tcg_gen_st_i32(t0, cpu_env, -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)); tcg_temp_free_i32(t0); ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] Bug in ppc/BookE wait instruction 2016-06-03 15:45 [Qemu-devel] Bug in ppc/BookE wait instruction Jakub Horak @ 2016-06-03 17:11 ` Mark Cave-Ayland 2016-06-06 1:34 ` David Gibson 1 sibling, 0 replies; 5+ messages in thread From: Mark Cave-Ayland @ 2016-06-03 17:11 UTC (permalink / raw) To: Jakub Horak, qemu-devel, qemu-ppc, David Gibson On 03/06/16 16:45, Jakub Horak wrote: (Added David as PPC maintainer and qemu-ppc mailing list) > Hello, > I think there's a bug in "wait" instruction code generator for PowerPC > architecture. It doesn't make sense to store a non-initialized register. > > Best regards, > Jakub Horak > > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index f5ceae5..6af567b 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -3439,7 +3439,7 @@ static void gen_sync(DisasContext *ctx) > /* wait */ > static void gen_wait(DisasContext *ctx) > { > - TCGv_i32 t0 = tcg_temp_new_i32(); > + TCGv_i32 t0 = tcg_const_i32(1); > tcg_gen_st_i32(t0, cpu_env, > -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)); > tcg_temp_free_i32(t0); > ATB, Mark. ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] Bug in ppc/BookE wait instruction 2016-06-03 15:45 [Qemu-devel] Bug in ppc/BookE wait instruction Jakub Horak 2016-06-03 17:11 ` Mark Cave-Ayland @ 2016-06-06 1:34 ` David Gibson 2016-06-06 8:47 ` Jakub Horak 1 sibling, 1 reply; 5+ messages in thread From: David Gibson @ 2016-06-06 1:34 UTC (permalink / raw) To: Jakub Horak; +Cc: qemu-devel, qemu-ppc [-- Attachment #1: Type: text/plain, Size: 1275 bytes --] On Fri, Jun 03, 2016 at 05:45:49PM +0200, Jakub Horak wrote: > Hello, > I think there's a bug in "wait" instruction code generator for PowerPC > architecture. It doesn't make sense to store a non-initialized register. > > Best regards, > Jakub Horak The fix looks correct, but I need a Signed-off-by line in order to apply it. In future, please send such patches to myself and Alex Graf (target-ppc maintainers) the qemu-ppc list as well as qemu-devel. I wouldn't have spotted this if Marc Cave-Ayland hadn't copied it to me. > > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index f5ceae5..6af567b 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -3439,7 +3439,7 @@ static void gen_sync(DisasContext *ctx) > /* wait */ > static void gen_wait(DisasContext *ctx) > { > - TCGv_i32 t0 = tcg_temp_new_i32(); > + TCGv_i32 t0 = tcg_const_i32(1); > tcg_gen_st_i32(t0, cpu_env, > -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)); > tcg_temp_free_i32(t0); > -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 819 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] Bug in ppc/BookE wait instruction 2016-06-06 1:34 ` David Gibson @ 2016-06-06 8:47 ` Jakub Horak 2016-06-15 4:06 ` [Qemu-devel] [Qemu-ppc] " David Gibson 0 siblings, 1 reply; 5+ messages in thread From: Jakub Horak @ 2016-06-06 8:47 UTC (permalink / raw) To: David Gibson; +Cc: qemu-devel, qemu-ppc Hello, David Gibson (david@gibson.dropbear.id.au) wrote: > On Fri, Jun 03, 2016 at 05:45:49PM +0200, Jakub Horak wrote: > > Hello, > > I think there's a bug in "wait" instruction code generator for PowerPC > > architecture. It doesn't make sense to store a non-initialized register. > > > > Best regards, > > Jakub Horak > > The fix looks correct, but I need a Signed-off-by line in order to > apply it. Here you go: Fixed bug in code generator. Signed-off-by: Jakub Horak <thement@ibawizard.net> diff --git a/target-ppc/translate.c b/target-ppc/translate.c index f5ceae5..6af567b 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3439,7 +3439,7 @@ static void gen_sync(DisasContext *ctx) /* wait */ static void gen_wait(DisasContext *ctx) { - TCGv_i32 t0 = tcg_temp_new_i32(); + TCGv_i32 t0 = tcg_const_i32(1); tcg_gen_st_i32(t0, cpu_env, -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)); tcg_temp_free_i32(t0); > > In future, please send such patches to myself and Alex Graf > (target-ppc maintainers) the qemu-ppc list as well as qemu-devel. I > wouldn't have spotted this if Marc Cave-Ayland hadn't copied it to me. Sorry, I'll be more thoughtful next time. Best regards, Jakub > > > > > > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > > index f5ceae5..6af567b 100644 > > --- a/target-ppc/translate.c > > +++ b/target-ppc/translate.c > > @@ -3439,7 +3439,7 @@ static void gen_sync(DisasContext *ctx) > > /* wait */ > > static void gen_wait(DisasContext *ctx) > > { > > - TCGv_i32 t0 = tcg_temp_new_i32(); > > + TCGv_i32 t0 = tcg_const_i32(1); > > tcg_gen_st_i32(t0, cpu_env, > > -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)); > > tcg_temp_free_i32(t0); > > > > -- > David Gibson | I'll have my music baroque, and my code > david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ > | _way_ _around_! > http://www.ozlabs.org/~dgibson ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] Bug in ppc/BookE wait instruction 2016-06-06 8:47 ` Jakub Horak @ 2016-06-15 4:06 ` David Gibson 0 siblings, 0 replies; 5+ messages in thread From: David Gibson @ 2016-06-15 4:06 UTC (permalink / raw) To: Jakub Horak; +Cc: qemu-ppc, qemu-devel [-- Attachment #1: Type: text/plain, Size: 2380 bytes --] On Mon, Jun 06, 2016 at 10:47:28AM +0200, Jakub Horak wrote: > > Hello, > > David Gibson (david@gibson.dropbear.id.au) wrote: > > On Fri, Jun 03, 2016 at 05:45:49PM +0200, Jakub Horak wrote: > > > Hello, > > > I think there's a bug in "wait" instruction code generator for PowerPC > > > architecture. It doesn't make sense to store a non-initialized register. > > > > > > Best regards, > > > Jakub Horak > > > > The fix looks correct, but I need a Signed-off-by line in order to > > apply it. > > Here you go: > > Fixed bug in code generator. > > Signed-off-by: Jakub Horak <thement@ibawizard.net> > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index f5ceae5..6af567b 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -3439,7 +3439,7 @@ static void gen_sync(DisasContext *ctx) > /* wait */ > static void gen_wait(DisasContext *ctx) > { > - TCGv_i32 t0 = tcg_temp_new_i32(); > + TCGv_i32 t0 = tcg_const_i32(1); > tcg_gen_st_i32(t0, cpu_env, > -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)); > tcg_temp_free_i32(t0); > > > > > > In future, please send such patches to myself and Alex Graf > > (target-ppc maintainers) the qemu-ppc list as well as qemu-devel. I > > wouldn't have spotted this if Marc Cave-Ayland hadn't copied it to me. > > Sorry, I'll be more thoughtful next time. Sorry, I forgot about this one after you resent, I've now applied to ppc-for-2.7. > > Best regards, > Jakub > > > > > > > > > > > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > > > index f5ceae5..6af567b 100644 > > > --- a/target-ppc/translate.c > > > +++ b/target-ppc/translate.c > > > @@ -3439,7 +3439,7 @@ static void gen_sync(DisasContext *ctx) > > > /* wait */ > > > static void gen_wait(DisasContext *ctx) > > > { > > > - TCGv_i32 t0 = tcg_temp_new_i32(); > > > + TCGv_i32 t0 = tcg_const_i32(1); > > > tcg_gen_st_i32(t0, cpu_env, > > > -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)); > > > tcg_temp_free_i32(t0); > > > > > > > > -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 819 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2016-06-15 4:21 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-06-03 15:45 [Qemu-devel] Bug in ppc/BookE wait instruction Jakub Horak 2016-06-03 17:11 ` Mark Cave-Ayland 2016-06-06 1:34 ` David Gibson 2016-06-06 8:47 ` Jakub Horak 2016-06-15 4:06 ` [Qemu-devel] [Qemu-ppc] " David Gibson
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.