All of lore.kernel.org
 help / color / mirror / Atom feed
From: Haozhong Zhang <haozhong.zhang@intel.com>
To: Eduardo Habkost <ehabkost@redhat.com>
Cc: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <rth@twiddle.net>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>,
	kvm@vger.kernel.org, Boris Petkov <bp@suse.de>,
	Tony Luck <tony.luck@intel.com>,
	Andi Kleen <andi.kleen@intel.com>,
	rkrcmar@redhat.com, Ashok Raj <ashok.raj@intel.com>
Subject: Re: [PATCH v4 1/3] target-i386: KVM: add basic Intel LMCE support
Date: Mon, 20 Jun 2016 10:04:30 +0800	[thread overview]
Message-ID: <20160620020430.5hekpmxnflnn6dx5@hz-desktop> (raw)
In-Reply-To: <20160617162003.GI18662@thinpad.lan.raisama.net>

On 06/17/16 13:20, Eduardo Habkost wrote:
> On Fri, Jun 17, 2016 at 09:26:57AM +0800, Haozhong Zhang wrote:
> [...]
> > > >  static void mce_init(X86CPU *cpu)
> > > >  {
> > > >      CPUX86State *cenv = &cpu->env;
> > > >      unsigned int bank;
> > > > +    Error *local_err = NULL;
> > > >  
> > > >      if (((cenv->cpuid_version >> 8) & 0xf) >= 6
> > > >          && (cenv->features[FEAT_1_EDX] & (CPUID_MCE | CPUID_MCA)) ==
> > > >              (CPUID_MCE | CPUID_MCA)) {
> > > >          cenv->mcg_cap = MCE_CAP_DEF | MCE_BANKS_DEF;
> > > > +
> > > > +        if (cpu->enable_lmce) {
> > > > +            if (!lmce_supported()) {
> > > > +                error_setg(&local_err, "KVM unavailable or LMCE not supported");
> > > > +                error_propagate(&error_abort, local_err);
> > > > +            }
> > > > +            cenv->mcg_cap |= MCG_LMCE_P;
> > > > +        }
> > > > +
> > > 
> > > This duplicates the existing check in kvm_arch_init_vcpu(). The
> > > difference is that the existing code is KVM-specific and doesn't
> > > stop initialization when capabilities are missing. We can unify
> > > them into a single mcg_cap-checking function as a follow-up.
> > >
> > 
> > If I reuse the existing MCE capability check in kvm_arch_init_vcpu(),
> > is it reasonable to make change to stop initialization if missing
> > capabilities? Or should we stop only for missing newly added capabilities
> > (e.g. LMCE) in order to keep backwards compatibility?
> 
> Ideally, yes. But in practice we need to check if we won't break
> existing setups that were working. If all kernel versions we care
> about always MCG_CTL_P|MCG_SER_P + 10 banks as supported, we can
> make all bits mandatory.
>

Let's stop only for LMCE in this patch series. Other bits may be
changed in future after the kernel support is clarified.

Thanks,
Haozhong

> I need to re-read the thread were kvm_get_mce_cap_supported() was
> discussed, to refresh my memory.
>
> -- 
> Eduardo
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: Haozhong Zhang <haozhong.zhang@intel.com>
To: Eduardo Habkost <ehabkost@redhat.com>
Cc: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <rth@twiddle.net>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>,
	kvm@vger.kernel.org, Boris Petkov <bp@suse.de>,
	Tony Luck <tony.luck@intel.com>,
	Andi Kleen <andi.kleen@intel.com>,
	rkrcmar@redhat.com, Ashok Raj <ashok.raj@intel.com>
Subject: Re: [Qemu-devel] [PATCH v4 1/3] target-i386: KVM: add basic Intel LMCE support
Date: Mon, 20 Jun 2016 10:04:30 +0800	[thread overview]
Message-ID: <20160620020430.5hekpmxnflnn6dx5@hz-desktop> (raw)
In-Reply-To: <20160617162003.GI18662@thinpad.lan.raisama.net>

On 06/17/16 13:20, Eduardo Habkost wrote:
> On Fri, Jun 17, 2016 at 09:26:57AM +0800, Haozhong Zhang wrote:
> [...]
> > > >  static void mce_init(X86CPU *cpu)
> > > >  {
> > > >      CPUX86State *cenv = &cpu->env;
> > > >      unsigned int bank;
> > > > +    Error *local_err = NULL;
> > > >  
> > > >      if (((cenv->cpuid_version >> 8) & 0xf) >= 6
> > > >          && (cenv->features[FEAT_1_EDX] & (CPUID_MCE | CPUID_MCA)) ==
> > > >              (CPUID_MCE | CPUID_MCA)) {
> > > >          cenv->mcg_cap = MCE_CAP_DEF | MCE_BANKS_DEF;
> > > > +
> > > > +        if (cpu->enable_lmce) {
> > > > +            if (!lmce_supported()) {
> > > > +                error_setg(&local_err, "KVM unavailable or LMCE not supported");
> > > > +                error_propagate(&error_abort, local_err);
> > > > +            }
> > > > +            cenv->mcg_cap |= MCG_LMCE_P;
> > > > +        }
> > > > +
> > > 
> > > This duplicates the existing check in kvm_arch_init_vcpu(). The
> > > difference is that the existing code is KVM-specific and doesn't
> > > stop initialization when capabilities are missing. We can unify
> > > them into a single mcg_cap-checking function as a follow-up.
> > >
> > 
> > If I reuse the existing MCE capability check in kvm_arch_init_vcpu(),
> > is it reasonable to make change to stop initialization if missing
> > capabilities? Or should we stop only for missing newly added capabilities
> > (e.g. LMCE) in order to keep backwards compatibility?
> 
> Ideally, yes. But in practice we need to check if we won't break
> existing setups that were working. If all kernel versions we care
> about always MCG_CTL_P|MCG_SER_P + 10 banks as supported, we can
> make all bits mandatory.
>

Let's stop only for LMCE in this patch series. Other bits may be
changed in future after the kernel support is clarified.

Thanks,
Haozhong

> I need to re-read the thread were kvm_get_mce_cap_supported() was
> discussed, to refresh my memory.
>
> -- 
> Eduardo
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

  reply	other threads:[~2016-06-20  2:04 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-16  6:06 [PATCH v4 0/3] Add QEMU support for Intel local MCE Haozhong Zhang
2016-06-16  6:06 ` [Qemu-devel] " Haozhong Zhang
2016-06-16  6:06 ` [PATCH v4 1/3] target-i386: KVM: add basic Intel LMCE support Haozhong Zhang
2016-06-16  6:06   ` [Qemu-devel] " Haozhong Zhang
2016-06-16  9:50   ` Paolo Bonzini
2016-06-16  9:50     ` [Qemu-devel] " Paolo Bonzini
2016-06-16 10:16     ` Haozhong Zhang
2016-06-16 10:16       ` [Qemu-devel] " Haozhong Zhang
2016-06-16 10:23       ` Paolo Bonzini
2016-06-16 10:23         ` [Qemu-devel] " Paolo Bonzini
2016-06-16 10:34         ` Haozhong Zhang
2016-06-16 10:34           ` [Qemu-devel] " Haozhong Zhang
2016-06-16 10:42           ` Paolo Bonzini
2016-06-16 10:42             ` [Qemu-devel] " Paolo Bonzini
2016-06-16 18:05             ` Eduardo Habkost
2016-06-16 18:05               ` [Qemu-devel] " Eduardo Habkost
2016-06-16 18:17               ` Paolo Bonzini
2016-06-16 18:17                 ` [Qemu-devel] " Paolo Bonzini
2016-06-16 19:37   ` Eduardo Habkost
2016-06-16 19:37     ` [Qemu-devel] " Eduardo Habkost
2016-06-17  1:26     ` Haozhong Zhang
2016-06-17  1:26       ` [Qemu-devel] " Haozhong Zhang
2016-06-17 16:20       ` Eduardo Habkost
2016-06-17 16:20         ` [Qemu-devel] " Eduardo Habkost
2016-06-20  2:04         ` Haozhong Zhang [this message]
2016-06-20  2:04           ` Haozhong Zhang
2016-06-16  6:06 ` [PATCH v4 2/3] target-i386: add migration support for Intel LMCE Haozhong Zhang
2016-06-16  6:06   ` [Qemu-devel] " Haozhong Zhang
2016-06-16  9:51   ` Paolo Bonzini
2016-06-16  9:51     ` [Qemu-devel] " Paolo Bonzini
2016-06-16 10:29     ` Haozhong Zhang
2016-06-16 10:29       ` [Qemu-devel] " Haozhong Zhang
2016-06-16 10:41       ` Paolo Bonzini
2016-06-16 10:41         ` [Qemu-devel] " Paolo Bonzini
2016-06-16 10:55         ` Haozhong Zhang
2016-06-16 10:55           ` [Qemu-devel] " Haozhong Zhang
2016-06-16 17:36           ` Eduardo Habkost
2016-06-16 17:36             ` [Qemu-devel] " Eduardo Habkost
2016-06-16 17:40             ` Paolo Bonzini
2016-06-16 17:40               ` [Qemu-devel] " Paolo Bonzini
2016-06-16 17:58               ` Eduardo Habkost
2016-06-16 17:58                 ` [Qemu-devel] " Eduardo Habkost
2016-06-17  2:01                 ` Haozhong Zhang
2016-06-17  2:01                   ` [Qemu-devel] " Haozhong Zhang
2016-06-17 17:20                   ` Eduardo Habkost
2016-06-17 17:20                     ` [Qemu-devel] " Eduardo Habkost
2016-06-17 17:26                     ` Paolo Bonzini
2016-06-17 17:26                       ` [Qemu-devel] " Paolo Bonzini
2016-06-20  2:11                     ` Haozhong Zhang
2016-06-20  2:11                       ` [Qemu-devel] " Haozhong Zhang
2016-06-20  6:58                       ` Paolo Bonzini
2016-06-20  6:58                         ` [Qemu-devel] " Paolo Bonzini
2016-06-20  7:26                         ` Haozhong Zhang
2016-06-16 19:53               ` Eduardo Habkost
2016-06-16 19:53                 ` [Qemu-devel] " Eduardo Habkost
2016-06-16  6:06 ` [PATCH v4 3/3] i386: publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg Haozhong Zhang
2016-06-16  6:06   ` [Qemu-devel] " Haozhong Zhang
2016-06-16  9:52   ` Paolo Bonzini
2016-06-16  9:52     ` [Qemu-devel] " Paolo Bonzini
2016-06-16 11:19     ` Haozhong Zhang
2016-06-16 11:19       ` [Qemu-devel] " Haozhong Zhang
2016-06-17 17:31       ` Laszlo Ersek
2016-06-17 17:31         ` [Qemu-devel] " Laszlo Ersek
2016-06-17 20:21         ` Raj, Ashok
2016-06-17 20:21           ` [Qemu-devel] " Raj, Ashok
2016-06-17 20:48           ` Laszlo Ersek
2016-06-17 20:48             ` [Qemu-devel] " Laszlo Ersek
2016-06-17 20:55             ` Raj, Ashok
2016-06-17 20:55               ` [Qemu-devel] " Raj, Ashok
2016-06-17 21:30               ` Laszlo Ersek
2016-06-17 21:30                 ` [Qemu-devel] " Laszlo Ersek
2016-06-20  3:09           ` Haozhong Zhang
2016-06-20  3:09             ` [Qemu-devel] " Haozhong Zhang
2016-06-20  6:56             ` Paolo Bonzini
2016-06-20  6:56               ` [Qemu-devel] " Paolo Bonzini
2016-06-20  7:20               ` Haozhong Zhang
2016-06-20  7:20                 ` [Qemu-devel] " Haozhong Zhang
2016-06-22 10:18         ` Haozhong Zhang
2016-06-22 10:18           ` [Qemu-devel] " Haozhong Zhang
2016-06-22 15:51           ` Laszlo Ersek
2016-06-22 15:51             ` [Qemu-devel] " Laszlo Ersek

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20160620020430.5hekpmxnflnn6dx5@hz-desktop \
    --to=haozhong.zhang@intel.com \
    --cc=andi.kleen@intel.com \
    --cc=ashok.raj@intel.com \
    --cc=bp@suse.de \
    --cc=ehabkost@redhat.com \
    --cc=kvm@vger.kernel.org \
    --cc=mst@redhat.com \
    --cc=mtosatti@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=rkrcmar@redhat.com \
    --cc=rth@twiddle.net \
    --cc=tony.luck@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.