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From: Rafael Aquini <aquini@redhat.com>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
	"open list:MEMORY MANAGEMENT" <linux-mm@kvack.org>,
	X86 ML <x86@kernel.org>, Andy Lutomirski <luto@kernel.org>,
	Andrea Arcangeli <aarcange@redhat.com>,
	lwoodman@redhat.com, Rik van Riel <riel@redhat.com>,
	Mel Gorman <mgorman@suse.de>,
	akpm@linux-foundation.org
Subject: Re: [PATCH] x86/mm: Add barriers and document switch_mm()-vs-flush synchronization follow-up
Date: Tue, 2 Aug 2016 19:12:30 -0400	[thread overview]
Message-ID: <20160802231229.GE32028@t510> (raw)
In-Reply-To: <746D30E7-2F58-42DB-95D8-D50922CAEB7E@gmail.com>

On Tue, Aug 02, 2016 at 03:27:06PM -0700, Nadav Amit wrote:
> Rafael Aquini <aquini@redhat.com> wrote:
> 
> > While backporting 71b3c126e611 ("x86/mm: Add barriers and document switch_mm()-vs-flush synchronization")
> > we stumbled across a possibly missing barrier at flush_tlb_page().
> 
> I too noticed it and submitted a similar patch that never got a response [1].
>

As far as I understood Andy's rationale for the original patch you need
a full memory barrier there in flush_tlb_page to get that cache-eviction
race sorted out.

Regards,
-- Rafael

WARNING: multiple messages have this Message-ID (diff)
From: Rafael Aquini <aquini@redhat.com>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
	"open list:MEMORY MANAGEMENT" <linux-mm@kvack.org>,
	X86 ML <x86@kernel.org>, Andy Lutomirski <luto@kernel.org>,
	Andrea Arcangeli <aarcange@redhat.com>,
	lwoodman@redhat.com, Rik van Riel <riel@redhat.com>,
	Mel Gorman <mgorman@suse.de>,
	akpm@linux-foundation.org
Subject: Re: [PATCH] x86/mm: Add barriers and document switch_mm()-vs-flush synchronization follow-up
Date: Tue, 2 Aug 2016 19:12:30 -0400	[thread overview]
Message-ID: <20160802231229.GE32028@t510> (raw)
In-Reply-To: <746D30E7-2F58-42DB-95D8-D50922CAEB7E@gmail.com>

On Tue, Aug 02, 2016 at 03:27:06PM -0700, Nadav Amit wrote:
> Rafael Aquini <aquini@redhat.com> wrote:
> 
> > While backporting 71b3c126e611 ("x86/mm: Add barriers and document switch_mm()-vs-flush synchronization")
> > we stumbled across a possibly missing barrier at flush_tlb_page().
> 
> I too noticed it and submitted a similar patch that never got a response [1].
>

As far as I understood Andy's rationale for the original patch you need
a full memory barrier there in flush_tlb_page to get that cache-eviction
race sorted out.

Regards,
-- Rafael

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  parent reply	other threads:[~2016-08-02 23:12 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-02 15:34 [PATCH] x86/mm: Add barriers and document switch_mm()-vs-flush synchronization follow-up Rafael Aquini
2016-08-02 15:34 ` Rafael Aquini
2016-08-02 22:27 ` Nadav Amit
2016-08-02 22:27   ` Nadav Amit
2016-08-02 22:34   ` Andy Lutomirski
2016-08-02 22:34     ` Andy Lutomirski
2016-08-02 23:12   ` Rafael Aquini [this message]
2016-08-02 23:12     ` Rafael Aquini
2016-08-03  0:46     ` Nadav Amit
2016-08-03  0:46       ` Nadav Amit

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