* [PATCH 0/3] r8a7796 SYS-DMAC integration
@ 2016-09-14 16:45 Ulrich Hecht
2016-09-14 16:45 ` [PATCH 1/3] clk: renesas: r8a7796: Add SYS-DMAC clocks Ulrich Hecht
` (3 more replies)
0 siblings, 4 replies; 13+ messages in thread
From: Ulrich Hecht @ 2016-09-14 16:45 UTC (permalink / raw)
To: linux-renesas-soc, geert; +Cc: horms, magnus.damm, Ulrich Hecht
Hi!
This enables the three DMA controllers. Identical to the setup on r8a7795.
Based on renesas-drivers-2016-09-13-v4.8-rc6.
CU
Uli
Ulrich Hecht (3):
clk: renesas: r8a7796: Add SYS-DMAC clocks
arm64: renesas: r8a7796: add SYS-DMAC controller nodes
dmaengine: rcar-dmac: Document R-Car M3-W bindings
.../devicetree/bindings/dma/renesas,rcar-dmac.txt | 1 +
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 99 ++++++++++++++++++++++
drivers/clk/renesas/r8a7796-cpg-mssr.c | 3 +
3 files changed, 103 insertions(+)
--
2.9.3
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH 1/3] clk: renesas: r8a7796: Add SYS-DMAC clocks 2016-09-14 16:45 [PATCH 0/3] r8a7796 SYS-DMAC integration Ulrich Hecht @ 2016-09-14 16:45 ` Ulrich Hecht 2016-09-15 11:19 ` Geert Uytterhoeven 2016-09-14 16:45 ` [PATCH 2/3] arm64: renesas: r8a7796: add SYS-DMAC controller nodes Ulrich Hecht ` (2 subsequent siblings) 3 siblings, 1 reply; 13+ messages in thread From: Ulrich Hecht @ 2016-09-14 16:45 UTC (permalink / raw) To: linux-renesas-soc, geert; +Cc: horms, magnus.damm, Ulrich Hecht Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> --- drivers/clk/renesas/r8a7796-cpg-mssr.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index eb347ed..c02fe34 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -109,6 +109,9 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { + DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S3D1), + DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S3D1), + DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S3D1), DEF_MOD("cmt3", 300, R8A7796_CLK_R), DEF_MOD("cmt2", 301, R8A7796_CLK_R), DEF_MOD("cmt1", 302, R8A7796_CLK_R), -- 2.9.3 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 1/3] clk: renesas: r8a7796: Add SYS-DMAC clocks 2016-09-14 16:45 ` [PATCH 1/3] clk: renesas: r8a7796: Add SYS-DMAC clocks Ulrich Hecht @ 2016-09-15 11:19 ` Geert Uytterhoeven 2016-09-20 8:59 ` Geert Uytterhoeven 0 siblings, 1 reply; 13+ messages in thread From: Geert Uytterhoeven @ 2016-09-15 11:19 UTC (permalink / raw) To: Ulrich Hecht; +Cc: Linux-Renesas, Simon Horman, Magnus Damm On Wed, Sep 14, 2016 at 6:45 PM, Ulrich Hecht <ulrich.hecht+renesas@gmail.com> wrote: > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> > --- > drivers/clk/renesas/r8a7796-cpg-mssr.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c > index eb347ed..c02fe34 100644 > --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c > +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c > @@ -109,6 +109,9 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { > }; > > static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { > + DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S3D1), > + DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S3D1), > + DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S3D1), It's not clear from the documentation what the actual parent clock is. The datasheet says "ZS", which we know is S3D1 on H3. However, Table 50.2 says ZS is S0D3 on M3-W (and H3 ES2.0).... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/3] clk: renesas: r8a7796: Add SYS-DMAC clocks 2016-09-15 11:19 ` Geert Uytterhoeven @ 2016-09-20 8:59 ` Geert Uytterhoeven 0 siblings, 0 replies; 13+ messages in thread From: Geert Uytterhoeven @ 2016-09-20 8:59 UTC (permalink / raw) To: Ulrich Hecht; +Cc: Linux-Renesas, Simon Horman, Magnus Damm On Thu, Sep 15, 2016 at 1:19 PM, Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Wed, Sep 14, 2016 at 6:45 PM, Ulrich Hecht > <ulrich.hecht+renesas@gmail.com> wrote: >> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> >> --- >> drivers/clk/renesas/r8a7796-cpg-mssr.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c >> index eb347ed..c02fe34 100644 >> --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c >> +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c >> @@ -109,6 +109,9 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { >> }; >> >> static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { >> + DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S3D1), >> + DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S3D1), >> + DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S3D1), > > It's not clear from the documentation what the actual parent clock is. > The datasheet says "ZS", which we know is S3D1 on H3. > However, Table 50.2 says ZS is S0D3 on M3-W (and H3 ES2.0).... Queuing in clk-renesas-for-v4.10 with parent clock fixed to S0D3. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 2/3] arm64: renesas: r8a7796: add SYS-DMAC controller nodes 2016-09-14 16:45 [PATCH 0/3] r8a7796 SYS-DMAC integration Ulrich Hecht 2016-09-14 16:45 ` [PATCH 1/3] clk: renesas: r8a7796: Add SYS-DMAC clocks Ulrich Hecht @ 2016-09-14 16:45 ` Ulrich Hecht 2016-09-15 11:30 ` Geert Uytterhoeven 2016-09-14 16:45 ` [PATCH 3/3] dmaengine: rcar-dmac: Document R-Car M3-W bindings Ulrich Hecht 2016-10-28 9:12 ` [PATCH 0/3] r8a7796 SYS-DMAC integration Magnus Damm 3 siblings, 1 reply; 13+ messages in thread From: Ulrich Hecht @ 2016-09-14 16:45 UTC (permalink / raw) To: linux-renesas-soc, geert; +Cc: horms, magnus.damm, Ulrich Hecht Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 99 ++++++++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 3aae29f..d7590c3 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -252,6 +252,105 @@ status = "disabled"; }; + dmac0: dma-controller@e6700000 { + compatible = "renesas,dmac-r8a7796", + "renesas,rcar-dmac"; + reg = <0 0xe6700000 0 0x10000>; + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 219>; + clock-names = "fck"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #dma-cells = <1>; + dma-channels = <16>; + }; + + dmac1: dma-controller@e7300000 { + compatible = "renesas,dmac-r8a7796", + "renesas,rcar-dmac"; + reg = <0 0xe7300000 0 0x10000>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 218>; + clock-names = "fck"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #dma-cells = <1>; + dma-channels = <16>; + }; + + dmac2: dma-controller@e7310000 { + compatible = "renesas,dmac-r8a7796", + "renesas,rcar-dmac"; + reg = <0 0xe7310000 0 0x10000>; + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 217>; + clock-names = "fck"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + #dma-cells = <1>; + dma-channels = <16>; + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a7796"; reg = <0 0xee100000 0 0x2000>; -- 2.9.3 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 2/3] arm64: renesas: r8a7796: add SYS-DMAC controller nodes 2016-09-14 16:45 ` [PATCH 2/3] arm64: renesas: r8a7796: add SYS-DMAC controller nodes Ulrich Hecht @ 2016-09-15 11:30 ` Geert Uytterhoeven 2016-09-15 12:43 ` Simon Horman 0 siblings, 1 reply; 13+ messages in thread From: Geert Uytterhoeven @ 2016-09-15 11:30 UTC (permalink / raw) To: Ulrich Hecht; +Cc: Linux-Renesas, Simon Horman, Magnus Damm On Wed, Sep 14, 2016 at 6:45 PM, Ulrich Hecht <ulrich.hecht+renesas@gmail.com> wrote: > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/3] arm64: renesas: r8a7796: add SYS-DMAC controller nodes 2016-09-15 11:30 ` Geert Uytterhoeven @ 2016-09-15 12:43 ` Simon Horman 0 siblings, 0 replies; 13+ messages in thread From: Simon Horman @ 2016-09-15 12:43 UTC (permalink / raw) To: Geert Uytterhoeven; +Cc: Ulrich Hecht, Linux-Renesas, Magnus Damm On Thu, Sep 15, 2016 at 01:30:41PM +0200, Geert Uytterhoeven wrote: > On Wed, Sep 14, 2016 at 6:45 PM, Ulrich Hecht > <ulrich.hecht+renesas@gmail.com> wrote: > > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> I'd like to see a conclusion to the discussion of the clock patch (1/3) before queueing this up. Please repost or ping me once that has happened. ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 3/3] dmaengine: rcar-dmac: Document R-Car M3-W bindings 2016-09-14 16:45 [PATCH 0/3] r8a7796 SYS-DMAC integration Ulrich Hecht 2016-09-14 16:45 ` [PATCH 1/3] clk: renesas: r8a7796: Add SYS-DMAC clocks Ulrich Hecht 2016-09-14 16:45 ` [PATCH 2/3] arm64: renesas: r8a7796: add SYS-DMAC controller nodes Ulrich Hecht @ 2016-09-14 16:45 ` Ulrich Hecht 2016-09-15 11:30 ` Geert Uytterhoeven 2016-10-28 9:12 ` [PATCH 0/3] r8a7796 SYS-DMAC integration Magnus Damm 3 siblings, 1 reply; 13+ messages in thread From: Ulrich Hecht @ 2016-09-14 16:45 UTC (permalink / raw) To: linux-renesas-soc, geert; +Cc: horms, magnus.damm, Ulrich Hecht Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> --- Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt index 5b902ac..5df8f4e 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt +++ b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt @@ -22,6 +22,7 @@ Required Properties: - "renesas,dmac-r8a7793" (R-Car M2-N) - "renesas,dmac-r8a7794" (R-Car E2) - "renesas,dmac-r8a7795" (R-Car H3) + - "renesas,dmac-r8a7796" (R-Car M3-W) - reg: base address and length of the registers block for the DMAC -- 2.9.3 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 3/3] dmaengine: rcar-dmac: Document R-Car M3-W bindings 2016-09-14 16:45 ` [PATCH 3/3] dmaengine: rcar-dmac: Document R-Car M3-W bindings Ulrich Hecht @ 2016-09-15 11:30 ` Geert Uytterhoeven 0 siblings, 0 replies; 13+ messages in thread From: Geert Uytterhoeven @ 2016-09-15 11:30 UTC (permalink / raw) To: Ulrich Hecht; +Cc: Linux-Renesas, Simon Horman, Magnus Damm On Wed, Sep 14, 2016 at 6:45 PM, Ulrich Hecht <ulrich.hecht+renesas@gmail.com> wrote: > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 0/3] r8a7796 SYS-DMAC integration 2016-09-14 16:45 [PATCH 0/3] r8a7796 SYS-DMAC integration Ulrich Hecht ` (2 preceding siblings ...) 2016-09-14 16:45 ` [PATCH 3/3] dmaengine: rcar-dmac: Document R-Car M3-W bindings Ulrich Hecht @ 2016-10-28 9:12 ` Magnus Damm 2016-10-28 13:50 ` Simon Horman 3 siblings, 1 reply; 13+ messages in thread From: Magnus Damm @ 2016-10-28 9:12 UTC (permalink / raw) To: Ulrich Hecht; +Cc: Linux-Renesas, Geert Uytterhoeven, Simon Horman [Horms] Hi Ulrich, Simon, everyone, On Thu, Sep 15, 2016 at 1:45 AM, Ulrich Hecht <ulrich.hecht+renesas@gmail.com> wrote: > Hi! > > This enables the three DMA controllers. Identical to the setup on r8a7795. > Based on renesas-drivers-2016-09-13-v4.8-rc6. > > CU > Uli > > > Ulrich Hecht (3): > clk: renesas: r8a7796: Add SYS-DMAC clocks > arm64: renesas: r8a7796: add SYS-DMAC controller nodes > dmaengine: rcar-dmac: Document R-Car M3-W bindings Thanks for your efforts. I noticed that the clock bits have been queued up by Geert, but other parts seem to be missing. Can you please ping/poke/resend or whatever is needed to move the rest of the series forward? Best, / magnus ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 0/3] r8a7796 SYS-DMAC integration 2016-10-28 9:12 ` [PATCH 0/3] r8a7796 SYS-DMAC integration Magnus Damm @ 2016-10-28 13:50 ` Simon Horman 2016-10-28 13:56 ` Magnus Damm 0 siblings, 1 reply; 13+ messages in thread From: Simon Horman @ 2016-10-28 13:50 UTC (permalink / raw) To: Magnus Damm; +Cc: Ulrich Hecht, Linux-Renesas, Geert Uytterhoeven On Fri, Oct 28, 2016 at 06:12:37PM +0900, Magnus Damm wrote: > Hi Ulrich, Simon, everyone, > > On Thu, Sep 15, 2016 at 1:45 AM, Ulrich Hecht > <ulrich.hecht+renesas@gmail.com> wrote: > > Hi! > > > > This enables the three DMA controllers. Identical to the setup on r8a7795. > > Based on renesas-drivers-2016-09-13-v4.8-rc6. > > > > CU > > Uli > > > > > > Ulrich Hecht (3): > > clk: renesas: r8a7796: Add SYS-DMAC clocks > > arm64: renesas: r8a7796: add SYS-DMAC controller nodes > > dmaengine: rcar-dmac: Document R-Car M3-W bindings > > Thanks for your efforts. I noticed that the clock bits have been > queued up by Geert, but other parts seem to be missing. > > Can you please ping/poke/resend or whatever is needed to move the rest > of the series forward? I'm happy to queue up the arm64 patch (which Ulrich recently pinged me about). But I wanted to first confirm that it doesn't haven any implications for enabling 64bit memory. ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 0/3] r8a7796 SYS-DMAC integration 2016-10-28 13:50 ` Simon Horman @ 2016-10-28 13:56 ` Magnus Damm 2016-10-31 8:32 ` Simon Horman 0 siblings, 1 reply; 13+ messages in thread From: Magnus Damm @ 2016-10-28 13:56 UTC (permalink / raw) To: Simon Horman; +Cc: Ulrich Hecht, Linux-Renesas, Geert Uytterhoeven Hi Simon, On Fri, Oct 28, 2016 at 10:50 PM, Simon Horman <horms@verge.net.au> wrote: > On Fri, Oct 28, 2016 at 06:12:37PM +0900, Magnus Damm wrote: >> Hi Ulrich, Simon, everyone, >> >> On Thu, Sep 15, 2016 at 1:45 AM, Ulrich Hecht >> <ulrich.hecht+renesas@gmail.com> wrote: >> > Hi! >> > >> > This enables the three DMA controllers. Identical to the setup on r8a7795. >> > Based on renesas-drivers-2016-09-13-v4.8-rc6. >> > >> > CU >> > Uli >> > >> > >> > Ulrich Hecht (3): >> > clk: renesas: r8a7796: Add SYS-DMAC clocks >> > arm64: renesas: r8a7796: add SYS-DMAC controller nodes >> > dmaengine: rcar-dmac: Document R-Car M3-W bindings >> >> Thanks for your efforts. I noticed that the clock bits have been >> queued up by Geert, but other parts seem to be missing. >> >> Can you please ping/poke/resend or whatever is needed to move the rest >> of the series forward? > > I'm happy to queue up the arm64 patch (which Ulrich recently pinged me > about). But I wanted to first confirm that it doesn't haven any > implications for enabling 64bit memory. Thanks. The SYS-DMAC hardware is a rare case that is able to perform 64-bit bus mastering without the IPMMU, so it is fine to enable at this point even though the IPMMU is not available. Cheers, / magnus ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 0/3] r8a7796 SYS-DMAC integration 2016-10-28 13:56 ` Magnus Damm @ 2016-10-31 8:32 ` Simon Horman 0 siblings, 0 replies; 13+ messages in thread From: Simon Horman @ 2016-10-31 8:32 UTC (permalink / raw) To: Magnus Damm; +Cc: Ulrich Hecht, Linux-Renesas, Geert Uytterhoeven On Fri, Oct 28, 2016 at 10:56:18PM +0900, Magnus Damm wrote: > Hi Simon, > > On Fri, Oct 28, 2016 at 10:50 PM, Simon Horman <horms@verge.net.au> wrote: > > On Fri, Oct 28, 2016 at 06:12:37PM +0900, Magnus Damm wrote: > >> Hi Ulrich, Simon, everyone, > >> > >> On Thu, Sep 15, 2016 at 1:45 AM, Ulrich Hecht > >> <ulrich.hecht+renesas@gmail.com> wrote: > >> > Hi! > >> > > >> > This enables the three DMA controllers. Identical to the setup on r8a7795. > >> > Based on renesas-drivers-2016-09-13-v4.8-rc6. > >> > > >> > CU > >> > Uli > >> > > >> > > >> > Ulrich Hecht (3): > >> > clk: renesas: r8a7796: Add SYS-DMAC clocks > >> > arm64: renesas: r8a7796: add SYS-DMAC controller nodes > >> > dmaengine: rcar-dmac: Document R-Car M3-W bindings > >> > >> Thanks for your efforts. I noticed that the clock bits have been > >> queued up by Geert, but other parts seem to be missing. > >> > >> Can you please ping/poke/resend or whatever is needed to move the rest > >> of the series forward? > > > > I'm happy to queue up the arm64 patch (which Ulrich recently pinged me > > about). But I wanted to first confirm that it doesn't haven any > > implications for enabling 64bit memory. > > Thanks. The SYS-DMAC hardware is a rare case that is able to perform > 64-bit bus mastering without the IPMMU, so it is fine to enable at > this point even though the IPMMU is not available. Hi Magnus, thanks for clarifying that. I have queued up the "arm64" patch listed above. ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2016-10-31 8:32 UTC | newest] Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-09-14 16:45 [PATCH 0/3] r8a7796 SYS-DMAC integration Ulrich Hecht 2016-09-14 16:45 ` [PATCH 1/3] clk: renesas: r8a7796: Add SYS-DMAC clocks Ulrich Hecht 2016-09-15 11:19 ` Geert Uytterhoeven 2016-09-20 8:59 ` Geert Uytterhoeven 2016-09-14 16:45 ` [PATCH 2/3] arm64: renesas: r8a7796: add SYS-DMAC controller nodes Ulrich Hecht 2016-09-15 11:30 ` Geert Uytterhoeven 2016-09-15 12:43 ` Simon Horman 2016-09-14 16:45 ` [PATCH 3/3] dmaengine: rcar-dmac: Document R-Car M3-W bindings Ulrich Hecht 2016-09-15 11:30 ` Geert Uytterhoeven 2016-10-28 9:12 ` [PATCH 0/3] r8a7796 SYS-DMAC integration Magnus Damm 2016-10-28 13:50 ` Simon Horman 2016-10-28 13:56 ` Magnus Damm 2016-10-31 8:32 ` Simon Horman
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