* [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test
@ 2016-09-21 5:09 Peter Xu
2016-09-21 5:09 ` [kvm-unit-tests PATCH v2 1/2] x86: apic: eoi() for deadline timer isr Peter Xu
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Peter Xu @ 2016-09-21 5:09 UTC (permalink / raw)
To: kvm; +Cc: drjones, pbonzini, rkrcmar, peterx
1st patch fixes not eoi()ing in existing deadline timer isr.
2nd patch adds lvtt test. Please review. Thanks!
v2
- adding eoi() in LVT timer handler, otherwise continuous interrupt
will be ignored (found this when testing together with deadline
timer)
- better comments for "initial" [Drew]
- check lvtt_counter==1 in report() [Drew]
- setting x86/apic timeout to 30s [Drew]
Peter Xu (2):
x86: apic: eoi() for deadline timer isr
x86: apic: add LVT timer test
x86/apic.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
x86/unittests.cfg | 1 +
2 files changed, 45 insertions(+)
--
2.7.4
^ permalink raw reply [flat|nested] 6+ messages in thread* [kvm-unit-tests PATCH v2 1/2] x86: apic: eoi() for deadline timer isr 2016-09-21 5:09 [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test Peter Xu @ 2016-09-21 5:09 ` Peter Xu 2016-09-21 5:09 ` [kvm-unit-tests PATCH v2 2/2] x86: apic: add LVT timer test Peter Xu ` (2 subsequent siblings) 3 siblings, 0 replies; 6+ messages in thread From: Peter Xu @ 2016-09-21 5:09 UTC (permalink / raw) To: kvm; +Cc: drjones, pbonzini, rkrcmar, peterx Otherwise the next LVT timer interrupt will be dropped (though we still do not have a "next" yet, but that's not a reason for not eoi()ing). Signed-off-by: Peter Xu <peterx@redhat.com> --- x86/apic.c | 1 + 1 file changed, 1 insertion(+) diff --git a/x86/apic.c b/x86/apic.c index 5fc83c6..3a30f0f 100644 --- a/x86/apic.c +++ b/x86/apic.c @@ -25,6 +25,7 @@ static int tdt_count; static void tsc_deadline_timer_isr(isr_regs_t *regs) { ++tdt_count; + eoi(); } static void __test_tsc_deadline_timer(void) -- 2.7.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [kvm-unit-tests PATCH v2 2/2] x86: apic: add LVT timer test 2016-09-21 5:09 [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test Peter Xu 2016-09-21 5:09 ` [kvm-unit-tests PATCH v2 1/2] x86: apic: eoi() for deadline timer isr Peter Xu @ 2016-09-21 5:09 ` Peter Xu 2016-09-21 8:10 ` Andrew Jones 2016-09-21 8:12 ` [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test Andrew Jones 2016-09-22 22:41 ` Radim Krčmář 3 siblings, 1 reply; 6+ messages in thread From: Peter Xu @ 2016-09-21 5:09 UTC (permalink / raw) To: kvm; +Cc: drjones, pbonzini, rkrcmar, peterx This is fairly basic, and guest codes are rarely changed. However it might be something good to have to let APIC tests more complete. Signed-off-by: Peter Xu <peterx@redhat.com> --- x86/apic.c | 43 +++++++++++++++++++++++++++++++++++++++++++ x86/unittests.cfg | 1 + 2 files changed, 44 insertions(+) diff --git a/x86/apic.c b/x86/apic.c index 3a30f0f..4dc7a7b 100644 --- a/x86/apic.c +++ b/x86/apic.c @@ -351,6 +351,48 @@ static void test_multiple_nmi(void) report("multiple nmi", ok); } +static volatile int lvtt_counter = 0; + +static void lvtt_handler(isr_regs_t *regs) +{ + lvtt_counter++; + eoi(); +} + +static void test_apic_timer_one_shot(void) +{ + uint64_t tsc1, tsc2; + static const uint32_t interval = 0x10000; + +#define APIC_LVT_TIMER_VECTOR (0xee) +#define APIC_LVT_TIMER_ONE_SHOT (0) + + handle_irq(APIC_LVT_TIMER_VECTOR, lvtt_handler); + irq_enable(); + + /* One shot mode */ + apic_write(APIC_LVTT, APIC_LVT_TIMER_ONE_SHOT | + APIC_LVT_TIMER_VECTOR); + /* Divider == 1 */ + apic_write(APIC_TDCR, 0x0000000b); + + tsc1 = rdtsc(); + /* Set "Initial Counter Register", which starts the timer */ + apic_write(APIC_TMICT, interval); + while (!lvtt_counter); + tsc2 = rdtsc(); + + /* + * For LVT Timer clock, SDM vol 3 10.5.4 says it should be + * derived from processor's bus clock (IIUC which is the same + * as TSC), however QEMU seems to be using nanosecond. In all + * cases, the following should satisfy on all modern + * processors. + */ + report("APIC LVT timer one shot", (lvtt_counter == 1) && + (tsc2 - tsc1 >= interval)); +} + int main() { setup_vm(); @@ -369,6 +411,7 @@ int main() test_sti_nmi(); test_multiple_nmi(); + test_apic_timer_one_shot(); test_tsc_deadline_timer(); return report_summary(); diff --git a/x86/unittests.cfg b/x86/unittests.cfg index 4a1f74e..7242517 100644 --- a/x86/unittests.cfg +++ b/x86/unittests.cfg @@ -30,6 +30,7 @@ file = apic.flat smp = 2 extra_params = -cpu qemu64,+x2apic,+tsc-deadline arch = x86_64 +timeout = 30 [ioapic] file = ioapic.flat -- 2.7.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [kvm-unit-tests PATCH v2 2/2] x86: apic: add LVT timer test 2016-09-21 5:09 ` [kvm-unit-tests PATCH v2 2/2] x86: apic: add LVT timer test Peter Xu @ 2016-09-21 8:10 ` Andrew Jones 0 siblings, 0 replies; 6+ messages in thread From: Andrew Jones @ 2016-09-21 8:10 UTC (permalink / raw) To: Peter Xu; +Cc: kvm, pbonzini, rkrcmar On Wed, Sep 21, 2016 at 01:09:42PM +0800, Peter Xu wrote: > This is fairly basic, and guest codes are rarely changed. However it > might be something good to have to let APIC tests more complete. > > Signed-off-by: Peter Xu <peterx@redhat.com> > --- > x86/apic.c | 43 +++++++++++++++++++++++++++++++++++++++++++ > x86/unittests.cfg | 1 + > 2 files changed, 44 insertions(+) > > diff --git a/x86/apic.c b/x86/apic.c > index 3a30f0f..4dc7a7b 100644 > --- a/x86/apic.c > +++ b/x86/apic.c > @@ -351,6 +351,48 @@ static void test_multiple_nmi(void) > report("multiple nmi", ok); > } > > +static volatile int lvtt_counter = 0; > + > +static void lvtt_handler(isr_regs_t *regs) > +{ > + lvtt_counter++; > + eoi(); > +} > + > +static void test_apic_timer_one_shot(void) > +{ > + uint64_t tsc1, tsc2; > + static const uint32_t interval = 0x10000; > + > +#define APIC_LVT_TIMER_VECTOR (0xee) > +#define APIC_LVT_TIMER_ONE_SHOT (0) > + > + handle_irq(APIC_LVT_TIMER_VECTOR, lvtt_handler); > + irq_enable(); > + > + /* One shot mode */ > + apic_write(APIC_LVTT, APIC_LVT_TIMER_ONE_SHOT | > + APIC_LVT_TIMER_VECTOR); > + /* Divider == 1 */ > + apic_write(APIC_TDCR, 0x0000000b); > + > + tsc1 = rdtsc(); > + /* Set "Initial Counter Register", which starts the timer */ > + apic_write(APIC_TMICT, interval); > + while (!lvtt_counter); > + tsc2 = rdtsc(); > + > + /* > + * For LVT Timer clock, SDM vol 3 10.5.4 says it should be > + * derived from processor's bus clock (IIUC which is the same > + * as TSC), however QEMU seems to be using nanosecond. In all > + * cases, the following should satisfy on all modern > + * processors. > + */ > + report("APIC LVT timer one shot", (lvtt_counter == 1) && > + (tsc2 - tsc1 >= interval)); nit: superfluous ()'s here > +} > + > int main() > { > setup_vm(); > @@ -369,6 +411,7 @@ int main() > test_sti_nmi(); > test_multiple_nmi(); > > + test_apic_timer_one_shot(); > test_tsc_deadline_timer(); > > return report_summary(); > diff --git a/x86/unittests.cfg b/x86/unittests.cfg > index 4a1f74e..7242517 100644 > --- a/x86/unittests.cfg > +++ b/x86/unittests.cfg > @@ -30,6 +30,7 @@ file = apic.flat > smp = 2 > extra_params = -cpu qemu64,+x2apic,+tsc-deadline > arch = x86_64 > +timeout = 30 > > [ioapic] > file = ioapic.flat > -- > 2.7.4 > > -- > To unsubscribe from this list: send the line "unsubscribe kvm" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test 2016-09-21 5:09 [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test Peter Xu 2016-09-21 5:09 ` [kvm-unit-tests PATCH v2 1/2] x86: apic: eoi() for deadline timer isr Peter Xu 2016-09-21 5:09 ` [kvm-unit-tests PATCH v2 2/2] x86: apic: add LVT timer test Peter Xu @ 2016-09-21 8:12 ` Andrew Jones 2016-09-22 22:41 ` Radim Krčmář 3 siblings, 0 replies; 6+ messages in thread From: Andrew Jones @ 2016-09-21 8:12 UTC (permalink / raw) To: Peter Xu; +Cc: kvm, pbonzini, rkrcmar On Wed, Sep 21, 2016 at 01:09:40PM +0800, Peter Xu wrote: > 1st patch fixes not eoi()ing in existing deadline timer isr. > > 2nd patch adds lvtt test. Please review. Thanks! > > v2 > - adding eoi() in LVT timer handler, otherwise continuous interrupt > will be ignored (found this when testing together with deadline > timer) > - better comments for "initial" [Drew] > - check lvtt_counter==1 in report() [Drew] > - setting x86/apic timeout to 30s [Drew] > > Peter Xu (2): > x86: apic: eoi() for deadline timer isr > x86: apic: add LVT timer test > > x86/apic.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ > x86/unittests.cfg | 1 + > 2 files changed, 45 insertions(+) > > -- > 2.7.4 Both patches look good to me. Thanks, drew ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test 2016-09-21 5:09 [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test Peter Xu ` (2 preceding siblings ...) 2016-09-21 8:12 ` [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test Andrew Jones @ 2016-09-22 22:41 ` Radim Krčmář 3 siblings, 0 replies; 6+ messages in thread From: Radim Krčmář @ 2016-09-22 22:41 UTC (permalink / raw) To: Peter Xu; +Cc: kvm, drjones, pbonzini 2016-09-21 13:09+0800, Peter Xu: > 1st patch fixes not eoi()ing in existing deadline timer isr. > > 2nd patch adds lvtt test. Please review. Thanks! > > v2 > - adding eoi() in LVT timer handler, otherwise continuous interrupt > will be ignored (found this when testing together with deadline > timer) > - better comments for "initial" [Drew] > - check lvtt_counter==1 in report() [Drew] > - setting x86/apic timeout to 30s [Drew] Applied, thanks. ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-09-22 22:41 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-09-21 5:09 [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test Peter Xu 2016-09-21 5:09 ` [kvm-unit-tests PATCH v2 1/2] x86: apic: eoi() for deadline timer isr Peter Xu 2016-09-21 5:09 ` [kvm-unit-tests PATCH v2 2/2] x86: apic: add LVT timer test Peter Xu 2016-09-21 8:10 ` Andrew Jones 2016-09-21 8:12 ` [kvm-unit-tests PATCH v2 0/2] x86: apic: add LVTT test Andrew Jones 2016-09-22 22:41 ` Radim Krčmář
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