[Qemu-devel] [PULL 0/4] target-mips queue

[Qemu-devel] [PULL 0/4] target-mips queue

[Yongbok Kim]

Hi,

This is pull-req for target-mips.

Regards,
Yongbok

The following changes since commit bd8ef5060dd2124a54578241da9a572faf7658dd:

  Merge remote-tracking branch 'dgibson/tags/ppc-for-2.8-20161201' into staging (2016-12-01 13:39:29 +0000)

are available in the git repository at:

  git://github.com/yongbok/upstream-qemu.git tags/mips-20161204

for you to fetch changes up to e6e2784cacd4cfec149a7690976b9ff15e541c4d:

  target-mips: fix bad shifts in {dextp|dextpdp} (2016-12-04 00:57:06 +0000)

----------------------------------------------------------------
MIPS patches 2016-12-04

Changes:
* Fix Loongson instructions
* Fix bad shifts in {dextp|dextpdp}

----------------------------------------------------------------
Heiher (3):
      target-mips: Fix Loongson pandn instruction.
      target-mips: Fix Loongson multimedia 'or' instruction.
      target-mips: Fix Loongson multimedia instructions.

Yongbok Kim (1):
      target-mips: fix bad shifts in {dextp|dextpdp}

 target-mips/dsp_helper.c | 4 ++--
 target-mips/translate.c  | 8 ++++++--
 2 files changed, 8 insertions(+), 4 deletions(-)

[Qemu-devel] [PULL 1/4] target-mips: Fix Loongson pandn instruction.

[Yongbok Kim]

From: Heiher <wangr@lemote.com>

pandn FD, FS, FT
Operation: FD = ((NOT FS) AND FT)

Signed-off-by: Heiher <wangr@lemote.com>
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
---
 target-mips/translate.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index d8dde7a..5ad97c7 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -3945,9 +3945,12 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
     LMI_DIRECT(XOR_CP2, xor, xor);
     LMI_DIRECT(NOR_CP2, nor, nor);
     LMI_DIRECT(AND_CP2, and, and);
-    LMI_DIRECT(PANDN, pandn, andc);
     LMI_DIRECT(OR, or, or);
 
+    case OPC_PANDN:
+        tcg_gen_andc_i64(t0, t1, t0);
+        break;
+
     case OPC_PINSRH_0:
         tcg_gen_deposit_i64(t0, t0, t1, 0, 16);
         break;
-- 
2.7.4

[Qemu-devel] [PULL 2/4] target-mips: Fix Loongson multimedia 'or' instruction.

[Yongbok Kim]

From: Heiher <wangr@lemote.com>

Signed-off-by: Heiher <wangr@lemote.com>
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
---
 target-mips/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 5ad97c7..e26f742 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -3945,7 +3945,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
     LMI_DIRECT(XOR_CP2, xor, xor);
     LMI_DIRECT(NOR_CP2, nor, nor);
     LMI_DIRECT(AND_CP2, and, and);
-    LMI_DIRECT(OR, or, or);
+    LMI_DIRECT(OR_CP2, or, or);
 
     case OPC_PANDN:
         tcg_gen_andc_i64(t0, t1, t0);
-- 
2.7.4

[Qemu-devel] [PULL 3/4] target-mips: Fix Loongson multimedia instructions.

[Yongbok Kim]

From: Heiher <wangr@lemote.com>

Needed to emit FPU exception on Loongson multimedia instructions
executing if Status:CU1 is clear. or FPR changes may be missed
on Linux.

Signed-off-by: Heiher <wangr@lemote.com>
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
---
 target-mips/translate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index e26f742..57b824f 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -3871,6 +3871,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
         break;
     }
 
+    check_cp1_enabled(ctx);
     gen_load_fpr64(ctx, t0, rs);
     gen_load_fpr64(ctx, t1, rt);
 
-- 
2.7.4

[Qemu-devel] [PULL 4/4] target-mips: fix bad shifts in {dextp|dextpdp}

[Yongbok Kim]

Fixed issues in the MIPSDSP64 instructions dextp and dextpdp.
Shifting can go out of 32 bit range.

https://bugs.launchpad.net/qemu/+bug/1631625

Reported-by: Thomas Huth <thuth@redhat.com>
Reported-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
---
 target-mips/dsp_helper.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index df7d220..dc70793 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -3477,7 +3477,7 @@ target_ulong helper_dextp(target_ulong ac, target_ulong size, CPUMIPSState *env)
 
     if (sub >= -1) {
         temp = (tempB << (64 - len)) | (tempA >> len);
-        temp = temp & ((0x01 << (size + 1)) - 1);
+        temp = temp & ((1ULL << (size + 1)) - 1);
         set_DSPControl_efi(0, env);
     } else {
         set_DSPControl_efi(1, env);
@@ -3506,7 +3506,7 @@ target_ulong helper_dextpdp(target_ulong ac, target_ulong size,
 
     if (sub >= -1) {
         temp = (tempB << (64 - len)) | (tempA >> len);
-        temp = temp & ((0x01 << (size + 1)) - 1);
+        temp = temp & ((1ULL << (size + 1)) - 1);
         set_DSPControl_pos(sub, env);
         set_DSPControl_efi(0, env);
     } else {
-- 
2.7.4

Re: [Qemu-devel] [PULL 0/4] target-mips queue

[Stefan Hajnoczi]

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On Sun, Dec 04, 2016 at 02:00:13AM +0000, Yongbok Kim wrote:
> Hi,
> 
> This is pull-req for target-mips.
> 
> Regards,
> Yongbok
> 
> The following changes since commit bd8ef5060dd2124a54578241da9a572faf7658dd:
> 
>   Merge remote-tracking branch 'dgibson/tags/ppc-for-2.8-20161201' into staging (2016-12-01 13:39:29 +0000)
> 
> are available in the git repository at:
> 
>   git://github.com/yongbok/upstream-qemu.git tags/mips-20161204
> 
> for you to fetch changes up to e6e2784cacd4cfec149a7690976b9ff15e541c4d:
> 
>   target-mips: fix bad shifts in {dextp|dextpdp} (2016-12-04 00:57:06 +0000)
> 
> ----------------------------------------------------------------
> MIPS patches 2016-12-04
> 
> Changes:
> * Fix Loongson instructions
> * Fix bad shifts in {dextp|dextpdp}
> 
> ----------------------------------------------------------------
> Heiher (3):
>       target-mips: Fix Loongson pandn instruction.
>       target-mips: Fix Loongson multimedia 'or' instruction.
>       target-mips: Fix Loongson multimedia instructions.
> 
> Yongbok Kim (1):
>       target-mips: fix bad shifts in {dextp|dextpdp}
> 
>  target-mips/dsp_helper.c | 4 ++--
>  target-mips/translate.c  | 8 ++++++--
>  2 files changed, 8 insertions(+), 4 deletions(-)
> 
> 

Thanks, applied to my staging tree:
https://github.com/stefanha/qemu/commits/staging

Stefan

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[Qemu-devel] [PULL 0/4] target-mips queue

[Leon Alrae]

Hi,

Here's my target-mips queue, few fixes and includes clean-up.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit 047e363b05679724d6b784c6ec6310697fe48ba0:

  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-softfloat-20160122' into staging (2016-01-22 15:19:21 +0000)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20160125

for you to fetch changes up to c684822ad29968af09735148f03a511bc514589d:

  mips: Clean up includes (2016-01-23 14:30:04 +0000)

----------------------------------------------------------------
MIPS patches 2016-01-25

Changes:
* fixes and includes clean-up

----------------------------------------------------------------
Aurelien Jarno (1):
      target-mips: silence NaNs for cvt.s.d and cvt.d.s

Dongxue Zhang (1):
      target-mips/cpu.h: Fix spell error

Miodrag Dinic (1):
      target-mips: Fix ALIGN instruction when bp=0

Peter Maydell (1):
      mips: Clean up includes

 disas/mips.c             |  1 +
 hw/mips/addr.c           |  1 +
 hw/mips/cputimer.c       |  1 +
 hw/mips/gt64xxx_pci.c    |  1 +
 hw/mips/mips_fulong2e.c  |  1 +
 hw/mips/mips_int.c       |  1 +
 hw/mips/mips_jazz.c      |  1 +
 hw/mips/mips_malta.c     |  1 +
 hw/mips/mips_mipssim.c   |  1 +
 hw/mips/mips_r4k.c       |  1 +
 target-mips/cpu.c        |  1 +
 target-mips/cpu.h        |  2 +-
 target-mips/dsp_helper.c |  1 +
 target-mips/gdbstub.c    |  2 +-
 target-mips/helper.c     |  6 +-----
 target-mips/kvm.c        |  2 +-
 target-mips/lmi_helper.c |  1 +
 target-mips/machine.c    |  1 +
 target-mips/mips-semi.c  |  2 +-
 target-mips/msa_helper.c |  1 +
 target-mips/op_helper.c  |  4 +++-
 target-mips/translate.c  | 12 +++++++++++-
 22 files changed, 34 insertions(+), 11 deletions(-)

Re: [Qemu-devel] [PULL 0/4] target-mips queue

[Peter Maydell]

On 25 January 2016 at 10:02, Leon Alrae <leon.alrae@imgtec.com> wrote:
> Hi,
>
> Here's my target-mips queue, few fixes and includes clean-up.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
>
> The following changes since commit 047e363b05679724d6b784c6ec6310697fe48ba0:
>
>   Merge remote-tracking branch 'remotes/pmaydell/tags/pull-softfloat-20160122' into staging (2016-01-22 15:19:21 +0000)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20160125
>
> for you to fetch changes up to c684822ad29968af09735148f03a511bc514589d:
>
>   mips: Clean up includes (2016-01-23 14:30:04 +0000)
>
> ----------------------------------------------------------------
> MIPS patches 2016-01-25
>
> Changes:
> * fixes and includes clean-up

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/4] target-mips queue

[Leon Alrae]

Hi,

First target-mips pull request for 2.5 consisting of patches sent during
2.4 freeze.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit ca0e5d8b0d065a95d0f9042f71b2ace45b015596:

  Open 2.5 development tree (2015-08-11 23:15:55 +0100)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20150813

for you to fetch changes up to c85570163bdf1ba29cb52a63f22ff1c48f1b9398:

  target-mips: Use CPU_LOG_INT for logging related to interrupts (2015-08-13 16:22:53 +0100)

----------------------------------------------------------------
MIPS patches 2015-08-13

Changes:
* mips32r5-generic CPU updated and renamed to P5600
* improvements in LWL/LDL, logging and fulong2e

----------------------------------------------------------------
Aurelien Jarno (1):
      target-mips: simplify LWL/LDL mask generation

Peter Maydell (1):
      hw/pci-host/bonito: Avoid buffer overrun for bad LDMA/COP accesses

Richard Henderson (1):
      target-mips: Use CPU_LOG_INT for logging related to interrupts

Yongbok Kim (1):
      target-mips: update mips32r5-generic into P5600

 hw/pci-host/bonito.c         | 16 +++++++++++++
 target-mips/cpu.h            |  2 +-
 target-mips/helper.c         | 30 +++++++++----------------
 target-mips/op_helper.c      |  3 ++-
 target-mips/translate.c      | 14 +++++-------
 target-mips/translate_init.c | 53 ++++++++++++++++++++++++--------------------
 6 files changed, 65 insertions(+), 53 deletions(-)

Re: [Qemu-devel] [PULL 0/4] target-mips queue

[Peter Maydell]

On 13 August 2015 at 17:45, Leon Alrae <leon.alrae@imgtec.com> wrote:
> Hi,
>
> First target-mips pull request for 2.5 consisting of patches sent during
> 2.4 freeze.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
>
> The following changes since commit ca0e5d8b0d065a95d0f9042f71b2ace45b015596:
>
>   Open 2.5 development tree (2015-08-11 23:15:55 +0100)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20150813
>
> for you to fetch changes up to c85570163bdf1ba29cb52a63f22ff1c48f1b9398:
>
>   target-mips: Use CPU_LOG_INT for logging related to interrupts (2015-08-13 16:22:53 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2015-08-13
>
> Changes:
> * mips32r5-generic CPU updated and renamed to P5600
> * improvements in LWL/LDL, logging and fulong2e

Applied, thanks.

-- PMM