* Re: Re: [PATCH 4/5] ARM: dts: sunxi: add dtsi file for V3s SoC
@ 2017-01-11 3:56 Icenowy Zheng
[not found] ` <20170111065638.uW1SQ7Kq-jDEamKawf7I0PDqKvflMoHmW9unr2Ajn@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Icenowy Zheng @ 2017-01-11 3:56 UTC (permalink / raw)
To: Maxime Ripard
Cc: linux-clk-u79uwXL29TY76Z2rM5mHXA, linux-kernel,
linux-gpio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, Stephen Boyd,
linux-doc-u79uwXL29TY76Z2rM5mHXA, Linus Walleij,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Chen-Yu Tsai
2017年1月11日 02:21于 Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>写道：
>
> On Tue, Jan 03, 2017 at 11:16:28PM +0800, Icenowy Zheng wrote:
> > + uart0_pins_a: uart0@0 {
> > + pins = "PB8", "PB9";
> > + function = "uart0";
> > + bias-pull-up;
>
> Why do you need a pullup here?
I think TX needs one, but RX do not need.
>
> Looks good otherwise.
>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
>
> --
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^ permalink raw reply [flat|nested] 5+ messages in thread[parent not found: <20170111065638.uW1SQ7Kq-jDEamKawf7I0PDqKvflMoHmW9unr2Ajn@public.gmane.org>]
* Re: Re: [PATCH 4/5] ARM: dts: sunxi: add dtsi file for V3s SoC 2017-01-11 3:56 Re: [PATCH 4/5] ARM: dts: sunxi: add dtsi file for V3s SoC Icenowy Zheng [not found] ` <20170111065638.uW1SQ7Kq-jDEamKawf7I0PDqKvflMoHmW9unr2Ajn@public.gmane.org> (?) @ 2017-01-12 16:52 ` Maxime Ripard 0 siblings, 0 replies; 5+ messages in thread From: Maxime Ripard @ 2017-01-12 16:52 UTC (permalink / raw) To: Icenowy Zheng Cc: linux-clk-u79uwXL29TY76Z2rM5mHXA, linux-kernel, linux-gpio-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, Stephen Boyd, linux-doc-u79uwXL29TY76Z2rM5mHXA, Linus Walleij, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Chen-Yu Tsai [-- Attachment #1: Type: text/plain, Size: 991 bytes --] On Wed, Jan 11, 2017 at 11:56:32AM +0800, Icenowy Zheng wrote: > > 2017年1月11日 02:21于 Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>写道： > > > > On Tue, Jan 03, 2017 at 11:16:28PM +0800, Icenowy Zheng wrote: > > > + uart0_pins_a: uart0@0 { > > > + pins = "PB8", "PB9"; > > > + function = "uart0"; > > > + bias-pull-up; > > > > Why do you need a pullup here? > > I think TX needs one, but RX do not need. That's (at best) board specific. So it belongs in the DTS if it's truely needed. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 801 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* [linux-sunxi] Re: [PATCH 4/5] ARM: dts: sunxi: add dtsi file for V3s SoC @ 2017-01-12 16:52 ` Maxime Ripard 0 siblings, 0 replies; 5+ messages in thread From: Maxime Ripard @ 2017-01-12 16:52 UTC (permalink / raw) To: linux-arm-kernel On Wed, Jan 11, 2017 at 11:56:32AM +0800, Icenowy Zheng wrote: > > 2017?1?11? 02:21? Maxime Ripard <maxime.ripard@free-electrons.com>??? > > > > On Tue, Jan 03, 2017 at 11:16:28PM +0800, Icenowy Zheng wrote: > > > + uart0_pins_a: uart0 at 0 { > > > + pins = "PB8", "PB9"; > > > + function = "uart0"; > > > + bias-pull-up; > > > > Why do you need a pullup here? > > I think TX needs one, but RX do not need. That's (at best) board specific. So it belongs in the DTS if it's truely needed. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 801 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170112/f8f7e9e4/attachment-0001.sig> ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [linux-sunxi] Re: [PATCH 4/5] ARM: dts: sunxi: add dtsi file for V3s SoC @ 2017-01-12 16:52 ` Maxime Ripard 0 siblings, 0 replies; 5+ messages in thread From: Maxime Ripard @ 2017-01-12 16:52 UTC (permalink / raw) To: Icenowy Zheng Cc: devicetree, linux-doc, Linus Walleij, Stephen Boyd, linux-kernel, linux-gpio, linux-sunxi, Chen-Yu Tsai, linux-clk, linux-arm-kernel [-- Attachment #1.1: Type: text/plain, Size: 638 bytes --] On Wed, Jan 11, 2017 at 11:56:32AM +0800, Icenowy Zheng wrote: > > 2017年1月11日 02:21于 Maxime Ripard <maxime.ripard@free-electrons.com>写道： > > > > On Tue, Jan 03, 2017 at 11:16:28PM +0800, Icenowy Zheng wrote: > > > + uart0_pins_a: uart0@0 { > > > + pins = "PB8", "PB9"; > > > + function = "uart0"; > > > + bias-pull-up; > > > > Why do you need a pullup here? > > I think TX needs one, but RX do not need. That's (at best) board specific. So it belongs in the DTS if it's truely needed. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 801 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [linux-sunxi] Re: [PATCH 4/5] ARM: dts: sunxi: add dtsi file for V3s SoC @ 2017-01-12 16:52 ` Maxime Ripard 0 siblings, 0 replies; 5+ messages in thread From: Maxime Ripard @ 2017-01-12 16:52 UTC (permalink / raw) To: Icenowy Zheng Cc: linux-clk, linux-kernel, linux-gpio, devicetree, Stephen Boyd, linux-doc, Linus Walleij, linux-arm-kernel, linux-sunxi, Chen-Yu Tsai [-- Attachment #1: Type: text/plain, Size: 638 bytes --] On Wed, Jan 11, 2017 at 11:56:32AM +0800, Icenowy Zheng wrote: > > 2017年1月11日 02:21于 Maxime Ripard <maxime.ripard@free-electrons.com>写道： > > > > On Tue, Jan 03, 2017 at 11:16:28PM +0800, Icenowy Zheng wrote: > > > + uart0_pins_a: uart0@0 { > > > + pins = "PB8", "PB9"; > > > + function = "uart0"; > > > + bias-pull-up; > > > > Why do you need a pullup here? > > I think TX needs one, but RX do not need. That's (at best) board specific. So it belongs in the DTS if it's truely needed. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 801 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
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2017-01-11 3:56 Re: [PATCH 4/5] ARM: dts: sunxi: add dtsi file for V3s SoC Icenowy Zheng
[not found] ` <20170111065638.uW1SQ7Kq-jDEamKawf7I0PDqKvflMoHmW9unr2Ajn@public.gmane.org>
2017-01-12 16:52 ` Maxime Ripard
2017-01-12 16:52 ` [linux-sunxi] " Maxime Ripard
2017-01-12 16:52 ` Maxime Ripard
2017-01-12 16:52 ` Maxime Ripard
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