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From: Thierry Reding <thierry.reding@gmail.com>
To: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Cc: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,
	alexandre.torgue@st.com, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org,
	jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de,
	pmeerw@pmeerw.net, linux-iio@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, fabrice.gasnier@st.com,
	gerald.baeza@st.com, arnaud.pouliquen@st.com,
	linus.walleij@linaro.org, linaro-kernel@lists.linaro.org,
	Benjamin Gaignard <benjamin.gaignard@st.com>
Subject: Re: [PATCH v7 3/8] PWM: add pwm-stm32 DT bindings
Date: Wed, 18 Jan 2017 10:20:21 +0100	[thread overview]
Message-ID: <20170118092021.GE18989@ulmo.ba.sec> (raw)
In-Reply-To: <1483608344-9012-4-git-send-email-benjamin.gaignard@st.com>

[-- Attachment #1: Type: text/plain, Size: 2556 bytes --]

On Thu, Jan 05, 2017 at 10:25:39AM +0100, Benjamin Gaignard wrote:
> Define bindings for pwm-stm32
> 
> version 6:
> - change st,breakinput parameter format to make it usuable on stm32f7 too.
> 
> version 2:
> - use parameters instead of compatible of handle the hardware configuration
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
> ---
>  .../devicetree/bindings/pwm/pwm-stm32.txt          | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt
> 
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
> new file mode 100644
> index 0000000..866f222
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
> @@ -0,0 +1,33 @@
> +STMicroelectronics STM32 Timers PWM bindings
> +
> +Must be a sub-node of an STM32 Timers device tree node.
> +See ../mfd/stm32-timers.txt for details about the parent node.
> +
> +Required parameters:
> +- compatible:		Must be "st,stm32-pwm".
> +- pinctrl-names: 	Set to "default".
> +- pinctrl-0: 		List of phandles pointing to pin configuration nodes for PWM module.
> +			For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
> +
> +Optional parameters:
> +- st,breakinput:	Arrays of three u32 <index level filter> to describe break input configurations.
> +			"index" indicates on which break input the configuration should be applied.

It might be useful to specify what the valid values are for the break
input index.

Also, u32 is kind of a Linuxism, perhaps "Arrays of three cells"? Also,
does this mean there can be multiple entries? Such as 6 cells for two
configurations? What's the maximum number of such configurations?

If it's possible to specify multiple configurations, maybe a slightly
clearer wording would be: "One or more <index level filter> triplets to
describe..."

> +			"level" gives the active level (0=low or 1=high) for this configuration.

So how does this work exactly? "level" specifies the output level if the
filter value is matched?

> +			"filter" gives the filtering value to be applied.

Is this a single value at which "level" will be applied? Or is it an
upper/lower bound that can be used to restrict the output to "level" if
the signal goes beyond/below a certain threshold?

Maybe an example would clarify this. Or perhaps a reference to a manual
where a more in-depth description of this functionality can be found.

Thierry

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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Benjamin Gaignard
	<benjamin.gaignard-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	alexandre.torgue-qxv4g6HH51o@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	knaack.h-Mmb7MZpHnFY@public.gmane.org,
	lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org,
	pmeerw-jW+XmwGofnusTnJN9+BGXg@public.gmane.org,
	linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	fabrice.gasnier-qxv4g6HH51o@public.gmane.org,
	gerald.baeza-qxv4g6HH51o@public.gmane.org,
	arnaud.pouliquen-qxv4g6HH51o@public.gmane.org,
	linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	linaro-kernel-cunTk1MwBs8s++Sfvej+rw@public.gmane.org,
	Benjamin Gaignard
	<benjamin.gaignard-qxv4g6HH51o@public.gmane.org>
Subject: Re: [PATCH v7 3/8] PWM: add pwm-stm32 DT bindings
Date: Wed, 18 Jan 2017 10:20:21 +0100	[thread overview]
Message-ID: <20170118092021.GE18989@ulmo.ba.sec> (raw)
In-Reply-To: <1483608344-9012-4-git-send-email-benjamin.gaignard-qxv4g6HH51o@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 2578 bytes --]

On Thu, Jan 05, 2017 at 10:25:39AM +0100, Benjamin Gaignard wrote:
> Define bindings for pwm-stm32
> 
> version 6:
> - change st,breakinput parameter format to make it usuable on stm32f7 too.
> 
> version 2:
> - use parameters instead of compatible of handle the hardware configuration
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard-qxv4g6HH51o@public.gmane.org>
> ---
>  .../devicetree/bindings/pwm/pwm-stm32.txt          | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt
> 
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
> new file mode 100644
> index 0000000..866f222
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
> @@ -0,0 +1,33 @@
> +STMicroelectronics STM32 Timers PWM bindings
> +
> +Must be a sub-node of an STM32 Timers device tree node.
> +See ../mfd/stm32-timers.txt for details about the parent node.
> +
> +Required parameters:
> +- compatible:		Must be "st,stm32-pwm".
> +- pinctrl-names: 	Set to "default".
> +- pinctrl-0: 		List of phandles pointing to pin configuration nodes for PWM module.
> +			For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
> +
> +Optional parameters:
> +- st,breakinput:	Arrays of three u32 <index level filter> to describe break input configurations.
> +			"index" indicates on which break input the configuration should be applied.

It might be useful to specify what the valid values are for the break
input index.

Also, u32 is kind of a Linuxism, perhaps "Arrays of three cells"? Also,
does this mean there can be multiple entries? Such as 6 cells for two
configurations? What's the maximum number of such configurations?

If it's possible to specify multiple configurations, maybe a slightly
clearer wording would be: "One or more <index level filter> triplets to
describe..."

> +			"level" gives the active level (0=low or 1=high) for this configuration.

So how does this work exactly? "level" specifies the output level if the
filter value is matched?

> +			"filter" gives the filtering value to be applied.

Is this a single value at which "level" will be applied? Or is it an
upper/lower bound that can be used to restrict the output to "level" if
the signal goes beyond/below a certain threshold?

Maybe an example would clarify this. Or perhaps a reference to a manual
where a more in-depth description of this functionality can be found.

Thierry

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WARNING: multiple messages have this Message-ID (diff)
From: thierry.reding@gmail.com (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 3/8] PWM: add pwm-stm32 DT bindings
Date: Wed, 18 Jan 2017 10:20:21 +0100	[thread overview]
Message-ID: <20170118092021.GE18989@ulmo.ba.sec> (raw)
In-Reply-To: <1483608344-9012-4-git-send-email-benjamin.gaignard@st.com>

On Thu, Jan 05, 2017 at 10:25:39AM +0100, Benjamin Gaignard wrote:
> Define bindings for pwm-stm32
> 
> version 6:
> - change st,breakinput parameter format to make it usuable on stm32f7 too.
> 
> version 2:
> - use parameters instead of compatible of handle the hardware configuration
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
> ---
>  .../devicetree/bindings/pwm/pwm-stm32.txt          | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt
> 
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
> new file mode 100644
> index 0000000..866f222
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt
> @@ -0,0 +1,33 @@
> +STMicroelectronics STM32 Timers PWM bindings
> +
> +Must be a sub-node of an STM32 Timers device tree node.
> +See ../mfd/stm32-timers.txt for details about the parent node.
> +
> +Required parameters:
> +- compatible:		Must be "st,stm32-pwm".
> +- pinctrl-names: 	Set to "default".
> +- pinctrl-0: 		List of phandles pointing to pin configuration nodes for PWM module.
> +			For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
> +
> +Optional parameters:
> +- st,breakinput:	Arrays of three u32 <index level filter> to describe break input configurations.
> +			"index" indicates on which break input the configuration should be applied.

It might be useful to specify what the valid values are for the break
input index.

Also, u32 is kind of a Linuxism, perhaps "Arrays of three cells"? Also,
does this mean there can be multiple entries? Such as 6 cells for two
configurations? What's the maximum number of such configurations?

If it's possible to specify multiple configurations, maybe a slightly
clearer wording would be: "One or more <index level filter> triplets to
describe..."

> +			"level" gives the active level (0=low or 1=high) for this configuration.

So how does this work exactly? "level" specifies the output level if the
filter value is matched?

> +			"filter" gives the filtering value to be applied.

Is this a single value at which "level" will be applied? Or is it an
upper/lower bound that can be used to restrict the output to "level" if
the signal goes beyond/below a certain threshold?

Maybe an example would clarify this. Or perhaps a reference to a manual
where a more in-depth description of this functionality can be found.

Thierry
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  parent reply	other threads:[~2017-01-18  9:30 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-05  9:25 [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32 Benjamin Gaignard
2017-01-05  9:25 ` Benjamin Gaignard
2017-01-05  9:25 ` [PATCH v7 1/8] MFD: add bindings for STM32 Timers driver Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-09 17:59   ` Rob Herring
2017-01-09 17:59     ` Rob Herring
2017-01-09 17:59     ` Rob Herring
2017-01-05  9:25 ` [PATCH v7 2/8] MFD: add " Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-09 18:00   ` Rob Herring
2017-01-09 18:00     ` Rob Herring
2017-01-10  8:56     ` Benjamin Gaignard
2017-01-10  8:56       ` Benjamin Gaignard
2017-01-10  8:56       ` Benjamin Gaignard
2017-01-10  8:56       ` Benjamin Gaignard
2017-01-05  9:25 ` [PATCH v7 3/8] PWM: add pwm-stm32 DT bindings Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-09 18:01   ` Rob Herring
2017-01-09 18:01     ` Rob Herring
2017-01-18  9:20   ` Thierry Reding [this message]
2017-01-18  9:20     ` Thierry Reding
2017-01-18  9:20     ` Thierry Reding
2017-01-18  9:42     ` Benjamin Gaignard
2017-01-18  9:42       ` Benjamin Gaignard
2017-01-18  9:42       ` Benjamin Gaignard
2017-01-05  9:25 ` [PATCH v7 4/8] PWM: add PWM driver for STM32 plaftorm Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-18 10:08   ` Thierry Reding
2017-01-18 10:08     ` Thierry Reding
2017-01-18 10:08     ` Thierry Reding
2017-01-18 11:15     ` Benjamin Gaignard
2017-01-18 11:15       ` Benjamin Gaignard
2017-01-18 11:15       ` Benjamin Gaignard
2017-01-18 11:15       ` Benjamin Gaignard
2017-01-18 11:37       ` Thierry Reding
2017-01-18 11:37         ` Thierry Reding
2017-01-18 12:37         ` Benjamin Gaignard
2017-01-18 12:37           ` Benjamin Gaignard
2017-01-18 12:37           ` Benjamin Gaignard
2017-01-18 12:37           ` Benjamin Gaignard
2017-01-18 10:16   ` Thierry Reding
2017-01-18 10:16     ` Thierry Reding
2017-01-18 11:16     ` Benjamin Gaignard
2017-01-18 11:16       ` Benjamin Gaignard
2017-01-18 11:16       ` Benjamin Gaignard
2017-01-18 11:16       ` Benjamin Gaignard
2017-01-05  9:25 ` [PATCH v7 5/8] IIO: add bindings for STM32 timer trigger driver Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-08 11:23   ` Jonathan Cameron
2017-01-08 11:23     ` Jonathan Cameron
2017-01-09 18:04   ` Rob Herring
2017-01-09 18:04     ` Rob Herring
2017-01-09 18:04     ` Rob Herring
2017-01-10  8:55     ` Benjamin Gaignard
2017-01-10  8:55       ` Benjamin Gaignard
2017-01-10  8:55       ` Benjamin Gaignard
2017-01-10  8:55       ` Benjamin Gaignard
2017-01-05  9:25 ` [PATCH v7 6/8] IIO: add " Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-08 11:30   ` Jonathan Cameron
2017-01-08 11:30     ` Jonathan Cameron
2017-01-05  9:25 ` [PATCH v7 7/8] ARM: dts: stm32: add Timers driver for stm32f429 MCU Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-05  9:25 ` [PATCH v7 8/8] ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco Benjamin Gaignard
2017-01-05  9:25   ` Benjamin Gaignard
2017-01-05 14:49 ` [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32 Lee Jones
2017-01-05 14:49   ` Lee Jones
2017-01-06  7:58   ` Benjamin Gaignard
2017-01-06  7:58     ` Benjamin Gaignard
2017-01-06  7:58     ` Benjamin Gaignard
2017-01-13 12:30     ` Benjamin Gaignard
2017-01-13 12:30       ` Benjamin Gaignard
2017-01-13 12:30       ` Benjamin Gaignard
2017-01-13 12:30       ` Benjamin Gaignard

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