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From: Marc Zyngier <marc.zyngier@arm.com>
To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Scott Wood <oss@buserror.net>, Will Deacon <will.deacon@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Hanjun Guo <hanjun.guo@linaro.org>,
	Ding Tianhong <dingtianhong@huawei.com>
Subject: [PATCH 07/17] arm64: arch_timer: Rework the set_next_event workarounds
Date: Mon,  6 Mar 2017 11:26:12 +0000	[thread overview]
Message-ID: <20170306112622.13853-8-marc.zyngier@arm.com> (raw)
In-Reply-To: <20170306112622.13853-1-marc.zyngier@arm.com>

The way we work around errata affecting set_next_event is not very
nice, at it imposes this workaround on errata that do not need it.

Add new workaround hooks and let the existing workarounds use them.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/include/asm/arch_timer.h  |  4 ++++
 drivers/clocksource/arm_arch_timer.c | 32 ++++++++++++++++++++++++++------
 2 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index f841e08a0dfc..a5ed4cd2e972 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -43,6 +43,8 @@ enum arch_timer_erratum_match_type {
 	ate_match_local_cap_id,
 };
 
+struct clock_event_device;
+
 struct arch_timer_erratum_workaround {
 	enum arch_timer_erratum_match_type match_type;
 	const void *id;		/* Indicate the Erratum ID */
@@ -50,6 +52,8 @@ struct arch_timer_erratum_workaround {
 	u32 (*read_cntp_tval_el0)(void);
 	u32 (*read_cntv_tval_el0)(void);
 	u64 (*read_cntvct_el0)(void);
+	int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
+	int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
 };
 
 extern const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround;
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 3e5f9539c0c0..ac0ddb380d3a 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -282,6 +282,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
 		.read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
 		.read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
 		.read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
+		.set_next_event_phys = erratum_set_next_event_tval_phys,
+		.set_next_event_virt = erratum_set_next_event_tval_virt,
 	},
 #endif
 #ifdef CONFIG_HISILICON_ERRATUM_161010101
@@ -292,6 +294,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
 		.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
 		.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
 		.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
+		.set_next_event_phys = erratum_set_next_event_tval_phys,
+		.set_next_event_virt = erratum_set_next_event_tval_virt,
 	},
 #endif
 };
@@ -384,10 +388,22 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t
 		local ? "local" : "global", wa->desc_str);
 }
 
+#define erratum_handler(fn, r, ...)					\
+({									\
+  	bool __val;							\
+	if (needs_unstable_timer_counter_workaround() &&		\
+	    timer_unstable_counter_workaround->fn) {			\
+		r = timer_unstable_counter_workaround->fn(__VA_ARGS__);	\
+		__val = true;						\
+	} else {							\
+		__val = false;						\
+	}								\
+	__val;								\
+})
+
 #else
 #define arch_timer_check_ool_workaround(t,a)		do { } while(0)
-#define erratum_set_next_event_tval_virt(...)		({BUG_ON(1); 0;})
-#define erratum_set_next_event_tval_phys(...)		({BUG_ON(1); 0;})
+#define erratum_handler(fn, r, ...)			({false;})
 #endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */
 
 static __always_inline irqreturn_t timer_handler(const int access,
@@ -480,8 +496,10 @@ static __always_inline void set_next_event(const int access, unsigned long evt,
 static int arch_timer_set_next_event_virt(unsigned long evt,
 					  struct clock_event_device *clk)
 {
-	if (needs_unstable_timer_counter_workaround())
-		return erratum_set_next_event_tval_virt(evt, clk);
+	int ret;
+
+	if (erratum_handler(set_next_event_virt, ret, evt, clk))
+		return ret;
 
 	set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);
 	return 0;
@@ -490,8 +508,10 @@ static int arch_timer_set_next_event_virt(unsigned long evt,
 static int arch_timer_set_next_event_phys(unsigned long evt,
 					  struct clock_event_device *clk)
 {
-	if (needs_unstable_timer_counter_workaround())
-		return erratum_set_next_event_tval_phys(evt, clk);
+	int ret;
+
+	if (erratum_handler(set_next_event_phys, ret, evt, clk))
+		return ret;
 
 	set_next_event(ARCH_TIMER_PHYS_ACCESS, evt, clk);
 	return 0;
-- 
2.11.0

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 07/17] arm64: arch_timer: Rework the set_next_event workarounds
Date: Mon,  6 Mar 2017 11:26:12 +0000	[thread overview]
Message-ID: <20170306112622.13853-8-marc.zyngier@arm.com> (raw)
In-Reply-To: <20170306112622.13853-1-marc.zyngier@arm.com>

The way we work around errata affecting set_next_event is not very
nice, at it imposes this workaround on errata that do not need it.

Add new workaround hooks and let the existing workarounds use them.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/include/asm/arch_timer.h  |  4 ++++
 drivers/clocksource/arm_arch_timer.c | 32 ++++++++++++++++++++++++++------
 2 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index f841e08a0dfc..a5ed4cd2e972 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -43,6 +43,8 @@ enum arch_timer_erratum_match_type {
 	ate_match_local_cap_id,
 };
 
+struct clock_event_device;
+
 struct arch_timer_erratum_workaround {
 	enum arch_timer_erratum_match_type match_type;
 	const void *id;		/* Indicate the Erratum ID */
@@ -50,6 +52,8 @@ struct arch_timer_erratum_workaround {
 	u32 (*read_cntp_tval_el0)(void);
 	u32 (*read_cntv_tval_el0)(void);
 	u64 (*read_cntvct_el0)(void);
+	int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
+	int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
 };
 
 extern const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround;
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 3e5f9539c0c0..ac0ddb380d3a 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -282,6 +282,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
 		.read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
 		.read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
 		.read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
+		.set_next_event_phys = erratum_set_next_event_tval_phys,
+		.set_next_event_virt = erratum_set_next_event_tval_virt,
 	},
 #endif
 #ifdef CONFIG_HISILICON_ERRATUM_161010101
@@ -292,6 +294,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
 		.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
 		.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
 		.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
+		.set_next_event_phys = erratum_set_next_event_tval_phys,
+		.set_next_event_virt = erratum_set_next_event_tval_virt,
 	},
 #endif
 };
@@ -384,10 +388,22 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t
 		local ? "local" : "global", wa->desc_str);
 }
 
+#define erratum_handler(fn, r, ...)					\
+({									\
+  	bool __val;							\
+	if (needs_unstable_timer_counter_workaround() &&		\
+	    timer_unstable_counter_workaround->fn) {			\
+		r = timer_unstable_counter_workaround->fn(__VA_ARGS__);	\
+		__val = true;						\
+	} else {							\
+		__val = false;						\
+	}								\
+	__val;								\
+})
+
 #else
 #define arch_timer_check_ool_workaround(t,a)		do { } while(0)
-#define erratum_set_next_event_tval_virt(...)		({BUG_ON(1); 0;})
-#define erratum_set_next_event_tval_phys(...)		({BUG_ON(1); 0;})
+#define erratum_handler(fn, r, ...)			({false;})
 #endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */
 
 static __always_inline irqreturn_t timer_handler(const int access,
@@ -480,8 +496,10 @@ static __always_inline void set_next_event(const int access, unsigned long evt,
 static int arch_timer_set_next_event_virt(unsigned long evt,
 					  struct clock_event_device *clk)
 {
-	if (needs_unstable_timer_counter_workaround())
-		return erratum_set_next_event_tval_virt(evt, clk);
+	int ret;
+
+	if (erratum_handler(set_next_event_virt, ret, evt, clk))
+		return ret;
 
 	set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);
 	return 0;
@@ -490,8 +508,10 @@ static int arch_timer_set_next_event_virt(unsigned long evt,
 static int arch_timer_set_next_event_phys(unsigned long evt,
 					  struct clock_event_device *clk)
 {
-	if (needs_unstable_timer_counter_workaround())
-		return erratum_set_next_event_tval_phys(evt, clk);
+	int ret;
+
+	if (erratum_handler(set_next_event_phys, ret, evt, clk))
+		return ret;
 
 	set_next_event(ARCH_TIMER_PHYS_ACCESS, evt, clk);
 	return 0;
-- 
2.11.0

  parent reply	other threads:[~2017-03-06 11:30 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-06 11:26 [PATCH 00/17] clocksource/arch_timer: Errara workaround infrastructure rework Marc Zyngier
2017-03-06 11:26 ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 01/17] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-07 13:03   ` Hanjun Guo
2017-03-07 13:03     ` Hanjun Guo
2017-03-20 13:51   ` Mark Rutland
2017-03-20 13:51     ` Mark Rutland
2017-03-06 11:26 ` [PATCH 02/17] arm64: arch_timer: Add erratum handler for globally defined capability Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 03/17] arm64: Allow checking of a CPU-local erratum Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 13:56   ` Mark Rutland
2017-03-20 13:56     ` Mark Rutland
2017-03-20 14:09     ` Suzuki K Poulose
2017-03-20 14:09       ` Suzuki K Poulose
2017-03-06 11:26 ` [PATCH 04/17] arm64: arch_timer: Add erratum handler for CPU-specific capability Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 05/17] arm64: arch_timer: Move arch_timer_reg_read/write around Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 13:59   ` Mark Rutland
2017-03-20 13:59     ` Mark Rutland
2017-03-06 11:26 ` [PATCH 06/17] arm64: arch_timer: Get rid of erratum_workaround_set_sne Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 14:06   ` Mark Rutland
2017-03-20 14:06     ` Mark Rutland
2017-03-20 16:59     ` Marc Zyngier
2017-03-20 16:59       ` Marc Zyngier
2017-03-06 11:26 ` Marc Zyngier [this message]
2017-03-06 11:26   ` [PATCH 07/17] arm64: arch_timer: Rework the set_next_event workarounds Marc Zyngier
2017-03-07 13:25   ` Hanjun Guo
2017-03-07 13:25     ` Hanjun Guo
2017-03-06 11:26 ` [PATCH 08/17] arm64: arch_timer: Make workaround methods optional Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 09/17] arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 10/17] arm64: Add CNTVCT_EL0 trap handler Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 14:52   ` Mark Rutland
2017-03-20 14:52     ` Mark Rutland
2017-03-06 11:26 ` [PATCH 11/17] arm64: arch_timer: Move clocksource_counter and co around Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 12/17] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 13/17] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 14:56   ` Mark Rutland
2017-03-20 14:56     ` Mark Rutland
2017-03-20 15:30     ` Suzuki K Poulose
2017-03-20 15:30       ` Suzuki K Poulose
2017-03-06 11:26 ` [PATCH 14/17] arm64: Define Cortex-A73 MIDR Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 15/17] arm64: arch_timer: Workaround for Cortex-A73 erratum 858921 Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 14:58   ` Mark Rutland
2017-03-20 14:58     ` Mark Rutland
2017-03-06 11:26 ` [PATCH 16/17] arm64: arch_timer: Allow erratum matching with ACPI OEM information Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-07 13:12   ` Hanjun Guo
2017-03-07 13:12     ` Hanjun Guo
2017-03-06 11:26 ` [PATCH 17/17] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-07 13:19   ` Hanjun Guo
2017-03-07 13:19     ` Hanjun Guo
2017-03-20 15:00     ` Mark Rutland
2017-03-20 15:00       ` Mark Rutland
2017-03-06 21:48 ` [PATCH 00/17] clocksource/arch_timer: Errara workaround infrastructure rework dann frazier
2017-03-06 21:48   ` dann frazier
2017-03-07 12:56 ` Hanjun Guo
2017-03-07 12:56   ` Hanjun Guo
2017-03-20 15:07 ` Mark Rutland
2017-03-20 15:07   ` Mark Rutland
2017-03-20 15:25   ` Marc Zyngier
2017-03-20 15:25     ` Marc Zyngier

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