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From: Hanjun Guo <hanjun.guo@linaro.org>
To: Marc Zyngier <marc.zyngier@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Scott Wood <oss@buserror.net>, Will Deacon <will.deacon@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Ding Tianhong <dingtianhong@huawei.com>
Subject: Re: [PATCH 01/17] arm64: arch_timer: Add infrastructure for multiple erratum detection methods
Date: Tue, 7 Mar 2017 21:03:55 +0800	[thread overview]
Message-ID: <d0411c3c-d32b-89dd-8305-49d6f3810991@linaro.org> (raw)
In-Reply-To: <20170306112622.13853-2-marc.zyngier@arm.com>

On 2017/3/6 19:26, Marc Zyngier wrote:
> We're currently stuck with DT when it comes to handling errata, which
> is pretty restrictive. In order to make things more flexible, let's
> introduce an infrastructure that could support alternative discovery
> methods. No change in functionnality.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  arch/arm64/include/asm/arch_timer.h  |  7 +++-
>  drivers/clocksource/arm_arch_timer.c | 80 +++++++++++++++++++++++++++++++-----
>  2 files changed, 75 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
> index b4b34004a21e..1c92d52619a6 100644
> --- a/arch/arm64/include/asm/arch_timer.h
> +++ b/arch/arm64/include/asm/arch_timer.h
> @@ -37,9 +37,14 @@ extern struct static_key_false arch_timer_read_ool_enabled;
>  #define needs_unstable_timer_counter_workaround()  false
>  #endif
>
> +enum arch_timer_erratum_match_type {
> +	ate_match_dt,
> +};
>
>  struct arch_timer_erratum_workaround {
> -	const char *id;		/* Indicate the Erratum ID */
> +	enum arch_timer_erratum_match_type match_type;
> +	const void *id;		/* Indicate the Erratum ID */
> +	const char *desc_str;
>  	u32 (*read_cntp_tval_el0)(void);
>  	u32 (*read_cntv_tval_el0)(void);
>  	u64 (*read_cntvct_el0)(void);
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
> index 7a8a4117f123..36980cdd5c0a 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -182,7 +182,9 @@ EXPORT_SYMBOL_GPL(arch_timer_read_ool_enabled);
>  static const struct arch_timer_erratum_workaround ool_workarounds[] = {
>  #ifdef CONFIG_FSL_ERRATUM_A008585
>  	{
> +		.match_type = ate_match_dt,
>  		.id = "fsl,erratum-a008585",
> +		.desc_str = "Freescale erratum a005858",
>  		.read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
>  		.read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
>  		.read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
> @@ -190,13 +192,78 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
>  #endif
>  #ifdef CONFIG_HISILICON_ERRATUM_161010101
>  	{
> +		.match_type = ate_match_dt,
>  		.id = "hisilicon,erratum-161010101",
> +		.desc_str = "HiSilicon erratum 161010101",
>  		.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
>  		.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
>  		.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
>  	},
>  #endif
>  };
> +
> +typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *,
> +			       const void *);
> +
> +static
> +bool arch_timer_check_dt_erratum(const struct arch_timer_erratum_workaround *wa,
> +				 const void *arg)
> +{
> +	const struct device_node *np = arg;
> +
> +	return of_property_read_bool(np, wa->id);
> +}
> +
> +static const struct arch_timer_erratum_workaround *
> +arch_timer_iterate_errata(enum arch_timer_erratum_match_type type,
> +			  ate_match_fn_t match_fn,
> +			  void *arg)
> +{
> +	int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(ool_workarounds); i++) {
> +		if (ool_workarounds[i].match_type != type)
> +			continue;
> +
> +		if (match_fn(&ool_workarounds[i], arg))
> +			return &ool_workarounds[i];
> +	}
> +
> +	return NULL;
> +}
> +
> +static
> +void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa)
> +{
> +	timer_unstable_counter_workaround = wa;
> +	static_branch_enable(&arch_timer_read_ool_enabled);
> +}
> +
> +static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type type,
> +					    void *arg)
> +{
> +	const struct arch_timer_erratum_workaround *wa;
> +	ate_match_fn_t match_fn = NULL;
> +
> +	if (static_branch_unlikely(&arch_timer_read_ool_enabled))
> +		return;
> +
> +	switch (type) {
> +	case ate_match_dt:
> +		match_fn = arch_timer_check_dt_erratum;
> +		break;
> +	}
> +
> +	wa = arch_timer_iterate_errata(type, match_fn, arg);
> +	if (!wa)
> +		return;
> +
> +	arch_timer_enable_workaround(wa);
> +	pr_info("Enabling global workaround for %s\n", wa->desc_str);
> +}
> +
> +#else
> +#define arch_timer_check_ool_workaround(t,a)		do { } while(0)
>  #endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */
>
>  static __always_inline
> @@ -960,17 +1027,8 @@ static int __init arch_timer_of_init(struct device_node *np)
>
>  	arch_timer_c3stop = !of_property_read_bool(np, "always-on");
>
> -#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND
> -	for (i = 0; i < ARRAY_SIZE(ool_workarounds); i++) {
> -		if (of_property_read_bool(np, ool_workarounds[i].id)) {
> -			timer_unstable_counter_workaround = &ool_workarounds[i];
> -			static_branch_enable(&arch_timer_read_ool_enabled);
> -			pr_info("arch_timer: Enabling workaround for %s\n",
> -				timer_unstable_counter_workaround->id);
> -			break;
> -		}
> -	}
> -#endif
> +	/* Check for globally applicable workarounds */
> +	arch_timer_check_ool_workaround(ate_match_dt, np);
>
>  	/*
>  	 * If we cannot rely on firmware initializing the timer registers then
>

It's cool to me,

Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>

Thanks
Hanjun

WARNING: multiple messages have this Message-ID (diff)
From: hanjun.guo@linaro.org (Hanjun Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 01/17] arm64: arch_timer: Add infrastructure for multiple erratum detection methods
Date: Tue, 7 Mar 2017 21:03:55 +0800	[thread overview]
Message-ID: <d0411c3c-d32b-89dd-8305-49d6f3810991@linaro.org> (raw)
In-Reply-To: <20170306112622.13853-2-marc.zyngier@arm.com>

On 2017/3/6 19:26, Marc Zyngier wrote:
> We're currently stuck with DT when it comes to handling errata, which
> is pretty restrictive. In order to make things more flexible, let's
> introduce an infrastructure that could support alternative discovery
> methods. No change in functionnality.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  arch/arm64/include/asm/arch_timer.h  |  7 +++-
>  drivers/clocksource/arm_arch_timer.c | 80 +++++++++++++++++++++++++++++++-----
>  2 files changed, 75 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
> index b4b34004a21e..1c92d52619a6 100644
> --- a/arch/arm64/include/asm/arch_timer.h
> +++ b/arch/arm64/include/asm/arch_timer.h
> @@ -37,9 +37,14 @@ extern struct static_key_false arch_timer_read_ool_enabled;
>  #define needs_unstable_timer_counter_workaround()  false
>  #endif
>
> +enum arch_timer_erratum_match_type {
> +	ate_match_dt,
> +};
>
>  struct arch_timer_erratum_workaround {
> -	const char *id;		/* Indicate the Erratum ID */
> +	enum arch_timer_erratum_match_type match_type;
> +	const void *id;		/* Indicate the Erratum ID */
> +	const char *desc_str;
>  	u32 (*read_cntp_tval_el0)(void);
>  	u32 (*read_cntv_tval_el0)(void);
>  	u64 (*read_cntvct_el0)(void);
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
> index 7a8a4117f123..36980cdd5c0a 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -182,7 +182,9 @@ EXPORT_SYMBOL_GPL(arch_timer_read_ool_enabled);
>  static const struct arch_timer_erratum_workaround ool_workarounds[] = {
>  #ifdef CONFIG_FSL_ERRATUM_A008585
>  	{
> +		.match_type = ate_match_dt,
>  		.id = "fsl,erratum-a008585",
> +		.desc_str = "Freescale erratum a005858",
>  		.read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
>  		.read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
>  		.read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
> @@ -190,13 +192,78 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
>  #endif
>  #ifdef CONFIG_HISILICON_ERRATUM_161010101
>  	{
> +		.match_type = ate_match_dt,
>  		.id = "hisilicon,erratum-161010101",
> +		.desc_str = "HiSilicon erratum 161010101",
>  		.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
>  		.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
>  		.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
>  	},
>  #endif
>  };
> +
> +typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *,
> +			       const void *);
> +
> +static
> +bool arch_timer_check_dt_erratum(const struct arch_timer_erratum_workaround *wa,
> +				 const void *arg)
> +{
> +	const struct device_node *np = arg;
> +
> +	return of_property_read_bool(np, wa->id);
> +}
> +
> +static const struct arch_timer_erratum_workaround *
> +arch_timer_iterate_errata(enum arch_timer_erratum_match_type type,
> +			  ate_match_fn_t match_fn,
> +			  void *arg)
> +{
> +	int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(ool_workarounds); i++) {
> +		if (ool_workarounds[i].match_type != type)
> +			continue;
> +
> +		if (match_fn(&ool_workarounds[i], arg))
> +			return &ool_workarounds[i];
> +	}
> +
> +	return NULL;
> +}
> +
> +static
> +void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa)
> +{
> +	timer_unstable_counter_workaround = wa;
> +	static_branch_enable(&arch_timer_read_ool_enabled);
> +}
> +
> +static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type type,
> +					    void *arg)
> +{
> +	const struct arch_timer_erratum_workaround *wa;
> +	ate_match_fn_t match_fn = NULL;
> +
> +	if (static_branch_unlikely(&arch_timer_read_ool_enabled))
> +		return;
> +
> +	switch (type) {
> +	case ate_match_dt:
> +		match_fn = arch_timer_check_dt_erratum;
> +		break;
> +	}
> +
> +	wa = arch_timer_iterate_errata(type, match_fn, arg);
> +	if (!wa)
> +		return;
> +
> +	arch_timer_enable_workaround(wa);
> +	pr_info("Enabling global workaround for %s\n", wa->desc_str);
> +}
> +
> +#else
> +#define arch_timer_check_ool_workaround(t,a)		do { } while(0)
>  #endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */
>
>  static __always_inline
> @@ -960,17 +1027,8 @@ static int __init arch_timer_of_init(struct device_node *np)
>
>  	arch_timer_c3stop = !of_property_read_bool(np, "always-on");
>
> -#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND
> -	for (i = 0; i < ARRAY_SIZE(ool_workarounds); i++) {
> -		if (of_property_read_bool(np, ool_workarounds[i].id)) {
> -			timer_unstable_counter_workaround = &ool_workarounds[i];
> -			static_branch_enable(&arch_timer_read_ool_enabled);
> -			pr_info("arch_timer: Enabling workaround for %s\n",
> -				timer_unstable_counter_workaround->id);
> -			break;
> -		}
> -	}
> -#endif
> +	/* Check for globally applicable workarounds */
> +	arch_timer_check_ool_workaround(ate_match_dt, np);
>
>  	/*
>  	 * If we cannot rely on firmware initializing the timer registers then
>

It's cool to me,

Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>

Thanks
Hanjun

  reply	other threads:[~2017-03-07 16:55 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-06 11:26 [PATCH 00/17] clocksource/arch_timer: Errara workaround infrastructure rework Marc Zyngier
2017-03-06 11:26 ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 01/17] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-07 13:03   ` Hanjun Guo [this message]
2017-03-07 13:03     ` Hanjun Guo
2017-03-20 13:51   ` Mark Rutland
2017-03-20 13:51     ` Mark Rutland
2017-03-06 11:26 ` [PATCH 02/17] arm64: arch_timer: Add erratum handler for globally defined capability Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 03/17] arm64: Allow checking of a CPU-local erratum Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 13:56   ` Mark Rutland
2017-03-20 13:56     ` Mark Rutland
2017-03-20 14:09     ` Suzuki K Poulose
2017-03-20 14:09       ` Suzuki K Poulose
2017-03-06 11:26 ` [PATCH 04/17] arm64: arch_timer: Add erratum handler for CPU-specific capability Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 05/17] arm64: arch_timer: Move arch_timer_reg_read/write around Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 13:59   ` Mark Rutland
2017-03-20 13:59     ` Mark Rutland
2017-03-06 11:26 ` [PATCH 06/17] arm64: arch_timer: Get rid of erratum_workaround_set_sne Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 14:06   ` Mark Rutland
2017-03-20 14:06     ` Mark Rutland
2017-03-20 16:59     ` Marc Zyngier
2017-03-20 16:59       ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 07/17] arm64: arch_timer: Rework the set_next_event workarounds Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-07 13:25   ` Hanjun Guo
2017-03-07 13:25     ` Hanjun Guo
2017-03-06 11:26 ` [PATCH 08/17] arm64: arch_timer: Make workaround methods optional Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 09/17] arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 10/17] arm64: Add CNTVCT_EL0 trap handler Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 14:52   ` Mark Rutland
2017-03-20 14:52     ` Mark Rutland
2017-03-06 11:26 ` [PATCH 11/17] arm64: arch_timer: Move clocksource_counter and co around Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 12/17] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 13/17] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 14:56   ` Mark Rutland
2017-03-20 14:56     ` Mark Rutland
2017-03-20 15:30     ` Suzuki K Poulose
2017-03-20 15:30       ` Suzuki K Poulose
2017-03-06 11:26 ` [PATCH 14/17] arm64: Define Cortex-A73 MIDR Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 15/17] arm64: arch_timer: Workaround for Cortex-A73 erratum 858921 Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-20 14:58   ` Mark Rutland
2017-03-20 14:58     ` Mark Rutland
2017-03-06 11:26 ` [PATCH 16/17] arm64: arch_timer: Allow erratum matching with ACPI OEM information Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-07 13:12   ` Hanjun Guo
2017-03-07 13:12     ` Hanjun Guo
2017-03-06 11:26 ` [PATCH 17/17] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Marc Zyngier
2017-03-06 11:26   ` Marc Zyngier
2017-03-07 13:19   ` Hanjun Guo
2017-03-07 13:19     ` Hanjun Guo
2017-03-20 15:00     ` Mark Rutland
2017-03-20 15:00       ` Mark Rutland
2017-03-06 21:48 ` [PATCH 00/17] clocksource/arch_timer: Errara workaround infrastructure rework dann frazier
2017-03-06 21:48   ` dann frazier
2017-03-07 12:56 ` Hanjun Guo
2017-03-07 12:56   ` Hanjun Guo
2017-03-20 15:07 ` Mark Rutland
2017-03-20 15:07   ` Mark Rutland
2017-03-20 15:25   ` Marc Zyngier
2017-03-20 15:25     ` Marc Zyngier

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