From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> To: Ingo Molnar <mingo@redhat.com>, Thomas Gleixner <tglx@linutronix.de>, "H. Peter Anvin" <hpa@zytor.com>, Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@suse.de> Cc: Peter Zijlstra <peterz@infradead.org>, Andrew Morton <akpm@linux-foundation.org>, Brian Gerst <brgerst@gmail.com>, Chris Metcalf <cmetcalf@mellanox.com>, Dave Hansen <dave.hansen@linux.intel.com>, Paolo Bonzini <pbonzini@redhat.com>, Liang Z Li <liang.z.li@intel.com>, Masami Hiramatsu <mhiramat@kernel.org>, Huang Rui <ray.huang@amd.com>, Jiri Slaby <jslaby@suse.cz>, Jonathan Corbet <corbet@lwn.net>, "Michael S. Tsirkin" <mst@redhat.com>, Paul Gortmaker <paul.gortmaker@windriver.com>, Vlastimil Babka <vbabka@suse.cz>, Chen Yucong <slaoub@gmail.com>, Alexandre Julliard <julliard@winehq.org>, Stas Sergeev <stsp@list.ru>, Fenghua Yu <fenghua.yu@intel.com>, "Ravi V. Shankar" <ravi.v.shankar@intel.com>, Shuah Khan <shuah@kernel.org>, linux-kernel@vger.kernel.org, x86@kernel.org, linux-msdos@vger.kernel.org, wine-devel@winehq.org, Ricardo Neri <ricardo.neri-calderon@linux.intel.com>, Adam Buchbinder <adam.buchbinder@gmail.com>, Colin Ian King <colin.king@canonical.com>, Lorenzo Stoakes <lstoakes@gmail.com>, Qiaowei Ren <qiaowei.ren@intel.com>, Nathan Howard <liverlint@gmail.com>, Adan Hawthorn <adanhawthorn@gmail.com>, Joe Perches <joe@perches.com> Subject: [v6 PATCH 02/21] x86/mpx: Do not use SIB index if index points to R/ESP Date: Tue, 7 Mar 2017 16:32:35 -0800 [thread overview] Message-ID: <20170308003254.27833-3-ricardo.neri-calderon@linux.intel.com> (raw) In-Reply-To: <20170308003254.27833-1-ricardo.neri-calderon@linux.intel.com> Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software Developer's Manual volume 2A states that when memory addressing is used (i.e., mod part of ModR/M is not 3), a SIB byte is used and the index of the SIB byte points to the R/ESP (i.e., index = 4), the index should not be used in the computation of the memory address. In these cases the address is simply the value present in the register pointed by the base part of the SIB byte plus the displacement byte. An example of such instruction could be insn -0x80(%rsp) This is represented as: [opcode] 4c 23 80 ModR/M=0x4c: mod: 0x1, reg: 0x1: r/m: 0x4(R/ESP) SIB=0x23: sc: 0, index: 0x100(R/ESP), base: 0x11(R/EBX): Displacement -0x80 The correct address is (base) + displacement; no index is used. We can achieve the desired effect of not using the index by making get_reg_offset return -EDOM in this particular case. This value indicates callers that they should not use the index to calculate the address. EINVAL continues to indicate that an error when decoding the SIB byte. Care is taken to allow R12 to be used as index, which is a valid scenario. Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Adam Buchbinder <adam.buchbinder@gmail.com> Cc: Colin Ian King <colin.king@canonical.com> Cc: Lorenzo Stoakes <lstoakes@gmail.com> Cc: Qiaowei Ren <qiaowei.ren@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Nathan Howard <liverlint@gmail.com> Cc: Adan Hawthorn <adanhawthorn@gmail.com> Cc: Joe Perches <joe@perches.com> Cc: Ravi V. Shankar <ravi.v.shankar@intel.com> Cc: x86@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> --- arch/x86/mm/mpx.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c index ff112e3..d9e92d6 100644 --- a/arch/x86/mm/mpx.c +++ b/arch/x86/mm/mpx.c @@ -110,6 +110,13 @@ static int get_reg_offset(struct insn *insn, struct pt_regs *regs, regno = X86_SIB_INDEX(insn->sib.value); if (X86_REX_X(insn->rex_prefix.value)) regno += 8; + /* + * If mod !=3, register R/ESP (regno=4) is not used as index in + * the address computation. Check is done after looking at REX.X + * This is because R12 (regno=12) can be used as an index. + */ + if (regno == 4 && X86_MODRM_MOD(insn->modrm.value) != 3) + return -EDOM; break; case REG_TYPE_BASE: @@ -159,11 +166,19 @@ static void __user *mpx_get_addr_ref(struct insn *insn, struct pt_regs *regs) goto out_err; indx_offset = get_reg_offset(insn, regs, REG_TYPE_INDEX); - if (indx_offset < 0) + /* + * A negative offset generally means a error, except + * -EDOM, which means that the contents of the register + * should not be used as index. + */ + if (unlikely(indx_offset == -EDOM)) + indx = 0; + else if (unlikely(indx_offset < 0)) goto out_err; + else + indx = regs_get_register(regs, indx_offset); base = regs_get_register(regs, base_offset); - indx = regs_get_register(regs, indx_offset); eff_addr = base + indx * (1 << X86_SIB_SCALE(sib)); } else { addr_offset = get_reg_offset(insn, regs, REG_TYPE_RM); -- 2.9.3
WARNING: multiple messages have this Message-ID (diff)
From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> To: Ingo Molnar <mingo@redhat.com>, Thomas Gleixner <tglx@linutronix.de>, "H. Peter Anvin" <hpa@zytor.com>, Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@suse.de> Cc: Peter Zijlstra <peterz@infradead.org>, Andrew Morton <akpm@linux-foundation.org>, Brian Gerst <brgerst@gmail.com>, Chris Metcalf <cmetcalf@mellanox.com>, Dave Hansen <dave.hansen@linux.intel.com>, Paolo Bonzini <pbonzini@redhat.com>, Liang Z Li <liang.z.li@intel.com>, Masami Hiramatsu <mhiramat@kernel.org>, Huang Rui <ray.huang@amd.com>, Jiri Slaby <jslaby@suse.cz>, Jonathan Corbet <corbet@lwn.net>, "Michael S. Tsirkin" <mst@redhat.com>, Paul Gortmaker <paul.gortmaker@windriver.com>, Vlastimil Babka <vbabka@suse.cz>, Chen Yucong <slaoub@gmail.com>, Alexandre Julliard <julliard@winehq.org>, Stas Sergeev <stsp@list.ru>, Fenghua Yu <fenghua.yu@intel.com>, "Ravi V. Shankar" <ravi.v.shankar@intel.com>, Shuah Khan <shuah@kernel.org>, linux-kernel@vger.kern Subject: [v6 PATCH 02/21] x86/mpx: Do not use SIB index if index points to R/ESP Date: Tue, 7 Mar 2017 16:32:35 -0800 [thread overview] Message-ID: <20170308003254.27833-3-ricardo.neri-calderon@linux.intel.com> (raw) In-Reply-To: <20170308003254.27833-1-ricardo.neri-calderon@linux.intel.com> Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software Developer's Manual volume 2A states that when memory addressing is used (i.e., mod part of ModR/M is not 3), a SIB byte is used and the index of the SIB byte points to the R/ESP (i.e., index = 4), the index should not be used in the computation of the memory address. In these cases the address is simply the value present in the register pointed by the base part of the SIB byte plus the displacement byte. An example of such instruction could be insn -0x80(%rsp) This is represented as: [opcode] 4c 23 80 ModR/M=0x4c: mod: 0x1, reg: 0x1: r/m: 0x4(R/ESP) SIB=0x23: sc: 0, index: 0x100(R/ESP), base: 0x11(R/EBX): Displacement -0x80 The correct address is (base) + displacement; no index is used. We can achieve the desired effect of not using the index by making get_reg_offset return -EDOM in this particular case. This value indicates callers that they should not use the index to calculate the address. EINVAL continues to indicate that an error when decoding the SIB byte. Care is taken to allow R12 to be used as index, which is a valid scenario. Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Adam Buchbinder <adam.buchbinder@gmail.com> Cc: Colin Ian King <colin.king@canonical.com> Cc: Lorenzo Stoakes <lstoakes@gmail.com> Cc: Qiaowei Ren <qiaowei.ren@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Nathan Howard <liverlint@gmail.com> Cc: Adan Hawthorn <adanhawthorn@gmail.com> Cc: Joe Perches <joe@perches.com> Cc: Ravi V. Shankar <ravi.v.shankar@intel.com> Cc: x86@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> --- arch/x86/mm/mpx.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c index ff112e3..d9e92d6 100644 --- a/arch/x86/mm/mpx.c +++ b/arch/x86/mm/mpx.c @@ -110,6 +110,13 @@ static int get_reg_offset(struct insn *insn, struct pt_regs *regs, regno = X86_SIB_INDEX(insn->sib.value); if (X86_REX_X(insn->rex_prefix.value)) regno += 8; + /* + * If mod !=3, register R/ESP (regno=4) is not used as index in + * the address computation. Check is done after looking at REX.X + * This is because R12 (regno=12) can be used as an index. + */ + if (regno == 4 && X86_MODRM_MOD(insn->modrm.value) != 3) + return -EDOM; break; case REG_TYPE_BASE: @@ -159,11 +166,19 @@ static void __user *mpx_get_addr_ref(struct insn *insn, struct pt_regs *regs) goto out_err; indx_offset = get_reg_offset(insn, regs, REG_TYPE_INDEX); - if (indx_offset < 0) + /* + * A negative offset generally means a error, except + * -EDOM, which means that the contents of the register + * should not be used as index. + */ + if (unlikely(indx_offset == -EDOM)) + indx = 0; + else if (unlikely(indx_offset < 0)) goto out_err; + else + indx = regs_get_register(regs, indx_offset); base = regs_get_register(regs, base_offset); - indx = regs_get_register(regs, indx_offset); eff_addr = base + indx * (1 << X86_SIB_SCALE(sib)); } else { addr_offset = get_reg_offset(insn, regs, REG_TYPE_RM); -- 2.9.3
next prev parent reply other threads:[~2017-03-08 0:56 UTC|newest] Thread overview: 222+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-08 0:32 [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 01/21] x86/mpx: Use signed variables to compute effective addresses Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-11 21:56 ` Borislav Petkov 2017-04-11 21:56 ` Borislav Petkov 2017-04-26 1:40 ` Ricardo Neri 2017-04-26 1:40 ` Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri [this message] 2017-03-08 0:32 ` [v6 PATCH 02/21] x86/mpx: Do not use SIB index if index points to R/ESP Ricardo Neri 2017-04-11 11:31 ` Borislav Petkov 2017-04-11 11:31 ` Borislav Petkov 2017-04-26 1:39 ` Ricardo Neri 2017-04-26 1:39 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 03/21] x86/mpx: Do not use R/EBP as base in the SIB byte with Mod = 0 Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-11 22:08 ` Borislav Petkov 2017-04-11 22:08 ` Borislav Petkov 2017-04-26 2:04 ` Ricardo Neri 2017-04-26 2:04 ` Ricardo Neri 2017-04-26 8:05 ` Borislav Petkov 2017-04-26 8:05 ` Borislav Petkov 2017-04-27 22:49 ` Ricardo Neri 2017-04-27 22:49 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 04/21] x86/mpx, x86/insn: Relocate insn util functions to a new insn-kernel Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-12 10:03 ` Borislav Petkov 2017-04-12 10:03 ` Borislav Petkov 2017-04-26 2:05 ` Ricardo Neri 2017-04-26 2:05 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 05/21] x86/insn-eval: Add utility functions to get register offsets Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-12 16:28 ` Borislav Petkov 2017-04-12 16:28 ` Borislav Petkov 2017-04-26 18:13 ` Ricardo Neri 2017-04-26 18:13 ` Ricardo Neri 2017-04-28 10:40 ` Borislav Petkov 2017-04-28 10:40 ` Borislav Petkov 2017-03-08 0:32 ` [v6 PATCH 06/21] x86/insn-eval: Add utility functions to get segment selector Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-18 9:42 ` Borislav Petkov 2017-04-18 9:42 ` Borislav Petkov 2017-04-26 20:44 ` Ricardo Neri 2017-04-26 20:44 ` Ricardo Neri 2017-04-26 20:47 ` Ricardo Neri 2017-04-26 20:47 ` Ricardo Neri 2017-04-30 17:15 ` Borislav Petkov 2017-04-30 17:15 ` Borislav Petkov 2017-05-05 18:31 ` Ricardo Neri 2017-05-05 18:31 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 07/21] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-19 10:26 ` Borislav Petkov 2017-04-19 10:26 ` Borislav Petkov 2017-04-26 21:51 ` Ricardo Neri 2017-04-26 21:51 ` Ricardo Neri 2017-05-04 11:02 ` Borislav Petkov 2017-05-04 11:02 ` Borislav Petkov 2017-05-12 2:13 ` Ricardo Neri 2017-05-12 2:13 ` Ricardo Neri 2017-05-15 17:27 ` Borislav Petkov 2017-05-15 17:27 ` Borislav Petkov 2017-03-08 0:32 ` [v6 PATCH 08/21] x86/insn-eval: Add utility function to get segment descriptor base address Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-20 8:25 ` Borislav Petkov 2017-04-20 8:25 ` Borislav Petkov 2017-04-26 22:37 ` Ricardo Neri 2017-04-26 22:37 ` Ricardo Neri 2017-05-05 17:19 ` Borislav Petkov 2017-05-05 17:19 ` Borislav Petkov 2017-05-12 2:09 ` Ricardo Neri 2017-05-12 2:09 ` Ricardo Neri 2017-04-26 22:52 ` Ricardo Neri 2017-04-26 22:52 ` Ricardo Neri 2017-05-05 17:28 ` Borislav Petkov 2017-05-05 17:28 ` Borislav Petkov 2017-05-12 2:06 ` Ricardo Neri 2017-05-12 2:06 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 09/21] x86/insn-eval: Add functions to get default operand and address sizes Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-20 13:06 ` Borislav Petkov 2017-04-20 13:06 ` Borislav Petkov 2017-04-27 1:07 ` Ricardo Neri 2017-04-27 1:07 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 10/21] x86/insn-eval: Do not use R/EBP as base if mod in ModRM is zero Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-21 10:52 ` Borislav Petkov 2017-04-21 10:52 ` Borislav Petkov 2017-04-27 1:29 ` Ricardo Neri 2017-04-27 1:29 ` Ricardo Neri 2017-05-07 17:20 ` Borislav Petkov 2017-05-07 17:20 ` Borislav Petkov 2017-05-12 1:57 ` Ricardo Neri 2017-05-12 1:57 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 11/21] insn/eval: Incorporate segment base in address computation Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-21 14:55 ` Borislav Petkov 2017-04-21 14:55 ` Borislav Petkov 2017-04-27 1:31 ` Ricardo Neri 2017-04-27 1:31 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 12/21] x86/insn: Support both signed 32-bit and 64-bit effective addresses Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-04-25 13:51 ` Borislav Petkov 2017-04-25 13:51 ` Borislav Petkov 2017-04-27 3:33 ` Ricardo Neri 2017-04-27 3:33 ` Ricardo Neri 2017-05-08 11:42 ` Borislav Petkov 2017-05-08 11:42 ` Borislav Petkov 2017-05-12 1:55 ` Ricardo Neri 2017-05-12 1:55 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 13/21] x86/insn-eval: Add support to resolve 16-bit addressing encodings Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 14/21] x86/insn-eval: Add wrapper function for 16-bit and 32-bit address encodings Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 15/21] x86/mm: Relocate page fault error codes to traps.h Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-03-08 16:08 ` Andy Lutomirski 2017-03-08 16:08 ` Andy Lutomirski 2017-03-08 0:32 ` [v6 PATCH 16/21] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 17/21] x86: Add emulation code for UMIP instructions Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 18/21] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 19/21] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-03-08 15:54 ` Andy Lutomirski 2017-03-08 15:54 ` Andy Lutomirski 2017-03-08 0:32 ` [v6 PATCH 20/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-03-08 0:32 ` [v6 PATCH 21/21] selftests/x86: Add tests for " Ricardo Neri 2017-03-08 0:32 ` Ricardo Neri 2017-03-08 15:56 ` Andy Lutomirski 2017-03-08 15:56 ` Andy Lutomirski 2017-03-10 23:38 ` Ricardo Neri 2017-03-10 23:38 ` Ricardo Neri 2017-03-08 14:08 ` [v6 PATCH 00/21] x86: Enable " Stas Sergeev 2017-03-08 14:08 ` Stas Sergeev 2017-03-08 16:06 ` Andy Lutomirski 2017-03-08 16:06 ` Andy Lutomirski 2017-03-08 16:29 ` Stas Sergeev 2017-03-08 16:29 ` Stas Sergeev 2017-03-08 16:46 ` Andy Lutomirski 2017-03-08 16:46 ` Andy Lutomirski 2017-03-08 16:53 ` Stas Sergeev 2017-03-08 16:53 ` Stas Sergeev 2017-03-09 1:11 ` Ricardo Neri 2017-03-09 1:11 ` Ricardo Neri 2017-03-09 22:05 ` Stas Sergeev 2017-03-09 22:05 ` Stas Sergeev 2017-03-10 2:41 ` Andy Lutomirski 2017-03-10 2:41 ` Andy Lutomirski 2017-03-10 10:30 ` Stas Sergeev 2017-03-10 10:30 ` Stas Sergeev 2017-03-10 21:04 ` Andy Lutomirski 2017-03-10 21:04 ` Andy Lutomirski 2017-03-10 21:37 ` Stas Sergeev 2017-03-10 21:37 ` Stas Sergeev 2017-03-09 1:15 ` Ricardo Neri 2017-03-09 1:15 ` Ricardo Neri 2017-03-09 22:10 ` Stas Sergeev 2017-03-09 22:10 ` Stas Sergeev 2017-03-10 2:39 ` Andy Lutomirski 2017-03-10 2:39 ` Andy Lutomirski 2017-03-10 11:33 ` Stas Sergeev 2017-03-10 11:33 ` Stas Sergeev 2017-03-10 14:17 ` Andy Lutomirski 2017-03-10 14:17 ` Andy Lutomirski 2017-03-11 1:22 ` Ricardo Neri 2017-03-11 1:22 ` Ricardo Neri 2017-03-10 23:59 ` Ricardo Neri 2017-03-10 23:59 ` Ricardo Neri 2017-03-13 21:25 ` Stas Sergeev 2017-03-13 21:25 ` Stas Sergeev 2017-03-27 23:46 ` Ricardo Neri 2017-03-27 23:46 ` Ricardo Neri 2017-03-28 9:38 ` Stas Sergeev 2017-03-28 9:38 ` Stas Sergeev 2017-03-29 4:38 ` Ricardo Neri 2017-03-29 4:38 ` Ricardo Neri 2017-03-29 20:55 ` Stas Sergeev 2017-03-29 20:55 ` Stas Sergeev 2017-03-30 5:14 ` Ricardo Neri 2017-03-30 5:14 ` Ricardo Neri 2017-03-30 10:10 ` Stas Sergeev 2017-03-30 10:10 ` Stas Sergeev 2017-03-31 1:33 ` Ricardo Neri 2017-03-31 1:33 ` Ricardo Neri 2017-03-31 14:11 ` Alexandre Julliard 2017-03-31 14:11 ` Alexandre Julliard 2017-03-31 21:26 ` Stas Sergeev 2017-03-31 21:26 ` Stas Sergeev 2017-04-01 2:18 ` Andy Lutomirski 2017-04-01 2:18 ` Andy Lutomirski 2017-04-04 2:02 ` Ricardo Neri 2017-04-04 2:02 ` Ricardo Neri 2017-04-04 6:08 ` Alexandre Julliard 2017-04-04 6:08 ` Alexandre Julliard 2017-04-01 13:08 ` Stas Sergeev 2017-04-01 13:08 ` Stas Sergeev 2017-04-01 17:49 ` H. Peter Anvin 2017-04-01 17:49 ` H. Peter Anvin 2017-04-02 15:52 ` Andy Lutomirski 2017-04-04 9:59 ` Stas Sergeev 2017-04-04 2:05 ` Ricardo Neri 2017-04-04 2:05 ` Ricardo Neri 2017-04-04 8:03 ` Stas Sergeev 2017-04-04 8:03 ` Stas Sergeev 2017-03-10 23:58 ` Ricardo Neri 2017-03-10 23:58 ` Ricardo Neri 2017-03-09 0:46 ` Ricardo Neri 2017-03-09 0:46 ` Ricardo Neri 2017-03-09 22:01 ` Stas Sergeev 2017-03-09 22:01 ` Stas Sergeev 2017-03-10 23:47 ` Ricardo Neri 2017-03-10 23:47 ` Ricardo Neri 2017-03-10 23:58 ` Stas Sergeev 2017-03-10 23:58 ` Stas Sergeev 2017-03-11 0:13 ` Ricardo Neri 2017-03-11 0:13 ` Ricardo Neri 2017-03-08 16:07 ` Andy Lutomirski 2017-03-08 16:07 ` Andy Lutomirski
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