From: Marc Zyngier <marc.zyngier@arm.com> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, Daniel Lezcano <daniel.lezcano@linaro.org>, Will Deacon <will.deacon@arm.com>, Scott Wood <oss@buserror.net>, Hanjun Guo <hanjun.guo@linaro.org>, Ding Tianhong <dingtianhong@huawei.com>, dann frazier <dann.frazier@canonical.com> Subject: [PATCH v2 15/18] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Date: Mon, 20 Mar 2017 17:48:26 +0000 [thread overview] Message-ID: <20170320174829.28182-16-marc.zyngier@arm.com> (raw) In-Reply-To: <20170320174829.28182-1-marc.zyngier@arm.com> Userspace being allowed to use read CNTVCT_EL0 anytime (and not only in the VDSO), we need to enable trapping whenever a cntvct workaround is enabled on a given CPU. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- drivers/clocksource/arm_arch_timer.c | 42 +++++++++++++++++++++++++----------- 1 file changed, 30 insertions(+), 12 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 70eb42bd6784..eccff0fedf2c 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -83,6 +83,7 @@ static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; static bool arch_timer_c3stop; static bool arch_timer_mem_use_virtual; static bool arch_counter_suspend_stop; +static bool vdso_default = true; static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM); @@ -390,6 +391,17 @@ void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa } static_branch_enable(&arch_timer_read_ool_enabled); + + /* + * Don't use the vdso fastpath if errata require using the + * out-of-line counter accessor. We may change our mind pretty + * late in the game (with a per-CPU erratum, for example), so + * change both the default value and the vdso itself. + */ + if (wa->read_cntvct_el0) { + clocksource_counter.archdata.vdso_direct = false; + vdso_default = false; + } } static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type type, @@ -450,11 +462,19 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t __val; \ }) +static bool arch_timer_this_cpu_has_cntvct_wa(void) +{ + const struct arch_timer_erratum_workaround *wa; + + wa = __this_cpu_read(timer_unstable_counter_workaround); + return wa && wa->read_cntvct_el0; +} #else #define arch_timer_check_ool_workaround(t,a) do { } while(0) #define erratum_set_next_event_tval_virt(...) ({BUG(); 0;}) #define erratum_set_next_event_tval_phys(...) ({BUG(); 0;}) #define erratum_handler(fn, r, ...) ({false;}) +#define arch_timer_this_cpu_has_cntvct_wa() ({false;}) #endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */ static __always_inline irqreturn_t timer_handler(const int access, @@ -674,8 +694,15 @@ static void arch_counter_set_user_access(void) | ARCH_TIMER_VIRT_EVT_EN | ARCH_TIMER_USR_PCT_ACCESS_EN); - /* Enable user access to the virtual counter */ - cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN; + /* + * Enable user access to the virtual counter if it doesn't + * need to be workaround. The vdso may have been already + * disabled though. + */ + if (arch_timer_this_cpu_has_cntvct_wa()) + pr_info("CPU%d: Trapping CNTVCT access\n", smp_processor_id()); + else + cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN; arch_timer_set_cntkctl(cntkctl); } @@ -798,16 +825,7 @@ static void __init arch_counter_register(unsigned type) else arch_timer_read_counter = arch_counter_get_cntpct; - clocksource_counter.archdata.vdso_direct = true; - -#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND - /* - * Don't use the vdso fastpath if errata require using - * the out-of-line counter accessor. - */ - if (static_branch_unlikely(&arch_timer_read_ool_enabled)) - clocksource_counter.archdata.vdso_direct = false; -#endif + clocksource_counter.archdata.vdso_direct = vdso_default; } else { arch_timer_read_counter = arch_counter_get_cntvct_mem; } -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 15/18] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Date: Mon, 20 Mar 2017 17:48:26 +0000 [thread overview] Message-ID: <20170320174829.28182-16-marc.zyngier@arm.com> (raw) In-Reply-To: <20170320174829.28182-1-marc.zyngier@arm.com> Userspace being allowed to use read CNTVCT_EL0 anytime (and not only in the VDSO), we need to enable trapping whenever a cntvct workaround is enabled on a given CPU. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- drivers/clocksource/arm_arch_timer.c | 42 +++++++++++++++++++++++++----------- 1 file changed, 30 insertions(+), 12 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 70eb42bd6784..eccff0fedf2c 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -83,6 +83,7 @@ static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; static bool arch_timer_c3stop; static bool arch_timer_mem_use_virtual; static bool arch_counter_suspend_stop; +static bool vdso_default = true; static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM); @@ -390,6 +391,17 @@ void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa } static_branch_enable(&arch_timer_read_ool_enabled); + + /* + * Don't use the vdso fastpath if errata require using the + * out-of-line counter accessor. We may change our mind pretty + * late in the game (with a per-CPU erratum, for example), so + * change both the default value and the vdso itself. + */ + if (wa->read_cntvct_el0) { + clocksource_counter.archdata.vdso_direct = false; + vdso_default = false; + } } static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type type, @@ -450,11 +462,19 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t __val; \ }) +static bool arch_timer_this_cpu_has_cntvct_wa(void) +{ + const struct arch_timer_erratum_workaround *wa; + + wa = __this_cpu_read(timer_unstable_counter_workaround); + return wa && wa->read_cntvct_el0; +} #else #define arch_timer_check_ool_workaround(t,a) do { } while(0) #define erratum_set_next_event_tval_virt(...) ({BUG(); 0;}) #define erratum_set_next_event_tval_phys(...) ({BUG(); 0;}) #define erratum_handler(fn, r, ...) ({false;}) +#define arch_timer_this_cpu_has_cntvct_wa() ({false;}) #endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */ static __always_inline irqreturn_t timer_handler(const int access, @@ -674,8 +694,15 @@ static void arch_counter_set_user_access(void) | ARCH_TIMER_VIRT_EVT_EN | ARCH_TIMER_USR_PCT_ACCESS_EN); - /* Enable user access to the virtual counter */ - cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN; + /* + * Enable user access to the virtual counter if it doesn't + * need to be workaround. The vdso may have been already + * disabled though. + */ + if (arch_timer_this_cpu_has_cntvct_wa()) + pr_info("CPU%d: Trapping CNTVCT access\n", smp_processor_id()); + else + cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN; arch_timer_set_cntkctl(cntkctl); } @@ -798,16 +825,7 @@ static void __init arch_counter_register(unsigned type) else arch_timer_read_counter = arch_counter_get_cntpct; - clocksource_counter.archdata.vdso_direct = true; - -#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND - /* - * Don't use the vdso fastpath if errata require using - * the out-of-line counter accessor. - */ - if (static_branch_unlikely(&arch_timer_read_ool_enabled)) - clocksource_counter.archdata.vdso_direct = false; -#endif + clocksource_counter.archdata.vdso_direct = vdso_default; } else { arch_timer_read_counter = arch_counter_get_cntvct_mem; } -- 2.11.0
next prev parent reply other threads:[~2017-03-20 18:39 UTC|newest] Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-20 17:48 [PATCH v2 00/18] clocksource/arch_timer: Errata workaround infrastructure rework Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 01/18] arm64: Allow checking of a CPU-local erratum Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-22 9:22 ` Daniel Lezcano 2017-03-22 9:22 ` Daniel Lezcano 2017-03-20 17:48 ` [PATCH v2 02/18] arm64: Add CNTVCT_EL0 trap handler Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 03/18] arm64: Define Cortex-A73 MIDR Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 04/18] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-22 14:57 ` Daniel Lezcano 2017-03-22 14:57 ` Daniel Lezcano 2017-03-20 17:48 ` [PATCH v2 05/18] arm64: cpu_errata: Add capability to advertise Cortex-A73 erratum 858921 Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-22 15:01 ` Daniel Lezcano 2017-03-22 15:01 ` Daniel Lezcano 2017-03-20 17:48 ` [PATCH v2 06/18] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-22 15:41 ` Daniel Lezcano 2017-03-22 15:41 ` Daniel Lezcano 2017-03-22 15:53 ` Marc Zyngier 2017-03-22 15:53 ` Marc Zyngier 2017-03-22 15:59 ` Marc Zyngier 2017-03-22 15:59 ` Marc Zyngier 2017-03-22 16:52 ` Daniel Lezcano 2017-03-22 16:52 ` Daniel Lezcano 2017-03-23 17:30 ` Daniel Lezcano 2017-03-23 17:30 ` Daniel Lezcano 2017-03-24 13:51 ` Marc Zyngier 2017-03-24 13:51 ` Marc Zyngier 2017-03-27 7:56 ` Daniel Lezcano 2017-03-27 7:56 ` Daniel Lezcano 2017-03-28 13:07 ` Marc Zyngier 2017-03-28 13:07 ` Marc Zyngier 2017-03-28 13:34 ` Daniel Lezcano 2017-03-28 13:34 ` Daniel Lezcano 2017-03-28 14:07 ` Marc Zyngier 2017-03-28 14:07 ` Marc Zyngier 2017-03-28 14:36 ` Daniel Lezcano 2017-03-28 14:36 ` Daniel Lezcano 2017-03-28 14:48 ` Marc Zyngier 2017-03-28 14:48 ` Marc Zyngier 2017-03-28 14:55 ` Daniel Lezcano 2017-03-28 14:55 ` Daniel Lezcano 2017-03-28 15:38 ` Marc Zyngier 2017-03-28 15:38 ` Marc Zyngier 2017-03-29 14:27 ` Daniel Lezcano 2017-03-29 14:27 ` Daniel Lezcano 2017-03-29 14:56 ` Marc Zyngier 2017-03-29 14:56 ` Marc Zyngier 2017-03-29 15:12 ` Daniel Lezcano 2017-03-29 15:12 ` Daniel Lezcano 2017-03-24 17:48 ` dann frazier 2017-03-24 17:48 ` dann frazier 2017-03-24 18:00 ` Marc Zyngier 2017-03-24 18:00 ` Marc Zyngier 2017-03-30 9:28 ` Daniel Lezcano 2017-03-30 9:28 ` Daniel Lezcano 2017-03-20 17:48 ` [PATCH v2 07/18] arm64: arch_timer: Add erratum handler for globally defined capability Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 08/18] arm64: arch_timer: Add erratum handler for CPU-specific capability Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 09/18] arm64: arch_timer: Move arch_timer_reg_read/write around Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-22 15:47 ` Daniel Lezcano 2017-03-22 15:47 ` Daniel Lezcano 2017-03-20 17:48 ` [PATCH v2 10/18] arm64: arch_timer: Get rid of erratum_workaround_set_sne Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 11/18] arm64: arch_timer: Rework the set_next_event workarounds Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 12/18] arm64: arch_timer: Make workaround methods optional Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 13/18] arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 14/18] arm64: arch_timer: Move clocksource_counter and co around Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier [this message] 2017-03-20 17:48 ` [PATCH v2 15/18] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 16/18] arm64: arch_timer: Workaround for Cortex-A73 erratum 858921 Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 17/18] arm64: arch_timer: Allow erratum matching with ACPI OEM information Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-20 17:48 ` [PATCH v2 18/18] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Marc Zyngier 2017-03-20 17:48 ` Marc Zyngier 2017-03-22 13:56 ` [PATCH v2 00/18] clocksource/arch_timer: Errata workaround infrastructure rework Ding Tianhong 2017-03-22 13:56 ` Ding Tianhong
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