* [PATCH 0/2] i.MX6QP GPC fixes @ 2017-03-23 14:44 ` Lucas Stach 0 siblings, 0 replies; 18+ messages in thread From: Lucas Stach @ 2017-03-23 14:44 UTC (permalink / raw) To: Shawn Guo Cc: Fabio Estevam, Dong Aisheng, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-bIcnvbaLZ9MEGnE8C9+IrQ, patchwork-lst-bIcnvbaLZ9MEGnE8C9+IrQ Hi Shawn, those 2 patches implement the necessary workaround for the PU power domain on the i.MX6QP. Both are on top of Dong Aishengs GPC fixes series. I'll submit the DT change to make use of the new compatible when the GPC driver branch has been merged upstream. Regards, Lucas Lucas Stach (2): dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible soc/imx: add workaround for i.MX6QP to the GPC PD driver .../devicetree/bindings/power/fsl,imx-gpc.txt | 5 ++++- drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ 2 files changed, 23 insertions(+), 1 deletion(-) -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 0/2] i.MX6QP GPC fixes @ 2017-03-23 14:44 ` Lucas Stach 0 siblings, 0 replies; 18+ messages in thread From: Lucas Stach @ 2017-03-23 14:44 UTC (permalink / raw) To: linux-arm-kernel Hi Shawn, those 2 patches implement the necessary workaround for the PU power domain on the i.MX6QP. Both are on top of Dong Aishengs GPC fixes series. I'll submit the DT change to make use of the new compatible when the GPC driver branch has been merged upstream. Regards, Lucas Lucas Stach (2): dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible soc/imx: add workaround for i.MX6QP to the GPC PD driver .../devicetree/bindings/power/fsl,imx-gpc.txt | 5 ++++- drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ 2 files changed, 23 insertions(+), 1 deletion(-) -- 2.11.0 ^ permalink raw reply [flat|nested] 18+ messages in thread
[parent not found: <20170323144418.30977-1-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>]
* [PATCH 1/2] dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible 2017-03-23 14:44 ` Lucas Stach @ 2017-03-23 14:44 ` Lucas Stach -1 siblings, 0 replies; 18+ messages in thread From: Lucas Stach @ 2017-03-23 14:44 UTC (permalink / raw) To: Shawn Guo Cc: Fabio Estevam, Dong Aisheng, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-bIcnvbaLZ9MEGnE8C9+IrQ, patchwork-lst-bIcnvbaLZ9MEGnE8C9+IrQ While the GPC on i.MX6QP is mostly comptible to the i.MX6Q one, the QuadPlus requires special workarounds for hardware erratum ERR009619. Signed-off-by: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> --- Documentation/devicetree/bindings/power/fsl,imx-gpc.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt b/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt index 416e12c6755a..181d2cc6f054 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt @@ -5,7 +5,10 @@ The i.MX6 General Power Control (GPC) block contains DVFS load tracking counters and Power Gating Control (PGC). Required properties: -- compatible: Should be "fsl,imx6q-gpc" or "fsl,imx6sl-gpc" +- compatible: Should be one of the following: + - fsl,imx6q-gpc + - fsl,imx6qp-gpc + - fsl,imx6sl-gpc - reg: should be register base and length as documented in the datasheet - interrupts: Should contain one interrupt specifier for the GPC interrupt -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 1/2] dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible @ 2017-03-23 14:44 ` Lucas Stach 0 siblings, 0 replies; 18+ messages in thread From: Lucas Stach @ 2017-03-23 14:44 UTC (permalink / raw) To: linux-arm-kernel While the GPC on i.MX6QP is mostly comptible to the i.MX6Q one, the QuadPlus requires special workarounds for hardware erratum ERR009619. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- Documentation/devicetree/bindings/power/fsl,imx-gpc.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt b/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt index 416e12c6755a..181d2cc6f054 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt @@ -5,7 +5,10 @@ The i.MX6 General Power Control (GPC) block contains DVFS load tracking counters and Power Gating Control (PGC). Required properties: -- compatible: Should be "fsl,imx6q-gpc" or "fsl,imx6sl-gpc" +- compatible: Should be one of the following: + - fsl,imx6q-gpc + - fsl,imx6qp-gpc + - fsl,imx6sl-gpc - reg: should be register base and length as documented in the datasheet - interrupts: Should contain one interrupt specifier for the GPC interrupt -- 2.11.0 ^ permalink raw reply related [flat|nested] 18+ messages in thread
[parent not found: <20170323144418.30977-2-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>]
* Re: [PATCH 1/2] dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible 2017-03-23 14:44 ` Lucas Stach @ 2017-03-29 15:59 ` Rob Herring -1 siblings, 0 replies; 18+ messages in thread From: Rob Herring @ 2017-03-29 15:59 UTC (permalink / raw) To: Lucas Stach Cc: Shawn Guo, Fabio Estevam, Dong Aisheng, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-bIcnvbaLZ9MEGnE8C9+IrQ, patchwork-lst-bIcnvbaLZ9MEGnE8C9+IrQ On Thu, Mar 23, 2017 at 03:44:17PM +0100, Lucas Stach wrote: > While the GPC on i.MX6QP is mostly comptible to the i.MX6Q one, > the QuadPlus requires special workarounds for hardware erratum > ERR009619. > > Signed-off-by: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> > --- > Documentation/devicetree/bindings/power/fsl,imx-gpc.txt | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/2] dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible @ 2017-03-29 15:59 ` Rob Herring 0 siblings, 0 replies; 18+ messages in thread From: Rob Herring @ 2017-03-29 15:59 UTC (permalink / raw) To: linux-arm-kernel On Thu, Mar 23, 2017 at 03:44:17PM +0100, Lucas Stach wrote: > While the GPC on i.MX6QP is mostly comptible to the i.MX6Q one, > the QuadPlus requires special workarounds for hardware erratum > ERR009619. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > Documentation/devicetree/bindings/power/fsl,imx-gpc.txt | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver 2017-03-23 14:44 ` Lucas Stach @ 2017-03-23 14:44 ` Lucas Stach -1 siblings, 0 replies; 18+ messages in thread From: Lucas Stach @ 2017-03-23 14:44 UTC (permalink / raw) To: Shawn Guo Cc: Fabio Estevam, Dong Aisheng, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-bIcnvbaLZ9MEGnE8C9+IrQ, patchwork-lst-bIcnvbaLZ9MEGnE8C9+IrQ On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be stalled during the power up sequencing of the PU power domain. As this may lead to a complete loss of display output, the recommended workaround is to keep the PU domain enabled during normal system operation. Implement this by rejecting the domain power down request on the affected SoC. Signed-off-by: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> --- drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index 4294287e5f6c..599e1e46f694 100644 --- a/drivers/soc/imx/gpc.c +++ b/drivers/soc/imx/gpc.c @@ -45,6 +45,7 @@ struct imx_pm_domain { unsigned int reg_offs; signed char cntr_pdn_bit; unsigned int ipg_rate_mhz; + bool allow_dynamic_pd; }; static inline struct imx_pm_domain * @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct generic_pm_domain *genpd) int iso, iso2sw; u32 val; + if (!pd->allow_dynamic_pd) + return -EBUSY; + /* Read ISO and ISO2SW power down delays */ regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); iso = val & 0x3f; @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { }, .reg_offs = 0x260, .cntr_pdn_bit = 0, + .allow_dynamic_pd = true, }, { .base = { .name = "DISPLAY", @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { }, .reg_offs = 0x240, .cntr_pdn_bit = 4, + .allow_dynamic_pd = true, } }; struct imx_gpc_dt_data { int num_domains; + bool err009619_present; }; static const struct imx_gpc_dt_data imx6q_dt_data = { .num_domains = 2, + .err009619_present = false, +}; + +static const struct imx_gpc_dt_data imx6qp_dt_data = { + .num_domains = 2, + .err009619_present = true, }; static const struct imx_gpc_dt_data imx6sl_dt_data = { .num_domains = 3, + .err009619_present = false, }; static const struct of_device_id imx_gpc_dt_ids[] = { { .compatible = "fsl,imx6q-gpc", .data = &imx6q_dt_data }, + { .compatible = "fsl,imx6qp-gpc", .data = &imx6qp_dt_data }, { .compatible = "fsl,imx6sl-gpc", .data = &imx6sl_dt_data }, { } }; @@ -377,6 +392,10 @@ static int imx_gpc_probe(struct platform_device *pdev) return ret; } + /* Disable PU power down in normal operation if ERR009619 is present */ + if (of_id_data->err009619_present) + imx_gpc_domains[1].allow_dynamic_pd = false; + if (!pgc_node) { ret = imx_gpc_old_dt_init(&pdev->dev, regmap, of_id_data->num_domains); -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver @ 2017-03-23 14:44 ` Lucas Stach 0 siblings, 0 replies; 18+ messages in thread From: Lucas Stach @ 2017-03-23 14:44 UTC (permalink / raw) To: linux-arm-kernel On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be stalled during the power up sequencing of the PU power domain. As this may lead to a complete loss of display output, the recommended workaround is to keep the PU domain enabled during normal system operation. Implement this by rejecting the domain power down request on the affected SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index 4294287e5f6c..599e1e46f694 100644 --- a/drivers/soc/imx/gpc.c +++ b/drivers/soc/imx/gpc.c @@ -45,6 +45,7 @@ struct imx_pm_domain { unsigned int reg_offs; signed char cntr_pdn_bit; unsigned int ipg_rate_mhz; + bool allow_dynamic_pd; }; static inline struct imx_pm_domain * @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct generic_pm_domain *genpd) int iso, iso2sw; u32 val; + if (!pd->allow_dynamic_pd) + return -EBUSY; + /* Read ISO and ISO2SW power down delays */ regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); iso = val & 0x3f; @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { }, .reg_offs = 0x260, .cntr_pdn_bit = 0, + .allow_dynamic_pd = true, }, { .base = { .name = "DISPLAY", @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { }, .reg_offs = 0x240, .cntr_pdn_bit = 4, + .allow_dynamic_pd = true, } }; struct imx_gpc_dt_data { int num_domains; + bool err009619_present; }; static const struct imx_gpc_dt_data imx6q_dt_data = { .num_domains = 2, + .err009619_present = false, +}; + +static const struct imx_gpc_dt_data imx6qp_dt_data = { + .num_domains = 2, + .err009619_present = true, }; static const struct imx_gpc_dt_data imx6sl_dt_data = { .num_domains = 3, + .err009619_present = false, }; static const struct of_device_id imx_gpc_dt_ids[] = { { .compatible = "fsl,imx6q-gpc", .data = &imx6q_dt_data }, + { .compatible = "fsl,imx6qp-gpc", .data = &imx6qp_dt_data }, { .compatible = "fsl,imx6sl-gpc", .data = &imx6sl_dt_data }, { } }; @@ -377,6 +392,10 @@ static int imx_gpc_probe(struct platform_device *pdev) return ret; } + /* Disable PU power down in normal operation if ERR009619 is present */ + if (of_id_data->err009619_present) + imx_gpc_domains[1].allow_dynamic_pd = false; + if (!pgc_node) { ret = imx_gpc_old_dt_init(&pdev->dev, regmap, of_id_data->num_domains); -- 2.11.0 ^ permalink raw reply related [flat|nested] 18+ messages in thread
[parent not found: <20170323144418.30977-3-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>]
* Re: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver 2017-03-23 14:44 ` Lucas Stach @ 2017-03-24 6:28 ` Shawn Guo -1 siblings, 0 replies; 18+ messages in thread From: Shawn Guo @ 2017-03-24 6:28 UTC (permalink / raw) To: Lucas Stach Cc: Fabio Estevam, Dong Aisheng, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-bIcnvbaLZ9MEGnE8C9+IrQ, patchwork-lst-bIcnvbaLZ9MEGnE8C9+IrQ On Thu, Mar 23, 2017 at 03:44:18PM +0100, Lucas Stach wrote: > On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be > stalled during the power up sequencing of the PU power domain. As this > may lead to a complete loss of display output, the recommended > workaround is to keep the PU domain enabled during normal system > operation. > > Implement this by rejecting the domain power down request on the > affected SoC. > > Signed-off-by: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> > --- > drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c > index 4294287e5f6c..599e1e46f694 100644 > --- a/drivers/soc/imx/gpc.c > +++ b/drivers/soc/imx/gpc.c > @@ -45,6 +45,7 @@ struct imx_pm_domain { > unsigned int reg_offs; > signed char cntr_pdn_bit; > unsigned int ipg_rate_mhz; > + bool allow_dynamic_pd; > }; > > static inline struct imx_pm_domain * > @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct generic_pm_domain *genpd) > int iso, iso2sw; > u32 val; > > + if (!pd->allow_dynamic_pd) > + return -EBUSY; > + > /* Read ISO and ISO2SW power down delays */ > regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); > iso = val & 0x3f; > @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { > }, > .reg_offs = 0x260, > .cntr_pdn_bit = 0, > + .allow_dynamic_pd = true, > }, { > .base = { > .name = "DISPLAY", > @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { > }, > .reg_offs = 0x240, > .cntr_pdn_bit = 4, > + .allow_dynamic_pd = true, > } > }; > > struct imx_gpc_dt_data { > int num_domains; > + bool err009619_present; > }; > > static const struct imx_gpc_dt_data imx6q_dt_data = { > .num_domains = 2, > + .err009619_present = false, > +}; > + > +static const struct imx_gpc_dt_data imx6qp_dt_data = { > + .num_domains = 2, > + .err009619_present = true, > }; > > static const struct imx_gpc_dt_data imx6sl_dt_data = { > .num_domains = 3, > + .err009619_present = false, > }; > > static const struct of_device_id imx_gpc_dt_ids[] = { > { .compatible = "fsl,imx6q-gpc", .data = &imx6q_dt_data }, > + { .compatible = "fsl,imx6qp-gpc", .data = &imx6qp_dt_data }, > { .compatible = "fsl,imx6sl-gpc", .data = &imx6sl_dt_data }, > { } > }; > @@ -377,6 +392,10 @@ static int imx_gpc_probe(struct platform_device *pdev) > return ret; > } > > + /* Disable PU power down in normal operation if ERR009619 is present */ > + if (of_id_data->err009619_present) > + imx_gpc_domains[1].allow_dynamic_pd = false; I'm uncomfortable with using hard-coded value indexing the imx_gpc_domains array for a particular power domain. We already have a couple of such uses in the code, and it becomes even more. Can we have some defines or enumerations to help? Shawn > + > if (!pgc_node) { > ret = imx_gpc_old_dt_init(&pdev->dev, regmap, > of_id_data->num_domains); > -- > 2.11.0 > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver @ 2017-03-24 6:28 ` Shawn Guo 0 siblings, 0 replies; 18+ messages in thread From: Shawn Guo @ 2017-03-24 6:28 UTC (permalink / raw) To: linux-arm-kernel On Thu, Mar 23, 2017 at 03:44:18PM +0100, Lucas Stach wrote: > On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be > stalled during the power up sequencing of the PU power domain. As this > may lead to a complete loss of display output, the recommended > workaround is to keep the PU domain enabled during normal system > operation. > > Implement this by rejecting the domain power down request on the > affected SoC. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c > index 4294287e5f6c..599e1e46f694 100644 > --- a/drivers/soc/imx/gpc.c > +++ b/drivers/soc/imx/gpc.c > @@ -45,6 +45,7 @@ struct imx_pm_domain { > unsigned int reg_offs; > signed char cntr_pdn_bit; > unsigned int ipg_rate_mhz; > + bool allow_dynamic_pd; > }; > > static inline struct imx_pm_domain * > @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct generic_pm_domain *genpd) > int iso, iso2sw; > u32 val; > > + if (!pd->allow_dynamic_pd) > + return -EBUSY; > + > /* Read ISO and ISO2SW power down delays */ > regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); > iso = val & 0x3f; > @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { > }, > .reg_offs = 0x260, > .cntr_pdn_bit = 0, > + .allow_dynamic_pd = true, > }, { > .base = { > .name = "DISPLAY", > @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { > }, > .reg_offs = 0x240, > .cntr_pdn_bit = 4, > + .allow_dynamic_pd = true, > } > }; > > struct imx_gpc_dt_data { > int num_domains; > + bool err009619_present; > }; > > static const struct imx_gpc_dt_data imx6q_dt_data = { > .num_domains = 2, > + .err009619_present = false, > +}; > + > +static const struct imx_gpc_dt_data imx6qp_dt_data = { > + .num_domains = 2, > + .err009619_present = true, > }; > > static const struct imx_gpc_dt_data imx6sl_dt_data = { > .num_domains = 3, > + .err009619_present = false, > }; > > static const struct of_device_id imx_gpc_dt_ids[] = { > { .compatible = "fsl,imx6q-gpc", .data = &imx6q_dt_data }, > + { .compatible = "fsl,imx6qp-gpc", .data = &imx6qp_dt_data }, > { .compatible = "fsl,imx6sl-gpc", .data = &imx6sl_dt_data }, > { } > }; > @@ -377,6 +392,10 @@ static int imx_gpc_probe(struct platform_device *pdev) > return ret; > } > > + /* Disable PU power down in normal operation if ERR009619 is present */ > + if (of_id_data->err009619_present) > + imx_gpc_domains[1].allow_dynamic_pd = false; I'm uncomfortable with using hard-coded value indexing the imx_gpc_domains array for a particular power domain. We already have a couple of such uses in the code, and it becomes even more. Can we have some defines or enumerations to help? Shawn > + > if (!pgc_node) { > ret = imx_gpc_old_dt_init(&pdev->dev, regmap, > of_id_data->num_domains); > -- > 2.11.0 > ^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver 2017-03-23 14:44 ` Lucas Stach @ 2017-03-29 16:08 ` A.S. Dong -1 siblings, 0 replies; 18+ messages in thread From: A.S. Dong @ 2017-03-29 16:08 UTC (permalink / raw) To: Lucas Stach, Shawn Guo Cc: Fabio Estevam, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-bIcnvbaLZ9MEGnE8C9+IrQ, patchwork-lst-bIcnvbaLZ9MEGnE8C9+IrQ Hi Lucas, > -----Original Message----- > From: Lucas Stach [mailto:l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org] > Sent: Thursday, March 23, 2017 10:44 PM > To: Shawn Guo > Cc: Fabio Estevam; A.S. Dong; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-arm- > kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org; kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org; patchwork- > lst-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org > Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD > driver > > On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be > stalled during the power up sequencing of the PU power domain. As this may > lead to a complete loss of display output, the recommended workaround is > to keep the PU domain enabled during normal system operation. > > Implement this by rejecting the domain power down request on the affected > SoC. > > Signed-off-by: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> > --- > drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index > 4294287e5f6c..599e1e46f694 100644 > --- a/drivers/soc/imx/gpc.c > +++ b/drivers/soc/imx/gpc.c > @@ -45,6 +45,7 @@ struct imx_pm_domain { > unsigned int reg_offs; > signed char cntr_pdn_bit; > unsigned int ipg_rate_mhz; > + bool allow_dynamic_pd; > }; > > static inline struct imx_pm_domain * > @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct > generic_pm_domain *genpd) > int iso, iso2sw; > u32 val; > > + if (!pd->allow_dynamic_pd) > + return -EBUSY; > + > /* Read ISO and ISO2SW power down delays */ > regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); > iso = val & 0x3f; > @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { > }, > .reg_offs = 0x260, > .cntr_pdn_bit = 0, > + .allow_dynamic_pd = true, > }, { > .base = { > .name = "DISPLAY", > @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { > }, > .reg_offs = 0x240, > .cntr_pdn_bit = 4, > + .allow_dynamic_pd = true, Just a Nitpick, besides shawn's comment in another mail, if we use a domain flag like IMX_PD_ALWAYS_ON set by SoC errata flag, then probably we can save all the default allow_dynamic_pd lines. This also release the life when adding new domains. Otherwise, the two patch seems good to me. Regards Dong Aisheng > } > }; > > struct imx_gpc_dt_data { > int num_domains; > + bool err009619_present; > }; > > static const struct imx_gpc_dt_data imx6q_dt_data = { > .num_domains = 2, > + .err009619_present = false, > +}; > + > +static const struct imx_gpc_dt_data imx6qp_dt_data = { > + .num_domains = 2, > + .err009619_present = true, > }; > > static const struct imx_gpc_dt_data imx6sl_dt_data = { > .num_domains = 3, > + .err009619_present = false, > }; > > static const struct of_device_id imx_gpc_dt_ids[] = { > { .compatible = "fsl,imx6q-gpc", .data = &imx6q_dt_data }, > + { .compatible = "fsl,imx6qp-gpc", .data = &imx6qp_dt_data }, > { .compatible = "fsl,imx6sl-gpc", .data = &imx6sl_dt_data }, > { } > }; > @@ -377,6 +392,10 @@ static int imx_gpc_probe(struct platform_device *pdev) > return ret; > } > > + /* Disable PU power down in normal operation if ERR009619 is present > */ > + if (of_id_data->err009619_present) > + imx_gpc_domains[1].allow_dynamic_pd = false; > + > if (!pgc_node) { > ret = imx_gpc_old_dt_init(&pdev->dev, regmap, > of_id_data->num_domains); > -- > 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver @ 2017-03-29 16:08 ` A.S. Dong 0 siblings, 0 replies; 18+ messages in thread From: A.S. Dong @ 2017-03-29 16:08 UTC (permalink / raw) To: linux-arm-kernel Hi Lucas, > -----Original Message----- > From: Lucas Stach [mailto:l.stach at pengutronix.de] > Sent: Thursday, March 23, 2017 10:44 PM > To: Shawn Guo > Cc: Fabio Estevam; A.S. Dong; devicetree at vger.kernel.org; linux-arm- > kernel at lists.infradead.org; kernel at pengutronix.de; patchwork- > lst at pengutronix.de > Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD > driver > > On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be > stalled during the power up sequencing of the PU power domain. As this may > lead to a complete loss of display output, the recommended workaround is > to keep the PU domain enabled during normal system operation. > > Implement this by rejecting the domain power down request on the affected > SoC. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index > 4294287e5f6c..599e1e46f694 100644 > --- a/drivers/soc/imx/gpc.c > +++ b/drivers/soc/imx/gpc.c > @@ -45,6 +45,7 @@ struct imx_pm_domain { > unsigned int reg_offs; > signed char cntr_pdn_bit; > unsigned int ipg_rate_mhz; > + bool allow_dynamic_pd; > }; > > static inline struct imx_pm_domain * > @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct > generic_pm_domain *genpd) > int iso, iso2sw; > u32 val; > > + if (!pd->allow_dynamic_pd) > + return -EBUSY; > + > /* Read ISO and ISO2SW power down delays */ > regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); > iso = val & 0x3f; > @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { > }, > .reg_offs = 0x260, > .cntr_pdn_bit = 0, > + .allow_dynamic_pd = true, > }, { > .base = { > .name = "DISPLAY", > @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { > }, > .reg_offs = 0x240, > .cntr_pdn_bit = 4, > + .allow_dynamic_pd = true, Just a Nitpick, besides shawn's comment in another mail, if we use a domain flag like IMX_PD_ALWAYS_ON set by SoC errata flag, then probably we can save all the default allow_dynamic_pd lines. This also release the life when adding new domains. Otherwise, the two patch seems good to me. Regards Dong Aisheng > } > }; > > struct imx_gpc_dt_data { > int num_domains; > + bool err009619_present; > }; > > static const struct imx_gpc_dt_data imx6q_dt_data = { > .num_domains = 2, > + .err009619_present = false, > +}; > + > +static const struct imx_gpc_dt_data imx6qp_dt_data = { > + .num_domains = 2, > + .err009619_present = true, > }; > > static const struct imx_gpc_dt_data imx6sl_dt_data = { > .num_domains = 3, > + .err009619_present = false, > }; > > static const struct of_device_id imx_gpc_dt_ids[] = { > { .compatible = "fsl,imx6q-gpc", .data = &imx6q_dt_data }, > + { .compatible = "fsl,imx6qp-gpc", .data = &imx6qp_dt_data }, > { .compatible = "fsl,imx6sl-gpc", .data = &imx6sl_dt_data }, > { } > }; > @@ -377,6 +392,10 @@ static int imx_gpc_probe(struct platform_device *pdev) > return ret; > } > > + /* Disable PU power down in normal operation if ERR009619 is present > */ > + if (of_id_data->err009619_present) > + imx_gpc_domains[1].allow_dynamic_pd = false; > + > if (!pgc_node) { > ret = imx_gpc_old_dt_init(&pdev->dev, regmap, > of_id_data->num_domains); > -- > 2.11.0 ^ permalink raw reply [flat|nested] 18+ messages in thread
[parent not found: <DB5PR04MB1431A7CC91F55ECFE5BE31FB80350-rqLcZCCNzVwrYIBjo4yUUM9NdZoXdze2vxpqHgZTriW3zl9H0oFU5g@public.gmane.org>]
* Re: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver 2017-03-29 16:08 ` A.S. Dong @ 2017-03-29 16:13 ` Lucas Stach -1 siblings, 0 replies; 18+ messages in thread From: Lucas Stach @ 2017-03-29 16:13 UTC (permalink / raw) To: A.S. Dong Cc: Shawn Guo, Fabio Estevam, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-bIcnvbaLZ9MEGnE8C9+IrQ, patchwork-lst-bIcnvbaLZ9MEGnE8C9+IrQ Am Mittwoch, den 29.03.2017, 16:08 +0000 schrieb A.S. Dong: > Hi Lucas, > > > -----Original Message----- > > From: Lucas Stach [mailto:l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org] > > Sent: Thursday, March 23, 2017 10:44 PM > > To: Shawn Guo > > Cc: Fabio Estevam; A.S. Dong; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-arm- > > kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org; kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org; patchwork- > > lst-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org > > Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD > > driver > > > > On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be > > stalled during the power up sequencing of the PU power domain. As this may > > lead to a complete loss of display output, the recommended workaround is > > to keep the PU domain enabled during normal system operation. > > > > Implement this by rejecting the domain power down request on the affected > > SoC. > > > > Signed-off-by: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> > > --- > > drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index > > 4294287e5f6c..599e1e46f694 100644 > > --- a/drivers/soc/imx/gpc.c > > +++ b/drivers/soc/imx/gpc.c > > @@ -45,6 +45,7 @@ struct imx_pm_domain { > > unsigned int reg_offs; > > signed char cntr_pdn_bit; > > unsigned int ipg_rate_mhz; > > + bool allow_dynamic_pd; > > }; > > > > static inline struct imx_pm_domain * > > @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct > > generic_pm_domain *genpd) > > int iso, iso2sw; > > u32 val; > > > > + if (!pd->allow_dynamic_pd) > > + return -EBUSY; > > + > > /* Read ISO and ISO2SW power down delays */ > > regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); > > iso = val & 0x3f; > > @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > }, > > .reg_offs = 0x260, > > .cntr_pdn_bit = 0, > > + .allow_dynamic_pd = true, > > }, { > > .base = { > > .name = "DISPLAY", > > @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > }, > > .reg_offs = 0x240, > > .cntr_pdn_bit = 4, > > + .allow_dynamic_pd = true, > > Just a Nitpick, besides shawn's comment in another mail, > if we use a domain flag like IMX_PD_ALWAYS_ON set by SoC errata flag, > then probably we can save all the default allow_dynamic_pd lines. > This also release the life when adding new domains. If other things like that show up we can certainly switch to a flags field. In the meantime I like that the current style is more explicit about it. Regards, Lucas -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver @ 2017-03-29 16:13 ` Lucas Stach 0 siblings, 0 replies; 18+ messages in thread From: Lucas Stach @ 2017-03-29 16:13 UTC (permalink / raw) To: linux-arm-kernel Am Mittwoch, den 29.03.2017, 16:08 +0000 schrieb A.S. Dong: > Hi Lucas, > > > -----Original Message----- > > From: Lucas Stach [mailto:l.stach at pengutronix.de] > > Sent: Thursday, March 23, 2017 10:44 PM > > To: Shawn Guo > > Cc: Fabio Estevam; A.S. Dong; devicetree at vger.kernel.org; linux-arm- > > kernel at lists.infradead.org; kernel at pengutronix.de; patchwork- > > lst at pengutronix.de > > Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD > > driver > > > > On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be > > stalled during the power up sequencing of the PU power domain. As this may > > lead to a complete loss of display output, the recommended workaround is > > to keep the PU domain enabled during normal system operation. > > > > Implement this by rejecting the domain power down request on the affected > > SoC. > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > --- > > drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index > > 4294287e5f6c..599e1e46f694 100644 > > --- a/drivers/soc/imx/gpc.c > > +++ b/drivers/soc/imx/gpc.c > > @@ -45,6 +45,7 @@ struct imx_pm_domain { > > unsigned int reg_offs; > > signed char cntr_pdn_bit; > > unsigned int ipg_rate_mhz; > > + bool allow_dynamic_pd; > > }; > > > > static inline struct imx_pm_domain * > > @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct > > generic_pm_domain *genpd) > > int iso, iso2sw; > > u32 val; > > > > + if (!pd->allow_dynamic_pd) > > + return -EBUSY; > > + > > /* Read ISO and ISO2SW power down delays */ > > regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); > > iso = val & 0x3f; > > @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > }, > > .reg_offs = 0x260, > > .cntr_pdn_bit = 0, > > + .allow_dynamic_pd = true, > > }, { > > .base = { > > .name = "DISPLAY", > > @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > }, > > .reg_offs = 0x240, > > .cntr_pdn_bit = 4, > > + .allow_dynamic_pd = true, > > Just a Nitpick, besides shawn's comment in another mail, > if we use a domain flag like IMX_PD_ALWAYS_ON set by SoC errata flag, > then probably we can save all the default allow_dynamic_pd lines. > This also release the life when adding new domains. If other things like that show up we can certainly switch to a flags field. In the meantime I like that the current style is more explicit about it. Regards, Lucas ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver 2017-03-29 16:13 ` Lucas Stach @ 2017-03-30 7:08 ` Lothar Waßmann -1 siblings, 0 replies; 18+ messages in thread From: Lothar Waßmann @ 2017-03-30 7:08 UTC (permalink / raw) To: Lucas Stach Cc: A.S. Dong, devicetree, patchwork-lst, kernel, Fabio Estevam, Shawn Guo, linux-arm-kernel Hi, On Wed, 29 Mar 2017 18:13:46 +0200 Lucas Stach wrote: > Am Mittwoch, den 29.03.2017, 16:08 +0000 schrieb A.S. Dong: > > Hi Lucas, > > > > > -----Original Message----- > > > From: Lucas Stach [mailto:l.stach@pengutronix.de] > > > Sent: Thursday, March 23, 2017 10:44 PM > > > To: Shawn Guo > > > Cc: Fabio Estevam; A.S. Dong; devicetree@vger.kernel.org; linux-arm- > > > kernel@lists.infradead.org; kernel@pengutronix.de; patchwork- > > > lst@pengutronix.de > > > Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD > > > driver > > > > > > On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be > > > stalled during the power up sequencing of the PU power domain. As this may > > > lead to a complete loss of display output, the recommended workaround is > > > to keep the PU domain enabled during normal system operation. > > > > > > Implement this by rejecting the domain power down request on the affected > > > SoC. > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > --- > > > drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ > > > 1 file changed, 19 insertions(+) > > > > > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index > > > 4294287e5f6c..599e1e46f694 100644 > > > --- a/drivers/soc/imx/gpc.c > > > +++ b/drivers/soc/imx/gpc.c > > > @@ -45,6 +45,7 @@ struct imx_pm_domain { > > > unsigned int reg_offs; > > > signed char cntr_pdn_bit; > > > unsigned int ipg_rate_mhz; > > > + bool allow_dynamic_pd; > > > }; > > > > > > static inline struct imx_pm_domain * > > > @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct > > > generic_pm_domain *genpd) > > > int iso, iso2sw; > > > u32 val; > > > > > > + if (!pd->allow_dynamic_pd) > > > + return -EBUSY; > > > + > > > /* Read ISO and ISO2SW power down delays */ > > > regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); > > > iso = val & 0x3f; > > > @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > > }, > > > .reg_offs = 0x260, > > > .cntr_pdn_bit = 0, > > > + .allow_dynamic_pd = true, > > > }, { > > > .base = { > > > .name = "DISPLAY", > > > @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > > }, > > > .reg_offs = 0x240, > > > .cntr_pdn_bit = 4, > > > + .allow_dynamic_pd = true, > > > > Just a Nitpick, besides shawn's comment in another mail, > > if we use a domain flag like IMX_PD_ALWAYS_ON set by SoC errata flag, > > then probably we can save all the default allow_dynamic_pd lines. > > This also release the life when adding new domains. > > If other things like that show up we can certainly switch to a flags > field. In the meantime I like that the current style is more explicit > about it. > Since the purpose of the driver is all about dynamic power management, I would rather add a 'disable_dynamic_pd' for the case(s) where it's not allowed, rather than having to state the obvious over and over again. Lothar Waßmann _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver @ 2017-03-30 7:08 ` Lothar Waßmann 0 siblings, 0 replies; 18+ messages in thread From: Lothar Waßmann @ 2017-03-30 7:08 UTC (permalink / raw) To: linux-arm-kernel Hi, On Wed, 29 Mar 2017 18:13:46 +0200 Lucas Stach wrote: > Am Mittwoch, den 29.03.2017, 16:08 +0000 schrieb A.S. Dong: > > Hi Lucas, > > > > > -----Original Message----- > > > From: Lucas Stach [mailto:l.stach at pengutronix.de] > > > Sent: Thursday, March 23, 2017 10:44 PM > > > To: Shawn Guo > > > Cc: Fabio Estevam; A.S. Dong; devicetree at vger.kernel.org; linux-arm- > > > kernel at lists.infradead.org; kernel at pengutronix.de; patchwork- > > > lst at pengutronix.de > > > Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD > > > driver > > > > > > On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be > > > stalled during the power up sequencing of the PU power domain. As this may > > > lead to a complete loss of display output, the recommended workaround is > > > to keep the PU domain enabled during normal system operation. > > > > > > Implement this by rejecting the domain power down request on the affected > > > SoC. > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > --- > > > drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ > > > 1 file changed, 19 insertions(+) > > > > > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index > > > 4294287e5f6c..599e1e46f694 100644 > > > --- a/drivers/soc/imx/gpc.c > > > +++ b/drivers/soc/imx/gpc.c > > > @@ -45,6 +45,7 @@ struct imx_pm_domain { > > > unsigned int reg_offs; > > > signed char cntr_pdn_bit; > > > unsigned int ipg_rate_mhz; > > > + bool allow_dynamic_pd; > > > }; > > > > > > static inline struct imx_pm_domain * > > > @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct > > > generic_pm_domain *genpd) > > > int iso, iso2sw; > > > u32 val; > > > > > > + if (!pd->allow_dynamic_pd) > > > + return -EBUSY; > > > + > > > /* Read ISO and ISO2SW power down delays */ > > > regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); > > > iso = val & 0x3f; > > > @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > > }, > > > .reg_offs = 0x260, > > > .cntr_pdn_bit = 0, > > > + .allow_dynamic_pd = true, > > > }, { > > > .base = { > > > .name = "DISPLAY", > > > @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > > }, > > > .reg_offs = 0x240, > > > .cntr_pdn_bit = 4, > > > + .allow_dynamic_pd = true, > > > > Just a Nitpick, besides shawn's comment in another mail, > > if we use a domain flag like IMX_PD_ALWAYS_ON set by SoC errata flag, > > then probably we can save all the default allow_dynamic_pd lines. > > This also release the life when adding new domains. > > If other things like that show up we can certainly switch to a flags > field. In the meantime I like that the current style is more explicit > about it. > Since the purpose of the driver is all about dynamic power management, I would rather add a 'disable_dynamic_pd' for the case(s) where it's not allowed, rather than having to state the obvious over and over again. Lothar Wa?mann ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver 2017-03-30 7:08 ` Lothar Waßmann @ 2017-03-30 8:22 ` Lucas Stach -1 siblings, 0 replies; 18+ messages in thread From: Lucas Stach @ 2017-03-30 8:22 UTC (permalink / raw) To: Lothar Waßmann Cc: A.S. Dong, devicetree, patchwork-lst, kernel, Fabio Estevam, Shawn Guo, linux-arm-kernel Am Donnerstag, den 30.03.2017, 09:08 +0200 schrieb Lothar Waßmann: > Hi, > > On Wed, 29 Mar 2017 18:13:46 +0200 Lucas Stach wrote: > > Am Mittwoch, den 29.03.2017, 16:08 +0000 schrieb A.S. Dong: > > > Hi Lucas, > > > > > > > -----Original Message----- > > > > From: Lucas Stach [mailto:l.stach@pengutronix.de] > > > > Sent: Thursday, March 23, 2017 10:44 PM > > > > To: Shawn Guo > > > > Cc: Fabio Estevam; A.S. Dong; devicetree@vger.kernel.org; linux-arm- > > > > kernel@lists.infradead.org; kernel@pengutronix.de; patchwork- > > > > lst@pengutronix.de > > > > Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD > > > > driver > > > > > > > > On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be > > > > stalled during the power up sequencing of the PU power domain. As this may > > > > lead to a complete loss of display output, the recommended workaround is > > > > to keep the PU domain enabled during normal system operation. > > > > > > > > Implement this by rejecting the domain power down request on the affected > > > > SoC. > > > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > > --- > > > > drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ > > > > 1 file changed, 19 insertions(+) > > > > > > > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index > > > > 4294287e5f6c..599e1e46f694 100644 > > > > --- a/drivers/soc/imx/gpc.c > > > > +++ b/drivers/soc/imx/gpc.c > > > > @@ -45,6 +45,7 @@ struct imx_pm_domain { > > > > unsigned int reg_offs; > > > > signed char cntr_pdn_bit; > > > > unsigned int ipg_rate_mhz; > > > > + bool allow_dynamic_pd; > > > > }; > > > > > > > > static inline struct imx_pm_domain * > > > > @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct > > > > generic_pm_domain *genpd) > > > > int iso, iso2sw; > > > > u32 val; > > > > > > > > + if (!pd->allow_dynamic_pd) > > > > + return -EBUSY; > > > > + > > > > /* Read ISO and ISO2SW power down delays */ > > > > regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); > > > > iso = val & 0x3f; > > > > @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > > > }, > > > > .reg_offs = 0x260, > > > > .cntr_pdn_bit = 0, > > > > + .allow_dynamic_pd = true, > > > > }, { > > > > .base = { > > > > .name = "DISPLAY", > > > > @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > > > }, > > > > .reg_offs = 0x240, > > > > .cntr_pdn_bit = 4, > > > > + .allow_dynamic_pd = true, > > > > > > Just a Nitpick, besides shawn's comment in another mail, > > > if we use a domain flag like IMX_PD_ALWAYS_ON set by SoC errata flag, > > > then probably we can save all the default allow_dynamic_pd lines. > > > This also release the life when adding new domains. > > > > If other things like that show up we can certainly switch to a flags > > field. In the meantime I like that the current style is more explicit > > about it. > > > Since the purpose of the driver is all about dynamic power management, > I would rather add a 'disable_dynamic_pd' for the case(s) where it's > not allowed, rather than having to state the obvious over and over > again. Convincing argument. I'll change that in v2. Regards, Lucas _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver @ 2017-03-30 8:22 ` Lucas Stach 0 siblings, 0 replies; 18+ messages in thread From: Lucas Stach @ 2017-03-30 8:22 UTC (permalink / raw) To: linux-arm-kernel Am Donnerstag, den 30.03.2017, 09:08 +0200 schrieb Lothar Wa?mann: > Hi, > > On Wed, 29 Mar 2017 18:13:46 +0200 Lucas Stach wrote: > > Am Mittwoch, den 29.03.2017, 16:08 +0000 schrieb A.S. Dong: > > > Hi Lucas, > > > > > > > -----Original Message----- > > > > From: Lucas Stach [mailto:l.stach at pengutronix.de] > > > > Sent: Thursday, March 23, 2017 10:44 PM > > > > To: Shawn Guo > > > > Cc: Fabio Estevam; A.S. Dong; devicetree at vger.kernel.org; linux-arm- > > > > kernel at lists.infradead.org; kernel at pengutronix.de; patchwork- > > > > lst at pengutronix.de > > > > Subject: [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD > > > > driver > > > > > > > > On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be > > > > stalled during the power up sequencing of the PU power domain. As this may > > > > lead to a complete loss of display output, the recommended workaround is > > > > to keep the PU domain enabled during normal system operation. > > > > > > > > Implement this by rejecting the domain power down request on the affected > > > > SoC. > > > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > > --- > > > > drivers/soc/imx/gpc.c | 19 +++++++++++++++++++ > > > > 1 file changed, 19 insertions(+) > > > > > > > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index > > > > 4294287e5f6c..599e1e46f694 100644 > > > > --- a/drivers/soc/imx/gpc.c > > > > +++ b/drivers/soc/imx/gpc.c > > > > @@ -45,6 +45,7 @@ struct imx_pm_domain { > > > > unsigned int reg_offs; > > > > signed char cntr_pdn_bit; > > > > unsigned int ipg_rate_mhz; > > > > + bool allow_dynamic_pd; > > > > }; > > > > > > > > static inline struct imx_pm_domain * > > > > @@ -59,6 +60,9 @@ static int imx6_pm_domain_power_off(struct > > > > generic_pm_domain *genpd) > > > > int iso, iso2sw; > > > > u32 val; > > > > > > > > + if (!pd->allow_dynamic_pd) > > > > + return -EBUSY; > > > > + > > > > /* Read ISO and ISO2SW power down delays */ > > > > regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val); > > > > iso = val & 0x3f; > > > > @@ -255,6 +259,7 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > > > }, > > > > .reg_offs = 0x260, > > > > .cntr_pdn_bit = 0, > > > > + .allow_dynamic_pd = true, > > > > }, { > > > > .base = { > > > > .name = "DISPLAY", > > > > @@ -263,23 +268,33 @@ static struct imx_pm_domain imx_gpc_domains[] = { > > > > }, > > > > .reg_offs = 0x240, > > > > .cntr_pdn_bit = 4, > > > > + .allow_dynamic_pd = true, > > > > > > Just a Nitpick, besides shawn's comment in another mail, > > > if we use a domain flag like IMX_PD_ALWAYS_ON set by SoC errata flag, > > > then probably we can save all the default allow_dynamic_pd lines. > > > This also release the life when adding new domains. > > > > If other things like that show up we can certainly switch to a flags > > field. In the meantime I like that the current style is more explicit > > about it. > > > Since the purpose of the driver is all about dynamic power management, > I would rather add a 'disable_dynamic_pd' for the case(s) where it's > not allowed, rather than having to state the obvious over and over > again. Convincing argument. I'll change that in v2. Regards, Lucas ^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2017-03-30 8:22 UTC | newest] Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-03-23 14:44 [PATCH 0/2] i.MX6QP GPC fixes Lucas Stach 2017-03-23 14:44 ` Lucas Stach [not found] ` <20170323144418.30977-1-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2017-03-23 14:44 ` [PATCH 1/2] dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible Lucas Stach 2017-03-23 14:44 ` Lucas Stach [not found] ` <20170323144418.30977-2-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2017-03-29 15:59 ` Rob Herring 2017-03-29 15:59 ` Rob Herring 2017-03-23 14:44 ` [PATCH 2/2] soc/imx: add workaround for i.MX6QP to the GPC PD driver Lucas Stach 2017-03-23 14:44 ` Lucas Stach [not found] ` <20170323144418.30977-3-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2017-03-24 6:28 ` Shawn Guo 2017-03-24 6:28 ` Shawn Guo 2017-03-29 16:08 ` A.S. Dong 2017-03-29 16:08 ` A.S. Dong [not found] ` <DB5PR04MB1431A7CC91F55ECFE5BE31FB80350-rqLcZCCNzVwrYIBjo4yUUM9NdZoXdze2vxpqHgZTriW3zl9H0oFU5g@public.gmane.org> 2017-03-29 16:13 ` Lucas Stach 2017-03-29 16:13 ` Lucas Stach 2017-03-30 7:08 ` Lothar Waßmann 2017-03-30 7:08 ` Lothar Waßmann 2017-03-30 8:22 ` Lucas Stach 2017-03-30 8:22 ` Lucas Stach
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