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* [PATCH v2 0/4] gpio: mvebu: Add PWM fan support
@ 2017-03-18 15:43 ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-gpio
  Cc: Andrew Lunn, Imre Kaloz, Ralph Sennhauser, Thierry Reding,
	Linus Walleij, Alexandre Courbot, open list:PWM SUBSYSTEM,
	open list

Hi everyone

This patch series was originally submitted by Andrew Lunn but got stalled.
I picked up the series and addressed what was discussed for the earlier
submission with some helpful input from Andrew. Hopefully this time support
for the PWM fan as found on Linksys WRT1900AC (Mamba) will make it in.

Implementing as an MFD was discarded due to backward compatibility. The
original discussion can be read at [1].

This series depends on two cleanup series. The first [2] ("gpio: mvebu:
preparatory cleanup for pwm-fan support") got applied but has yet to appear
in linux-next. The second one [3] ("gpio: mvebu: use BIT macro instead of
bit shifting") is still pending review.

[1] https://patchwork.ozlabs.org/patch/427287/
[2] https://lkml.org/lkml/2017/3/16/62
[3] https://lkml.org/lkml/2017/3/17/493

---

Changes v1 -> v2:
  Patch 1/4 gpio: mvebu: Add limited PWM support:
    * use BIT macro (suggested by Linus Walleij)
    * move id from struct mvebu_pwm to struct mvebu_gpio_chip, implement
      blink select as if else and comment on the chip id for code clarity
      (to accommodate Linus Walleijs request for a code clarification /
      comment. If you can word it better I'm all ears.)
    * Move function comment mvebu_pwm_probe into the function itself.

---

Pending:
  * Needs ACK from Thierry Reding to be merged via linux-gpio tree by Linus
    Walleij.

---

Andrew Lunn (4):
  gpio: mvebu: Add limited PWM support
  mvebu: xp: Add pwm properties to .dtsi files
  ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
  mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan

 .../devicetree/bindings/gpio/gpio-mvebu.txt        |  31 +++
 MAINTAINERS                                        |   2 +
 arch/arm/boot/dts/armada-370.dtsi                  |  10 +-
 arch/arm/boot/dts/armada-xp-linksys-mamba.dts      |   8 +-
 arch/arm/boot/dts/armada-xp-mv78230.dtsi           |  10 +-
 arch/arm/boot/dts/armada-xp-mv78260.dtsi           |   8 +-
 arch/arm/boot/dts/armada-xp-mv78460.dtsi           |  10 +-
 arch/arm/configs/mvebu_v7_defconfig                |   2 +
 drivers/gpio/gpio-mvebu.c                          | 291 +++++++++++++++++++--
 9 files changed, 342 insertions(+), 30 deletions(-)

-- 
2.10.2

^ permalink raw reply	[flat|nested] 31+ messages in thread
* [PATCH v2 0/4] gpio: mvebu: Add PWM fan support
@ 2017-03-18 15:43 ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-gpio
  Cc: Andrew Lunn, Imre Kaloz, Ralph Sennhauser, Thierry Reding,
	Linus Walleij, Alexandre Courbot, open list:PWM SUBSYSTEM,
	open list

Hi everyone

This patch series was originally submitted by Andrew Lunn but got stalled.
I picked up the series and addressed what was discussed for the earlier
submission with some helpful input from Andrew. Hopefully this time support
for the PWM fan as found on Linksys WRT1900AC (Mamba) will make it in.

Implementing as an MFD was discarded due to backward compatibility. The
original discussion can be read at [1].

This series depends on two cleanup series. The first [2] ("gpio: mvebu:
preparatory cleanup for pwm-fan support") got applied but has yet to appear
in linux-next. The second one [3] ("gpio: mvebu: use BIT macro instead of
bit shifting") is still pending review.

[1] https://patchwork.ozlabs.org/patch/427287/
[2] https://lkml.org/lkml/2017/3/16/62
[3] https://lkml.org/lkml/2017/3/17/493

---

Changes v1 -> v2:
  Patch 1/4 gpio: mvebu: Add limited PWM support:
    * use BIT macro (suggested by Linus Walleij)
    * move id from struct mvebu_pwm to struct mvebu_gpio_chip, implement
      blink select as if else and comment on the chip id for code clarity
      (to accommodate Linus Walleijs request for a code clarification /
      comment. If you can word it better I'm all ears.)
    * Move function comment mvebu_pwm_probe into the function itself.

---

Pending:
  * Needs ACK from Thierry Reding to be merged via linux-gpio tree by Linus
    Walleij.

---

Andrew Lunn (4):
  gpio: mvebu: Add limited PWM support
  mvebu: xp: Add pwm properties to .dtsi files
  ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
  mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan

 .../devicetree/bindings/gpio/gpio-mvebu.txt        |  31 +++
 MAINTAINERS                                        |   2 +
 arch/arm/boot/dts/armada-370.dtsi                  |  10 +-
 arch/arm/boot/dts/armada-xp-linksys-mamba.dts      |   8 +-
 arch/arm/boot/dts/armada-xp-mv78230.dtsi           |  10 +-
 arch/arm/boot/dts/armada-xp-mv78260.dtsi           |   8 +-
 arch/arm/boot/dts/armada-xp-mv78460.dtsi           |  10 +-
 arch/arm/configs/mvebu_v7_defconfig                |   2 +
 drivers/gpio/gpio-mvebu.c                          | 291 +++++++++++++++++++--
 9 files changed, 342 insertions(+), 30 deletions(-)

-- 
2.10.2

^ permalink raw reply	[flat|nested] 31+ messages in thread
* [PATCH v2 1/4] gpio: mvebu: Add limited PWM support
  2017-03-18 15:43 ` Ralph Sennhauser
@ 2017-03-18 15:43   ` Ralph Sennhauser
  -1 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-gpio
  Cc: Andrew Lunn, Imre Kaloz, Ralph Sennhauser, Thierry Reding,
	Linus Walleij, Alexandre Courbot, Rob Herring, Mark Rutland,
	Greg Kroah-Hartman, David S. Miller, Geert Uytterhoeven,
	Mauro Carvalho Chehab, Guenter Roeck, open list:PWM SUBSYSTEM,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list

From: Andrew Lunn <andrew@lunn.ch>

Armada 370/XP devices can 'blink' gpio lines with a configurable on
and off period. This can be modelled as a PWM.

However, there are only two sets of PWM configuration registers for
all the gpio lines. This driver simply allows a single gpio line per
gpio chip of 32 lines to be used as a PWM. Attempts to use more return
EBUSY.

Due to the interleaving of registers it is not simple to separate the
PWM driver from the gpio driver. Thus the gpio driver has been
extended with a PWM driver.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427287/
URL: https://patchwork.ozlabs.org/patch/427295/
[Ralph Sennhauser:
  * port forward
  * merge pwm portion into gpio-mvebu.c
  * merge documentation patch
  * update MAINTAINERS]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 .../devicetree/bindings/gpio/gpio-mvebu.txt        |  31 +++
 MAINTAINERS                                        |   2 +
 drivers/gpio/gpio-mvebu.c                          | 291 +++++++++++++++++++--
 3 files changed, 307 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
index a6f3bec..86932e3 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
@@ -38,6 +38,23 @@ Required properties:
 - #gpio-cells: Should be two. The first cell is the pin number. The
   second cell is reserved for flags, unused at the moment.
 
+Optional properties:
+
+In order to use the gpio lines in PWM mode, some additional optional
+properties are required. Only Armada 370 and XP support these properties.
+
+- reg: an additional register set is needed, for the GPIO Blink
+  Counter on/off registers.
+
+- reg-names: Must contain an entry "pwm" corresponding to the
+  additional register range needed for pwm operation.
+
+- #pwm-cells: Should be two. The first cell is the pin number. The
+  second cell is reserved for flags and should be set to 0, so it has a
+  known value. It then becomes possible to use it in the future.
+
+- clocks: Must be a phandle to the clock for the gpio controller.
+
 Example:
 
 		gpio0: gpio@d0018100 {
@@ -51,3 +68,17 @@ Example:
 			#interrupt-cells = <2>;
 			interrupts = <16>, <17>, <18>, <19>;
 		};
+
+		gpio1: gpio@18140 {
+			compatible = "marvell,orion-gpio";
+			reg = <0x18140 0x40>, <0x181c8 0x08>;
+			reg-names = "gpio", "pwm";
+			ngpios = <17>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			#pwm-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <87>, <88>, <89>;
+			clocks = <&coreclk 0>;
+		};
diff --git a/MAINTAINERS b/MAINTAINERS
index 40ac605..efe3a22 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10266,6 +10266,8 @@ F:	include/linux/pwm.h
 F:	drivers/pwm/
 F:	drivers/video/backlight/pwm_bl.c
 F:	include/linux/pwm_backlight.h
+F:	drivers/gpio/gpio-mvebu.c
+F:	Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
 
 PXA2xx/PXA3xx SUPPORT
 M:	Daniel Mack <daniel@zonque.org>
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index fae4db6..ee49589 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -42,22 +42,34 @@
 #include <linux/io.h>
 #include <linux/of_irq.h>
 #include <linux/of_device.h>
+#include <linux/pwm.h>
 #include <linux/clk.h>
 #include <linux/pinctrl/consumer.h>
 #include <linux/irqchip/chained_irq.h>
+#include <linux/platform_device.h>
 #include <linux/bitops.h>
 
+#include "gpiolib.h"
+
 /*
  * GPIO unit register offsets.
  */
-#define GPIO_OUT_OFF		0x0000
-#define GPIO_IO_CONF_OFF	0x0004
-#define GPIO_BLINK_EN_OFF	0x0008
-#define GPIO_IN_POL_OFF		0x000c
-#define GPIO_DATA_IN_OFF	0x0010
-#define GPIO_EDGE_CAUSE_OFF	0x0014
-#define GPIO_EDGE_MASK_OFF	0x0018
-#define GPIO_LEVEL_MASK_OFF	0x001c
+#define GPIO_OUT_OFF			0x0000
+#define GPIO_IO_CONF_OFF		0x0004
+#define GPIO_BLINK_EN_OFF		0x0008
+#define GPIO_IN_POL_OFF			0x000c
+#define GPIO_DATA_IN_OFF		0x0010
+#define GPIO_EDGE_CAUSE_OFF		0x0014
+#define GPIO_EDGE_MASK_OFF		0x0018
+#define GPIO_LEVEL_MASK_OFF		0x001c
+#define GPIO_BLINK_CNT_SELECT_OFF	0x0020
+
+/*
+ * PWM register offsets.
+ */
+#define PWM_BLINK_ON_DURATION_OFF	0x0
+#define PWM_BLINK_OFF_DURATION_OFF	0x4
+
 
 /* The MV78200 has per-CPU registers for edge mask and level mask */
 #define GPIO_EDGE_MASK_MV78200_OFF(cpu)	  ((cpu) ? 0x30 : 0x18)
@@ -78,6 +90,21 @@
 
 #define MVEBU_MAX_GPIO_PER_BANK		32
 
+struct mvebu_pwm {
+	void __iomem		*membase;
+	unsigned long		 clk_rate;
+	bool			 used;
+	unsigned int		 pin;
+	struct pwm_chip		 chip;
+	spinlock_t		 lock;
+	struct mvebu_gpio_chip	*mvchip;
+
+	/* Used to preserve GPIO/PWM registers across suspend/resume */
+	u32			 blink_select;
+	u32			 blink_on_duration;
+	u32			 blink_off_duration;
+};
+
 struct mvebu_gpio_chip {
 	struct gpio_chip   chip;
 	spinlock_t	   lock;
@@ -87,6 +114,11 @@ struct mvebu_gpio_chip {
 	struct irq_domain *domain;
 	int		   soc_variant;
 
+	/* Used for PWM support */
+	struct clk	  *clk;
+	struct mvebu_pwm  *pwm;
+	int		   id;
+
 	/* Used to preserve GPIO registers across suspend/resume */
 	u32		   out_reg;
 	u32		   io_conf_reg;
@@ -110,6 +142,11 @@ static void __iomem *mvebu_gpioreg_blink(struct mvebu_gpio_chip *mvchip)
 	return mvchip->membase + GPIO_BLINK_EN_OFF;
 }
 
+static void __iomem *mvebu_gpioreg_blink_select(struct mvebu_gpio_chip *mvchip)
+{
+	return mvchip->membase + GPIO_BLINK_CNT_SELECT_OFF;
+}
+
 static void __iomem *mvebu_gpioreg_io_conf(struct mvebu_gpio_chip *mvchip)
 {
 	return mvchip->membase + GPIO_IO_CONF_OFF;
@@ -181,6 +218,20 @@ static void __iomem *mvebu_gpioreg_level_mask(struct mvebu_gpio_chip *mvchip)
 }
 
 /*
+ * Functions returning addresses of individual registers for a given
+ * PWM controller.
+ */
+static void __iomem *mvebu_pwmreg_blink_on_duration(struct mvebu_pwm *pwm)
+{
+	return pwm->membase + PWM_BLINK_ON_DURATION_OFF;
+}
+
+static void __iomem *mvebu_pwmreg_blink_off_duration(struct mvebu_pwm *pwm)
+{
+	return pwm->membase + PWM_BLINK_OFF_DURATION_OFF;
+}
+
+/*
  * Functions implementing the gpio_chip methods
  */
 static void mvebu_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
@@ -484,6 +535,203 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc)
 	chained_irq_exit(chip, desc);
 }
 
+/*
+ * Functions implementing the pwm_chip methods
+ */
+static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip)
+{
+	return container_of(chip, struct mvebu_pwm, chip);
+}
+
+static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwmd)
+{
+	struct mvebu_pwm *pwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = pwm->mvchip;
+	struct gpio_desc *desc = gpio_to_desc(pwmd->pwm);
+	unsigned long flags;
+	int ret = 0;
+
+	spin_lock_irqsave(&pwm->lock, flags);
+	if (pwm->used) {
+		ret = -EBUSY;
+	} else {
+		if (!desc) {
+			ret = -ENODEV;
+			goto out;
+		}
+		ret = gpiod_request(desc, "mvebu-pwm");
+		if (ret)
+			goto out;
+
+		ret = gpiod_direction_output(desc, 0);
+		if (ret) {
+			gpiod_free(desc);
+			goto out;
+		}
+
+		pwm->pin = pwmd->pwm - mvchip->chip.base;
+		pwm->used = true;
+	}
+
+out:
+	spin_unlock_irqrestore(&pwm->lock, flags);
+	return ret;
+}
+
+static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwmd)
+{
+	struct mvebu_pwm *pwm = to_mvebu_pwm(chip);
+	struct gpio_desc *desc = gpio_to_desc(pwmd->pwm);
+	unsigned long flags;
+
+	spin_lock_irqsave(&pwm->lock, flags);
+	gpiod_free(desc);
+	pwm->used = false;
+	spin_unlock_irqrestore(&pwm->lock, flags);
+}
+
+static int mvebu_pwm_config(struct pwm_chip *chip, struct pwm_device *pwmd,
+			    int duty_ns, int period_ns)
+{
+	struct mvebu_pwm *pwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = pwm->mvchip;
+	unsigned int on, off;
+	unsigned long long val;
+	u32 u;
+
+	val = (unsigned long long) pwm->clk_rate * duty_ns;
+	do_div(val, NSEC_PER_SEC);
+	if (val > UINT_MAX)
+		return -EINVAL;
+	if (val)
+		on = val;
+	else
+		on = 1;
+
+	val = (unsigned long long) pwm->clk_rate * (period_ns - duty_ns);
+	do_div(val, NSEC_PER_SEC);
+	if (val > UINT_MAX)
+		return -EINVAL;
+	if (val)
+		off = val;
+	else
+		off = 1;
+
+	u = readl_relaxed(mvebu_gpioreg_blink_select(mvchip));
+	/* mvchip->id is either 0 or 1 */
+	if (mvchip->id)
+		u |= BIT(pwm->pin);
+	else
+		u &= ~BIT(pwm->pin);
+	writel_relaxed(u, mvebu_gpioreg_blink_select(mvchip));
+
+	writel_relaxed(on, mvebu_pwmreg_blink_on_duration(pwm));
+	writel_relaxed(off, mvebu_pwmreg_blink_off_duration(pwm));
+
+	return 0;
+}
+
+static int mvebu_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwmd)
+{
+	struct mvebu_pwm *pwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = pwm->mvchip;
+
+	mvebu_gpio_blink(&mvchip->chip, pwm->pin, 1);
+
+	return 0;
+}
+
+static void mvebu_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwmd)
+{
+	struct mvebu_pwm *pwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = pwm->mvchip;
+
+	mvebu_gpio_blink(&mvchip->chip, pwm->pin, 0);
+}
+
+static const struct pwm_ops mvebu_pwm_ops = {
+	.request = mvebu_pwm_request,
+	.free = mvebu_pwm_free,
+	.config = mvebu_pwm_config,
+	.enable = mvebu_pwm_enable,
+	.disable = mvebu_pwm_disable,
+	.owner = THIS_MODULE,
+};
+
+static void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip)
+{
+	struct mvebu_pwm *pwm = mvchip->pwm;
+
+	pwm->blink_select = readl_relaxed(mvebu_gpioreg_blink_select(mvchip));
+	pwm->blink_on_duration =
+		readl_relaxed(mvebu_pwmreg_blink_on_duration(pwm));
+	pwm->blink_off_duration =
+		readl_relaxed(mvebu_pwmreg_blink_off_duration(pwm));
+}
+
+static void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip)
+{
+	struct mvebu_pwm *pwm = mvchip->pwm;
+
+	writel_relaxed(pwm->blink_select, mvebu_gpioreg_blink_select(mvchip));
+	writel_relaxed(pwm->blink_on_duration,
+		       mvebu_pwmreg_blink_on_duration(pwm));
+	writel_relaxed(pwm->blink_off_duration,
+		       mvebu_pwmreg_blink_off_duration(pwm));
+}
+
+static int mvebu_pwm_probe(struct platform_device *pdev,
+			   struct mvebu_gpio_chip *mvchip)
+{
+	struct device *dev = &pdev->dev;
+	struct mvebu_pwm *pwm;
+	struct resource *res;
+
+	/*
+	 * Armada 370/XP has simple PWM support for gpio lines. Other SoCs
+	 * don't have this hardware. So if we don't have the necessary
+	 * resource, it is not an error.
+	 */
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm");
+	if (!res)
+		return 0;
+	/*
+	 * There are only two sets of PWM configuration registers for all
+	 * the gpio lines on those SoCs. Assert one set for each of the
+	 * first two (and only) gpio chips, return an error otherwise.
+	 */
+	if (mvchip->id < 0 || mvchip->id > 1)
+		return -EINVAL;
+
+	pwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL);
+	if (!pwm)
+		return -ENOMEM;
+	mvchip->pwm = pwm;
+	pwm->mvchip = mvchip;
+
+	pwm->membase = devm_ioremap_resource(dev, res);
+	if (IS_ERR(pwm->membase))
+		return PTR_ERR(pwm->membase);
+
+	if (IS_ERR(mvchip->clk))
+		return PTR_ERR(mvchip->clk);
+
+	pwm->clk_rate = clk_get_rate(mvchip->clk);
+	if (!pwm->clk_rate) {
+		dev_err(dev, "failed to get clock rate\n");
+		return -EINVAL;
+	}
+
+	pwm->chip.dev = dev;
+	pwm->chip.ops = &mvebu_pwm_ops;
+	pwm->chip.base = mvchip->chip.base;
+	pwm->chip.npwm = mvchip->chip.ngpio;
+
+	spin_lock_init(&pwm->lock);
+
+	return pwmchip_add(&pwm->chip);
+}
+
 #ifdef CONFIG_DEBUG_FS
 #include <linux/seq_file.h>
 
@@ -600,6 +848,9 @@ static int mvebu_gpio_suspend(struct platform_device *pdev, pm_message_t state)
 		BUG();
 	}
 
+	if (IS_ENABLED(CONFIG_PWM))
+		mvebu_pwm_suspend(mvchip);
+
 	return 0;
 }
 
@@ -643,6 +894,9 @@ static int mvebu_gpio_resume(struct platform_device *pdev)
 		BUG();
 	}
 
+	if (IS_ENABLED(CONFIG_PWM))
+		mvebu_pwm_resume(mvchip);
+
 	return 0;
 }
 
@@ -654,11 +908,10 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 	struct resource *res;
 	struct irq_chip_generic *gc;
 	struct irq_chip_type *ct;
-	struct clk *clk;
 	unsigned int ngpios;
 	bool have_irqs;
 	int soc_variant;
-	int i, cpu, id;
+	int i, cpu;
 	int err;
 
 	match = of_match_device(mvebu_gpio_of_match, &pdev->dev);
@@ -682,16 +935,16 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 		return -ENODEV;
 	}
 
-	id = of_alias_get_id(pdev->dev.of_node, "gpio");
-	if (id < 0) {
+	mvchip->id = of_alias_get_id(pdev->dev.of_node, "gpio");
+	if (mvchip->id < 0) {
 		dev_err(&pdev->dev, "Couldn't get OF id\n");
-		return id;
+		return mvchip->id;
 	}
 
-	clk = devm_clk_get(&pdev->dev, NULL);
+	mvchip->clk = devm_clk_get(&pdev->dev, NULL);
 	/* Not all SoCs require a clock.*/
-	if (!IS_ERR(clk))
-		clk_prepare_enable(clk);
+	if (!IS_ERR(mvchip->clk))
+		clk_prepare_enable(mvchip->clk);
 
 	mvchip->soc_variant = soc_variant;
 	mvchip->chip.label = dev_name(&pdev->dev);
@@ -704,7 +957,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 	mvchip->chip.set = mvebu_gpio_set;
 	if (have_irqs)
 		mvchip->chip.to_irq = mvebu_gpio_to_irq;
-	mvchip->chip.base = id * MVEBU_MAX_GPIO_PER_BANK;
+	mvchip->chip.base = mvchip->id * MVEBU_MAX_GPIO_PER_BANK;
 	mvchip->chip.ngpio = ngpios;
 	mvchip->chip.can_sleep = false;
 	mvchip->chip.of_node = np;
@@ -822,6 +1075,10 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 						 mvchip);
 	}
 
+	/* Armada 370/XP has simple PWM support for gpio lines */
+	if (IS_ENABLED(CONFIG_PWM))
+		return mvebu_pwm_probe(pdev, mvchip);
+
 	return 0;
 
 err_domain:
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 1/4] gpio: mvebu: Add limited PWM support
@ 2017-03-18 15:43   ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-gpio
  Cc: Andrew Lunn, Imre Kaloz, Ralph Sennhauser, Thierry Reding,
	Linus Walleij, Alexandre Courbot, Rob Herring, Mark Rutland,
	Greg Kroah-Hartman, David S. Miller, Geert Uytterhoeven,
	Mauro Carvalho Chehab, Guenter Roeck, open list:PWM SUBSYSTEM,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list

From: Andrew Lunn <andrew@lunn.ch>

Armada 370/XP devices can 'blink' gpio lines with a configurable on
and off period. This can be modelled as a PWM.

However, there are only two sets of PWM configuration registers for
all the gpio lines. This driver simply allows a single gpio line per
gpio chip of 32 lines to be used as a PWM. Attempts to use more return
EBUSY.

Due to the interleaving of registers it is not simple to separate the
PWM driver from the gpio driver. Thus the gpio driver has been
extended with a PWM driver.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427287/
URL: https://patchwork.ozlabs.org/patch/427295/
[Ralph Sennhauser:
  * port forward
  * merge pwm portion into gpio-mvebu.c
  * merge documentation patch
  * update MAINTAINERS]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 .../devicetree/bindings/gpio/gpio-mvebu.txt        |  31 +++
 MAINTAINERS                                        |   2 +
 drivers/gpio/gpio-mvebu.c                          | 291 +++++++++++++++++++--
 3 files changed, 307 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
index a6f3bec..86932e3 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
@@ -38,6 +38,23 @@ Required properties:
 - #gpio-cells: Should be two. The first cell is the pin number. The
   second cell is reserved for flags, unused at the moment.
 
+Optional properties:
+
+In order to use the gpio lines in PWM mode, some additional optional
+properties are required. Only Armada 370 and XP support these properties.
+
+- reg: an additional register set is needed, for the GPIO Blink
+  Counter on/off registers.
+
+- reg-names: Must contain an entry "pwm" corresponding to the
+  additional register range needed for pwm operation.
+
+- #pwm-cells: Should be two. The first cell is the pin number. The
+  second cell is reserved for flags and should be set to 0, so it has a
+  known value. It then becomes possible to use it in the future.
+
+- clocks: Must be a phandle to the clock for the gpio controller.
+
 Example:
 
 		gpio0: gpio@d0018100 {
@@ -51,3 +68,17 @@ Example:
 			#interrupt-cells = <2>;
 			interrupts = <16>, <17>, <18>, <19>;
 		};
+
+		gpio1: gpio@18140 {
+			compatible = "marvell,orion-gpio";
+			reg = <0x18140 0x40>, <0x181c8 0x08>;
+			reg-names = "gpio", "pwm";
+			ngpios = <17>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			#pwm-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <87>, <88>, <89>;
+			clocks = <&coreclk 0>;
+		};
diff --git a/MAINTAINERS b/MAINTAINERS
index 40ac605..efe3a22 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10266,6 +10266,8 @@ F:	include/linux/pwm.h
 F:	drivers/pwm/
 F:	drivers/video/backlight/pwm_bl.c
 F:	include/linux/pwm_backlight.h
+F:	drivers/gpio/gpio-mvebu.c
+F:	Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
 
 PXA2xx/PXA3xx SUPPORT
 M:	Daniel Mack <daniel@zonque.org>
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index fae4db6..ee49589 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -42,22 +42,34 @@
 #include <linux/io.h>
 #include <linux/of_irq.h>
 #include <linux/of_device.h>
+#include <linux/pwm.h>
 #include <linux/clk.h>
 #include <linux/pinctrl/consumer.h>
 #include <linux/irqchip/chained_irq.h>
+#include <linux/platform_device.h>
 #include <linux/bitops.h>
 
+#include "gpiolib.h"
+
 /*
  * GPIO unit register offsets.
  */
-#define GPIO_OUT_OFF		0x0000
-#define GPIO_IO_CONF_OFF	0x0004
-#define GPIO_BLINK_EN_OFF	0x0008
-#define GPIO_IN_POL_OFF		0x000c
-#define GPIO_DATA_IN_OFF	0x0010
-#define GPIO_EDGE_CAUSE_OFF	0x0014
-#define GPIO_EDGE_MASK_OFF	0x0018
-#define GPIO_LEVEL_MASK_OFF	0x001c
+#define GPIO_OUT_OFF			0x0000
+#define GPIO_IO_CONF_OFF		0x0004
+#define GPIO_BLINK_EN_OFF		0x0008
+#define GPIO_IN_POL_OFF			0x000c
+#define GPIO_DATA_IN_OFF		0x0010
+#define GPIO_EDGE_CAUSE_OFF		0x0014
+#define GPIO_EDGE_MASK_OFF		0x0018
+#define GPIO_LEVEL_MASK_OFF		0x001c
+#define GPIO_BLINK_CNT_SELECT_OFF	0x0020
+
+/*
+ * PWM register offsets.
+ */
+#define PWM_BLINK_ON_DURATION_OFF	0x0
+#define PWM_BLINK_OFF_DURATION_OFF	0x4
+
 
 /* The MV78200 has per-CPU registers for edge mask and level mask */
 #define GPIO_EDGE_MASK_MV78200_OFF(cpu)	  ((cpu) ? 0x30 : 0x18)
@@ -78,6 +90,21 @@
 
 #define MVEBU_MAX_GPIO_PER_BANK		32
 
+struct mvebu_pwm {
+	void __iomem		*membase;
+	unsigned long		 clk_rate;
+	bool			 used;
+	unsigned int		 pin;
+	struct pwm_chip		 chip;
+	spinlock_t		 lock;
+	struct mvebu_gpio_chip	*mvchip;
+
+	/* Used to preserve GPIO/PWM registers across suspend/resume */
+	u32			 blink_select;
+	u32			 blink_on_duration;
+	u32			 blink_off_duration;
+};
+
 struct mvebu_gpio_chip {
 	struct gpio_chip   chip;
 	spinlock_t	   lock;
@@ -87,6 +114,11 @@ struct mvebu_gpio_chip {
 	struct irq_domain *domain;
 	int		   soc_variant;
 
+	/* Used for PWM support */
+	struct clk	  *clk;
+	struct mvebu_pwm  *pwm;
+	int		   id;
+
 	/* Used to preserve GPIO registers across suspend/resume */
 	u32		   out_reg;
 	u32		   io_conf_reg;
@@ -110,6 +142,11 @@ static void __iomem *mvebu_gpioreg_blink(struct mvebu_gpio_chip *mvchip)
 	return mvchip->membase + GPIO_BLINK_EN_OFF;
 }
 
+static void __iomem *mvebu_gpioreg_blink_select(struct mvebu_gpio_chip *mvchip)
+{
+	return mvchip->membase + GPIO_BLINK_CNT_SELECT_OFF;
+}
+
 static void __iomem *mvebu_gpioreg_io_conf(struct mvebu_gpio_chip *mvchip)
 {
 	return mvchip->membase + GPIO_IO_CONF_OFF;
@@ -181,6 +218,20 @@ static void __iomem *mvebu_gpioreg_level_mask(struct mvebu_gpio_chip *mvchip)
 }
 
 /*
+ * Functions returning addresses of individual registers for a given
+ * PWM controller.
+ */
+static void __iomem *mvebu_pwmreg_blink_on_duration(struct mvebu_pwm *pwm)
+{
+	return pwm->membase + PWM_BLINK_ON_DURATION_OFF;
+}
+
+static void __iomem *mvebu_pwmreg_blink_off_duration(struct mvebu_pwm *pwm)
+{
+	return pwm->membase + PWM_BLINK_OFF_DURATION_OFF;
+}
+
+/*
  * Functions implementing the gpio_chip methods
  */
 static void mvebu_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
@@ -484,6 +535,203 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc)
 	chained_irq_exit(chip, desc);
 }
 
+/*
+ * Functions implementing the pwm_chip methods
+ */
+static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip)
+{
+	return container_of(chip, struct mvebu_pwm, chip);
+}
+
+static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwmd)
+{
+	struct mvebu_pwm *pwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = pwm->mvchip;
+	struct gpio_desc *desc = gpio_to_desc(pwmd->pwm);
+	unsigned long flags;
+	int ret = 0;
+
+	spin_lock_irqsave(&pwm->lock, flags);
+	if (pwm->used) {
+		ret = -EBUSY;
+	} else {
+		if (!desc) {
+			ret = -ENODEV;
+			goto out;
+		}
+		ret = gpiod_request(desc, "mvebu-pwm");
+		if (ret)
+			goto out;
+
+		ret = gpiod_direction_output(desc, 0);
+		if (ret) {
+			gpiod_free(desc);
+			goto out;
+		}
+
+		pwm->pin = pwmd->pwm - mvchip->chip.base;
+		pwm->used = true;
+	}
+
+out:
+	spin_unlock_irqrestore(&pwm->lock, flags);
+	return ret;
+}
+
+static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwmd)
+{
+	struct mvebu_pwm *pwm = to_mvebu_pwm(chip);
+	struct gpio_desc *desc = gpio_to_desc(pwmd->pwm);
+	unsigned long flags;
+
+	spin_lock_irqsave(&pwm->lock, flags);
+	gpiod_free(desc);
+	pwm->used = false;
+	spin_unlock_irqrestore(&pwm->lock, flags);
+}
+
+static int mvebu_pwm_config(struct pwm_chip *chip, struct pwm_device *pwmd,
+			    int duty_ns, int period_ns)
+{
+	struct mvebu_pwm *pwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = pwm->mvchip;
+	unsigned int on, off;
+	unsigned long long val;
+	u32 u;
+
+	val = (unsigned long long) pwm->clk_rate * duty_ns;
+	do_div(val, NSEC_PER_SEC);
+	if (val > UINT_MAX)
+		return -EINVAL;
+	if (val)
+		on = val;
+	else
+		on = 1;
+
+	val = (unsigned long long) pwm->clk_rate * (period_ns - duty_ns);
+	do_div(val, NSEC_PER_SEC);
+	if (val > UINT_MAX)
+		return -EINVAL;
+	if (val)
+		off = val;
+	else
+		off = 1;
+
+	u = readl_relaxed(mvebu_gpioreg_blink_select(mvchip));
+	/* mvchip->id is either 0 or 1 */
+	if (mvchip->id)
+		u |= BIT(pwm->pin);
+	else
+		u &= ~BIT(pwm->pin);
+	writel_relaxed(u, mvebu_gpioreg_blink_select(mvchip));
+
+	writel_relaxed(on, mvebu_pwmreg_blink_on_duration(pwm));
+	writel_relaxed(off, mvebu_pwmreg_blink_off_duration(pwm));
+
+	return 0;
+}
+
+static int mvebu_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwmd)
+{
+	struct mvebu_pwm *pwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = pwm->mvchip;
+
+	mvebu_gpio_blink(&mvchip->chip, pwm->pin, 1);
+
+	return 0;
+}
+
+static void mvebu_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwmd)
+{
+	struct mvebu_pwm *pwm = to_mvebu_pwm(chip);
+	struct mvebu_gpio_chip *mvchip = pwm->mvchip;
+
+	mvebu_gpio_blink(&mvchip->chip, pwm->pin, 0);
+}
+
+static const struct pwm_ops mvebu_pwm_ops = {
+	.request = mvebu_pwm_request,
+	.free = mvebu_pwm_free,
+	.config = mvebu_pwm_config,
+	.enable = mvebu_pwm_enable,
+	.disable = mvebu_pwm_disable,
+	.owner = THIS_MODULE,
+};
+
+static void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip)
+{
+	struct mvebu_pwm *pwm = mvchip->pwm;
+
+	pwm->blink_select = readl_relaxed(mvebu_gpioreg_blink_select(mvchip));
+	pwm->blink_on_duration =
+		readl_relaxed(mvebu_pwmreg_blink_on_duration(pwm));
+	pwm->blink_off_duration =
+		readl_relaxed(mvebu_pwmreg_blink_off_duration(pwm));
+}
+
+static void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip)
+{
+	struct mvebu_pwm *pwm = mvchip->pwm;
+
+	writel_relaxed(pwm->blink_select, mvebu_gpioreg_blink_select(mvchip));
+	writel_relaxed(pwm->blink_on_duration,
+		       mvebu_pwmreg_blink_on_duration(pwm));
+	writel_relaxed(pwm->blink_off_duration,
+		       mvebu_pwmreg_blink_off_duration(pwm));
+}
+
+static int mvebu_pwm_probe(struct platform_device *pdev,
+			   struct mvebu_gpio_chip *mvchip)
+{
+	struct device *dev = &pdev->dev;
+	struct mvebu_pwm *pwm;
+	struct resource *res;
+
+	/*
+	 * Armada 370/XP has simple PWM support for gpio lines. Other SoCs
+	 * don't have this hardware. So if we don't have the necessary
+	 * resource, it is not an error.
+	 */
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm");
+	if (!res)
+		return 0;
+	/*
+	 * There are only two sets of PWM configuration registers for all
+	 * the gpio lines on those SoCs. Assert one set for each of the
+	 * first two (and only) gpio chips, return an error otherwise.
+	 */
+	if (mvchip->id < 0 || mvchip->id > 1)
+		return -EINVAL;
+
+	pwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL);
+	if (!pwm)
+		return -ENOMEM;
+	mvchip->pwm = pwm;
+	pwm->mvchip = mvchip;
+
+	pwm->membase = devm_ioremap_resource(dev, res);
+	if (IS_ERR(pwm->membase))
+		return PTR_ERR(pwm->membase);
+
+	if (IS_ERR(mvchip->clk))
+		return PTR_ERR(mvchip->clk);
+
+	pwm->clk_rate = clk_get_rate(mvchip->clk);
+	if (!pwm->clk_rate) {
+		dev_err(dev, "failed to get clock rate\n");
+		return -EINVAL;
+	}
+
+	pwm->chip.dev = dev;
+	pwm->chip.ops = &mvebu_pwm_ops;
+	pwm->chip.base = mvchip->chip.base;
+	pwm->chip.npwm = mvchip->chip.ngpio;
+
+	spin_lock_init(&pwm->lock);
+
+	return pwmchip_add(&pwm->chip);
+}
+
 #ifdef CONFIG_DEBUG_FS
 #include <linux/seq_file.h>
 
@@ -600,6 +848,9 @@ static int mvebu_gpio_suspend(struct platform_device *pdev, pm_message_t state)
 		BUG();
 	}
 
+	if (IS_ENABLED(CONFIG_PWM))
+		mvebu_pwm_suspend(mvchip);
+
 	return 0;
 }
 
@@ -643,6 +894,9 @@ static int mvebu_gpio_resume(struct platform_device *pdev)
 		BUG();
 	}
 
+	if (IS_ENABLED(CONFIG_PWM))
+		mvebu_pwm_resume(mvchip);
+
 	return 0;
 }
 
@@ -654,11 +908,10 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 	struct resource *res;
 	struct irq_chip_generic *gc;
 	struct irq_chip_type *ct;
-	struct clk *clk;
 	unsigned int ngpios;
 	bool have_irqs;
 	int soc_variant;
-	int i, cpu, id;
+	int i, cpu;
 	int err;
 
 	match = of_match_device(mvebu_gpio_of_match, &pdev->dev);
@@ -682,16 +935,16 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 		return -ENODEV;
 	}
 
-	id = of_alias_get_id(pdev->dev.of_node, "gpio");
-	if (id < 0) {
+	mvchip->id = of_alias_get_id(pdev->dev.of_node, "gpio");
+	if (mvchip->id < 0) {
 		dev_err(&pdev->dev, "Couldn't get OF id\n");
-		return id;
+		return mvchip->id;
 	}
 
-	clk = devm_clk_get(&pdev->dev, NULL);
+	mvchip->clk = devm_clk_get(&pdev->dev, NULL);
 	/* Not all SoCs require a clock.*/
-	if (!IS_ERR(clk))
-		clk_prepare_enable(clk);
+	if (!IS_ERR(mvchip->clk))
+		clk_prepare_enable(mvchip->clk);
 
 	mvchip->soc_variant = soc_variant;
 	mvchip->chip.label = dev_name(&pdev->dev);
@@ -704,7 +957,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 	mvchip->chip.set = mvebu_gpio_set;
 	if (have_irqs)
 		mvchip->chip.to_irq = mvebu_gpio_to_irq;
-	mvchip->chip.base = id * MVEBU_MAX_GPIO_PER_BANK;
+	mvchip->chip.base = mvchip->id * MVEBU_MAX_GPIO_PER_BANK;
 	mvchip->chip.ngpio = ngpios;
 	mvchip->chip.can_sleep = false;
 	mvchip->chip.of_node = np;
@@ -822,6 +1075,10 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
 						 mvchip);
 	}
 
+	/* Armada 370/XP has simple PWM support for gpio lines */
+	if (IS_ENABLED(CONFIG_PWM))
+		return mvebu_pwm_probe(pdev, mvchip);
+
 	return 0;
 
 err_domain:
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
  2017-03-18 15:43 ` Ralph Sennhauser
  (?)
@ 2017-03-18 15:43   ` Ralph Sennhauser
  -1 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-gpio
  Cc: Mark Rutland, Andrew Lunn, Jason Cooper, Alexandre Courbot,
	Linus Walleij, Russell King, open list:PWM SUBSYSTEM, open list,
	Gregory Clement,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Rob Herring, Thierry Reding, Ralph Sennhauser, Imre Kaloz,
	moderated list:ARM/Marvell Kirkwood and Armada 370, 375, 38x, ...,
	Sebastian Hesselbarth

From: Andrew Lunn <andrew@lunn.ch>

Add properties to the gpio nodes to allow them to be also used as pwm
lines.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427294/
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
 arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
 arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
 arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
 4 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index cc011c8..aa9fe72 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -138,24 +138,30 @@
 
 			gpio0: gpio@18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio@18180 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 07c5090..fc3934f 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -203,24 +203,30 @@
 		internal-regs {
 			gpio0: gpio@18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <17>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>;
+				clocks = <&coreclk 0>;
 			};
 		};
 	};
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 64e936a..04dda6a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -286,24 +286,28 @@
 		internal-regs {
 			gpio0: gpio@18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio@18180 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index d1383dd..fb6d28a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -324,24 +324,30 @@
 		internal-regs {
 			gpio0: gpio@18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio@18180 {
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
@ 2017-03-18 15:43   ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-gpio
  Cc: Andrew Lunn, Imre Kaloz, Ralph Sennhauser, Jason Cooper,
	Gregory Clement, Sebastian Hesselbarth, Rob Herring,
	Mark Rutland, Russell King, Thierry Reding, Linus Walleij,
	Alexandre Courbot,
	moderated list:ARM/Marvell Kirkwood and Armada 370, 375, 38x,...,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list, open list:PWM SUBSYSTEM

From: Andrew Lunn <andrew@lunn.ch>

Add properties to the gpio nodes to allow them to be also used as pwm
lines.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427294/
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
 arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
 arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
 arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
 4 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index cc011c8..aa9fe72 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -138,24 +138,30 @@
 
 			gpio0: gpio@18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio@18180 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 07c5090..fc3934f 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -203,24 +203,30 @@
 		internal-regs {
 			gpio0: gpio@18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <17>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>;
+				clocks = <&coreclk 0>;
 			};
 		};
 	};
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 64e936a..04dda6a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -286,24 +286,28 @@
 		internal-regs {
 			gpio0: gpio@18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio@18180 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index d1383dd..fb6d28a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -324,24 +324,30 @@
 		internal-regs {
 			gpio0: gpio@18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio@18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio@18180 {
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
@ 2017-03-18 15:43   ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-arm-kernel

From: Andrew Lunn <andrew@lunn.ch>

Add properties to the gpio nodes to allow them to be also used as pwm
lines.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427294/
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
 arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
 arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
 arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
 4 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index cc011c8..aa9fe72 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -138,24 +138,30 @@
 
 			gpio0: gpio at 18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio at 18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio at 18180 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 07c5090..fc3934f 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -203,24 +203,30 @@
 		internal-regs {
 			gpio0: gpio at 18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio at 18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <17>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>;
+				clocks = <&coreclk 0>;
 			};
 		};
 	};
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 64e936a..04dda6a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -286,24 +286,28 @@
 		internal-regs {
 			gpio0: gpio at 18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio at 18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio at 18180 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index d1383dd..fb6d28a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -324,24 +324,30 @@
 		internal-regs {
 			gpio0: gpio at 18100 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18100 0x40>;
+				reg = <0x18100 0x40>, <0x181c0 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <82>, <83>, <84>, <85>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio1: gpio at 18140 {
 				compatible = "marvell,orion-gpio";
-				reg = <0x18140 0x40>;
+				reg = <0x18140 0x40>, <0x181c8 0x08>;
+				reg-names = "gpio", "pwm";
 				ngpios = <32>;
 				gpio-controller;
 				#gpio-cells = <2>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <87>, <88>, <89>, <90>;
+				clocks = <&coreclk 0>;
 			};
 
 			gpio2: gpio at 18180 {
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
  2017-03-18 15:43 ` Ralph Sennhauser
  (?)
@ 2017-03-18 15:43   ` Ralph Sennhauser
  -1 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-gpio
  Cc: Andrew Lunn, Jason Cooper, Alexandre Courbot, Linus Walleij,
	Russell King, open list:PWM SUBSYSTEM, open list,
	Gregory Clement, Thierry Reding, Ralph Sennhauser, Imre Kaloz,
	moderated list:ARM/Marvell Kirkwood and Armada 370, 375, 38x, ...,
	Sebastian Hesselbarth

From: Andrew Lunn <andrew@lunn.ch>

Now that the gpio driver also supports PWM operation, enable the PWM
framework and fan driver in mvebu_v7_defconfig.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427297/
[Ralph Sennhauser: add fan driver to defconfig]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 arch/arm/configs/mvebu_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index f1a0e25..6955370 100644
--- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -135,6 +135,8 @@ CONFIG_DMADEVICES=y
 CONFIG_MV_XOR=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_MEMORY=y
+CONFIG_PWM=y
+CONFIG_SENSORS_PWM_FAN=y
 CONFIG_EXT4_FS=y
 CONFIG_ISO9660_FS=y
 CONFIG_JOLIET=y
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
@ 2017-03-18 15:43   ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-gpio
  Cc: Andrew Lunn, Imre Kaloz, Ralph Sennhauser, Jason Cooper,
	Gregory Clement, Sebastian Hesselbarth, Russell King,
	Thierry Reding, Linus Walleij, Alexandre Courbot,
	moderated list:ARM/Marvell Kirkwood and Armada 370, 375, 38x,...,
	open list, open list:PWM SUBSYSTEM

From: Andrew Lunn <andrew@lunn.ch>

Now that the gpio driver also supports PWM operation, enable the PWM
framework and fan driver in mvebu_v7_defconfig.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427297/
[Ralph Sennhauser: add fan driver to defconfig]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 arch/arm/configs/mvebu_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index f1a0e25..6955370 100644
--- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -135,6 +135,8 @@ CONFIG_DMADEVICES=y
 CONFIG_MV_XOR=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_MEMORY=y
+CONFIG_PWM=y
+CONFIG_SENSORS_PWM_FAN=y
 CONFIG_EXT4_FS=y
 CONFIG_ISO9660_FS=y
 CONFIG_JOLIET=y
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
@ 2017-03-18 15:43   ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-arm-kernel

From: Andrew Lunn <andrew@lunn.ch>

Now that the gpio driver also supports PWM operation, enable the PWM
framework and fan driver in mvebu_v7_defconfig.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427297/
[Ralph Sennhauser: add fan driver to defconfig]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 arch/arm/configs/mvebu_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index f1a0e25..6955370 100644
--- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -135,6 +135,8 @@ CONFIG_DMADEVICES=y
 CONFIG_MV_XOR=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_MEMORY=y
+CONFIG_PWM=y
+CONFIG_SENSORS_PWM_FAN=y
 CONFIG_EXT4_FS=y
 CONFIG_ISO9660_FS=y
 CONFIG_JOLIET=y
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 4/4] mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan
  2017-03-18 15:43 ` Ralph Sennhauser
  (?)
@ 2017-03-18 15:43   ` Ralph Sennhauser
  -1 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-gpio
  Cc: Mark Rutland, Andrew Lunn, Jason Cooper, Alexandre Courbot,
	Linus Walleij, Russell King, open list:PWM SUBSYSTEM, open list,
	Gregory Clement,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Rob Herring, Thierry Reding, Ralph Sennhauser, Imre Kaloz,
	moderated list:ARM/Marvell Kirkwood and Armada 370, 375, 38x, ...,
	Sebastian Hesselbarth

From: Andrew Lunn <andrew@lunn.ch>

The mvebu gpio driver can also perform PWM on some pins. Us the pwm-fan
driver to control the fan of the WRT1900AC, giving us finer grained
control over its speed and hence noise.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427291/
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
index 3744ba3..836b275e 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -293,13 +293,11 @@
 		};
 	};
 
-	gpio_fan {
+	pwm_fan {
 		/* SUNON HA4010V4-0000-C99 */
-		compatible = "gpio-fan";
-		gpios = <&gpio0 24 0>;
 
-		gpio-fan,speed-map = <0    0
-				      4500 1>;
+		compatible = "pwm-fan";
+		pwms = <&gpio0 24 4000 0>;
 	};
 
 	dsa {
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 4/4] mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan
@ 2017-03-18 15:43   ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-gpio
  Cc: Andrew Lunn, Imre Kaloz, Ralph Sennhauser, Jason Cooper,
	Gregory Clement, Sebastian Hesselbarth, Rob Herring,
	Mark Rutland, Russell King, Thierry Reding, Linus Walleij,
	Alexandre Courbot,
	moderated list:ARM/Marvell Kirkwood and Armada 370, 375, 38x,...,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list, open list:PWM SUBSYSTEM

From: Andrew Lunn <andrew@lunn.ch>

The mvebu gpio driver can also perform PWM on some pins. Us the pwm-fan
driver to control the fan of the WRT1900AC, giving us finer grained
control over its speed and hence noise.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427291/
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
index 3744ba3..836b275e 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -293,13 +293,11 @@
 		};
 	};
 
-	gpio_fan {
+	pwm_fan {
 		/* SUNON HA4010V4-0000-C99 */
-		compatible = "gpio-fan";
-		gpios = <&gpio0 24 0>;
 
-		gpio-fan,speed-map = <0    0
-				      4500 1>;
+		compatible = "pwm-fan";
+		pwms = <&gpio0 24 4000 0>;
 	};
 
 	dsa {
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* [PATCH v2 4/4] mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan
@ 2017-03-18 15:43   ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-18 15:43 UTC (permalink / raw)
  To: linux-arm-kernel

From: Andrew Lunn <andrew@lunn.ch>

The mvebu gpio driver can also perform PWM on some pins. Us the pwm-fan
driver to control the fan of the WRT1900AC, giving us finer grained
control over its speed and hence noise.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427291/
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
---
 arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
index 3744ba3..836b275e 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -293,13 +293,11 @@
 		};
 	};
 
-	gpio_fan {
+	pwm_fan {
 		/* SUNON HA4010V4-0000-C99 */
-		compatible = "gpio-fan";
-		gpios = <&gpio0 24 0>;
 
-		gpio-fan,speed-map = <0    0
-				      4500 1>;
+		compatible = "pwm-fan";
+		pwms = <&gpio0 24 4000 0>;
 	};
 
 	dsa {
-- 
2.10.2

^ permalink raw reply related	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 0/4] gpio: mvebu: Add PWM fan support
  2017-03-18 15:43 ` Ralph Sennhauser
                   ` (4 preceding siblings ...)
  (?)
@ 2017-03-23  9:23 ` Linus Walleij
  2017-03-23  9:57   ` Ralph Sennhauser
  -1 siblings, 1 reply; 31+ messages in thread
From: Linus Walleij @ 2017-03-23  9:23 UTC (permalink / raw)
  To: Ralph Sennhauser
  Cc: linux-gpio, Andrew Lunn, Imre Kaloz, Thierry Reding,
	Alexandre Courbot, open list:PWM SUBSYSTEM, open list

On Sat, Mar 18, 2017 at 4:43 PM, Ralph Sennhauser
<ralph.sennhauser@gmail.com> wrote:

> This patch series was originally submitted by Andrew Lunn but got stalled.
> I picked up the series and addressed what was discussed for the earlier
> submission with some helpful input from Andrew. Hopefully this time support
> for the PWM fan as found on Linksys WRT1900AC (Mamba) will make it in.

All looks good to me, I'm waiting for an ACK from the PWM
maintainer.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 0/4] gpio: mvebu: Add PWM fan support
  2017-03-23  9:23 ` [PATCH v2 0/4] gpio: mvebu: Add PWM fan support Linus Walleij
@ 2017-03-23  9:57   ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-23  9:57 UTC (permalink / raw)
  To: Linus Walleij
  Cc: linux-gpio, Andrew Lunn, Imre Kaloz, Thierry Reding,
	Alexandre Courbot, open list:PWM SUBSYSTEM, open list

On Thu, 23 Mar 2017 10:23:47 +0100
Linus Walleij <linus.walleij@linaro.org> wrote:

> On Sat, Mar 18, 2017 at 4:43 PM, Ralph Sennhauser
> <ralph.sennhauser@gmail.com> wrote:
> 
> > This patch series was originally submitted by Andrew Lunn but got
> > stalled. I picked up the series and addressed what was discussed
> > for the earlier submission with some helpful input from Andrew.
> > Hopefully this time support for the PWM fan as found on Linksys
> > WRT1900AC (Mamba) will make it in.  
> 
> All looks good to me, I'm waiting for an ACK from the PWM
> maintainer.
> 
> Yours,
> Linus Walleij

Hi Linus,

There are still several open issues brought up by the PWM maintainer
after posting v2 which need to be addressed first (not done in 5
minutes). There will be a v3 for sure and maybe a v4 if necessary. v3
is currently under verification.

Thanks for applying the additional cleanup patch.

Thanks
Ralph

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
  2017-03-18 15:43   ` Ralph Sennhauser
  (?)
@ 2017-03-23 16:40     ` Gregory CLEMENT
  -1 siblings, 0 replies; 31+ messages in thread
From: Gregory CLEMENT @ 2017-03-23 16:40 UTC (permalink / raw)
  To: Ralph Sennhauser
  Cc: linux-gpio, Andrew Lunn, Imre Kaloz, Jason Cooper,
	Sebastian Hesselbarth, Rob Herring, Mark Rutland, Russell King,
	Thierry Reding, Linus Walleij, Alexandre Courbot,
	moderated list:ARM/Marvell Kirkwood and Armada 370, 375, 38x,...,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list, open list:PWM SUBSYSTEM

Hi Ralph,
 
 On sam., mars 18 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com> wrote:

It seems that I don't receive the 1st patch of the series.

Also could you refresh my mind to expose why these patchse were not
apply the first time and why we should apply them now?

Thanks,

Gregory


> From: Andrew Lunn <andrew@lunn.ch>
>
> Add properties to the gpio nodes to allow them to be also used as pwm
> lines.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427294/
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> ---
>  arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
>  arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
>  arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
>  arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
>  4 files changed, 30 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
> index cc011c8..aa9fe72 100644
> --- a/arch/arm/boot/dts/armada-370.dtsi
> +++ b/arch/arm/boot/dts/armada-370.dtsi
> @@ -138,24 +138,30 @@
>  
>  			gpio0: gpio@18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio@18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>, <90>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio2: gpio@18180 {
> diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> index 07c5090..fc3934f 100644
> --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> @@ -203,24 +203,30 @@
>  		internal-regs {
>  			gpio0: gpio@18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio@18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <17>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>;
> +				clocks = <&coreclk 0>;
>  			};
>  		};
>  	};
> diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> index 64e936a..04dda6a 100644
> --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> @@ -286,24 +286,28 @@
>  		internal-regs {
>  			gpio0: gpio@18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio@18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>, <90>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio2: gpio@18180 {
> diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> index d1383dd..fb6d28a 100644
> --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> @@ -324,24 +324,30 @@
>  		internal-regs {
>  			gpio0: gpio@18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio@18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>, <90>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio2: gpio@18180 {
> -- 
> 2.10.2
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
@ 2017-03-23 16:40     ` Gregory CLEMENT
  0 siblings, 0 replies; 31+ messages in thread
From: Gregory CLEMENT @ 2017-03-23 16:40 UTC (permalink / raw)
  To: Ralph Sennhauser
  Cc: linux-gpio, Andrew Lunn, Imre Kaloz, Jason Cooper,
	Sebastian Hesselbarth, Rob Herring, Mark Rutland, Russell King,
	Thierry Reding, Linus Walleij, Alexandre Courbot,
	moderated list:ARM/Marvell Kirkwood and Armada 370, 375, 38x,...,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list, open list:PWM SUBSYSTEM

Hi Ralph,
 
 On sam., mars 18 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com> wrote:

It seems that I don't receive the 1st patch of the series.

Also could you refresh my mind to expose why these patchse were not
apply the first time and why we should apply them now?

Thanks,

Gregory


> From: Andrew Lunn <andrew@lunn.ch>
>
> Add properties to the gpio nodes to allow them to be also used as pwm
> lines.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427294/
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> ---
>  arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
>  arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
>  arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
>  arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
>  4 files changed, 30 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
> index cc011c8..aa9fe72 100644
> --- a/arch/arm/boot/dts/armada-370.dtsi
> +++ b/arch/arm/boot/dts/armada-370.dtsi
> @@ -138,24 +138,30 @@
>  
>  			gpio0: gpio@18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio@18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>, <90>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio2: gpio@18180 {
> diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> index 07c5090..fc3934f 100644
> --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> @@ -203,24 +203,30 @@
>  		internal-regs {
>  			gpio0: gpio@18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio@18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <17>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>;
> +				clocks = <&coreclk 0>;
>  			};
>  		};
>  	};
> diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> index 64e936a..04dda6a 100644
> --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> @@ -286,24 +286,28 @@
>  		internal-regs {
>  			gpio0: gpio@18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio@18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>, <90>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio2: gpio@18180 {
> diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> index d1383dd..fb6d28a 100644
> --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> @@ -324,24 +324,30 @@
>  		internal-regs {
>  			gpio0: gpio@18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio@18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>, <90>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio2: gpio@18180 {
> -- 
> 2.10.2
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 31+ messages in thread
* [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
@ 2017-03-23 16:40     ` Gregory CLEMENT
  0 siblings, 0 replies; 31+ messages in thread
From: Gregory CLEMENT @ 2017-03-23 16:40 UTC (permalink / raw)
  To: linux-arm-kernel

Hi Ralph,
 
 On sam., mars 18 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com> wrote:

It seems that I don't receive the 1st patch of the series.

Also could you refresh my mind to expose why these patchse were not
apply the first time and why we should apply them now?

Thanks,

Gregory


> From: Andrew Lunn <andrew@lunn.ch>
>
> Add properties to the gpio nodes to allow them to be also used as pwm
> lines.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427294/
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> ---
>  arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
>  arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
>  arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
>  arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
>  4 files changed, 30 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
> index cc011c8..aa9fe72 100644
> --- a/arch/arm/boot/dts/armada-370.dtsi
> +++ b/arch/arm/boot/dts/armada-370.dtsi
> @@ -138,24 +138,30 @@
>  
>  			gpio0: gpio at 18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio at 18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>, <90>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio2: gpio at 18180 {
> diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> index 07c5090..fc3934f 100644
> --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> @@ -203,24 +203,30 @@
>  		internal-regs {
>  			gpio0: gpio at 18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio at 18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <17>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>;
> +				clocks = <&coreclk 0>;
>  			};
>  		};
>  	};
> diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> index 64e936a..04dda6a 100644
> --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> @@ -286,24 +286,28 @@
>  		internal-regs {
>  			gpio0: gpio at 18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio at 18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>, <90>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio2: gpio at 18180 {
> diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> index d1383dd..fb6d28a 100644
> --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> @@ -324,24 +324,30 @@
>  		internal-regs {
>  			gpio0: gpio at 18100 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18100 0x40>;
> +				reg = <0x18100 0x40>, <0x181c0 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <82>, <83>, <84>, <85>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio1: gpio at 18140 {
>  				compatible = "marvell,orion-gpio";
> -				reg = <0x18140 0x40>;
> +				reg = <0x18140 0x40>, <0x181c8 0x08>;
> +				reg-names = "gpio", "pwm";
>  				ngpios = <32>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
> +				#pwm-cells = <2>;
>  				interrupt-controller;
>  				#interrupt-cells = <2>;
>  				interrupts = <87>, <88>, <89>, <90>;
> +				clocks = <&coreclk 0>;
>  			};
>  
>  			gpio2: gpio at 18180 {
> -- 
> 2.10.2
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
  2017-03-23 16:40     ` Gregory CLEMENT
  (?)
@ 2017-03-23 21:22       ` Andrew Lunn
  -1 siblings, 0 replies; 31+ messages in thread
From: Andrew Lunn @ 2017-03-23 21:22 UTC (permalink / raw)
  To: Gregory CLEMENT
  Cc: Ralph Sennhauser, linux-gpio, Imre Kaloz, Jason Cooper,
	Sebastian Hesselbarth, Rob Herring, Mark Rutland, Russell King,
	Thierry Reding, Linus Walleij, Alexandre Courbot,
	moderated list:ARM/Marvell Kirkwood and Armada 370, 375, 38x,...,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list, open list:PWM SUBSYSTEM

> Also could you refresh my mind to expose why these patchse were not
> apply the first time and why we should apply them now?

Hi Gregory

Because i got busy with other things, and never spent the time needed
to address the comments. Ralph has addressed all the comments from the
original posting.

	 Andrew

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
@ 2017-03-23 21:22       ` Andrew Lunn
  0 siblings, 0 replies; 31+ messages in thread
From: Andrew Lunn @ 2017-03-23 21:22 UTC (permalink / raw)
  To: Gregory CLEMENT
  Cc: Ralph Sennhauser, linux-gpio, Imre Kaloz, Jason Cooper,
	Sebastian Hesselbarth, Rob Herring, Mark Rutland, Russell King,
	Thierry Reding, Linus Walleij, Alexandre Courbot,
	moderated list:ARM/Marvell Kirkwood and Armada 370, 375, 38x,...,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list, open list:PWM SUBSYSTEM

> Also could you refresh my mind to expose why these patchse were not
> apply the first time and why we should apply them now?

Hi Gregory

Because i got busy with other things, and never spent the time needed
to address the comments. Ralph has addressed all the comments from the
original posting.

	 Andrew

^ permalink raw reply	[flat|nested] 31+ messages in thread
* [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
@ 2017-03-23 21:22       ` Andrew Lunn
  0 siblings, 0 replies; 31+ messages in thread
From: Andrew Lunn @ 2017-03-23 21:22 UTC (permalink / raw)
  To: linux-arm-kernel

> Also could you refresh my mind to expose why these patchse were not
> apply the first time and why we should apply them now?

Hi Gregory

Because i got busy with other things, and never spent the time needed
to address the comments. Ralph has addressed all the comments from the
original posting.

	 Andrew

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
  2017-03-23 16:40     ` Gregory CLEMENT
  (?)
  (?)
@ 2017-03-24  8:11       ` Ralph Sennhauser
  -1 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-24  8:11 UTC (permalink / raw)
  To: Gregory CLEMENT
  Cc: Mark Rutland, Andrew Lunn, Jason Cooper, Alexandre Courbot,
	Linus Walleij, Russell King, linux-gpio, Rob Herring,
	Thierry Reding, Imre Kaloz,
	moderated list:ARM/Marvell Kirkwood and Armada 370,
	devicetree@vger.kernel.org open list:OPEN FIRMWARE AND FLATTENED
	DEVICE TREE BINDINGS, linux-kernel@vger.kernel.org open list,
	linux-pwm@vger.kernel.org open list:PWM SUBSYSTEM,
	Sebastian Hesselbarth

On Thu, 23 Mar 2017 17:40:53 +0100
Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:

> Hi Ralph,
>  
>  On sam., mars 18 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com>
> wrote:
> 
> It seems that I don't receive the 1st patch of the series.

Hi Gregory,

it makes no sense to only send part of a series to a recipient. Will
have to improve my use of --cc-cmd it seems. Will pay attention to this
for v3.

Sorry
Ralph

> 
> Also could you refresh my mind to expose why these patchse were not
> apply the first time and why we should apply them now?
> 
> Thanks,
> 
> Gregory
> 
> 
> > From: Andrew Lunn <andrew@lunn.ch>
> >
> > Add properties to the gpio nodes to allow them to be also used as
> > pwm lines.
> >
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > URL: https://patchwork.ozlabs.org/patch/427294/
> > Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> > ---
> >  arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
> >  arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
> >  arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
> >  arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
> >  4 files changed, 30 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/armada-370.dtsi
> > b/arch/arm/boot/dts/armada-370.dtsi index cc011c8..aa9fe72 100644
> > --- a/arch/arm/boot/dts/armada-370.dtsi
> > +++ b/arch/arm/boot/dts/armada-370.dtsi
> > @@ -138,24 +138,30 @@
> >  
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio@18180 {
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 07c5090..fc3934f
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > @@ -203,24 +203,30 @@
> >  		internal-regs {
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <17>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  		};
> >  	};
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 64e936a..04dda6a
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > @@ -286,24 +286,28 @@
> >  		internal-regs {
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>; ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio@18180 {
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index d1383dd..fb6d28a
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > @@ -324,24 +324,30 @@
> >  		internal-regs {
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio@18180 {
> > -- 
> > 2.10.2
> >  
> 

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
@ 2017-03-24  8:11       ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-24  8:11 UTC (permalink / raw)
  To: Gregory CLEMENT
  Cc: linux-gpio, Andrew Lunn, Imre Kaloz, Jason Cooper,
	Sebastian Hesselbarth, Rob Herring, Mark Rutland, Russell King,
	Thierry Reding, Linus Walleij, Alexandre Courbot,
	moderated list:ARM/Marvell Kirkwood

On Thu, 23 Mar 2017 17:40:53 +0100
Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:

> Hi Ralph,
>  
>  On sam., mars 18 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com>
> wrote:
> 
> It seems that I don't receive the 1st patch of the series.

Hi Gregory,

it makes no sense to only send part of a series to a recipient. Will
have to improve my use of --cc-cmd it seems. Will pay attention to this
for v3.

Sorry
Ralph

> 
> Also could you refresh my mind to expose why these patchse were not
> apply the first time and why we should apply them now?
> 
> Thanks,
> 
> Gregory
> 
> 
> > From: Andrew Lunn <andrew@lunn.ch>
> >
> > Add properties to the gpio nodes to allow them to be also used as
> > pwm lines.
> >
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > URL: https://patchwork.ozlabs.org/patch/427294/
> > Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> > ---
> >  arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
> >  arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
> >  arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
> >  arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
> >  4 files changed, 30 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/armada-370.dtsi
> > b/arch/arm/boot/dts/armada-370.dtsi index cc011c8..aa9fe72 100644
> > --- a/arch/arm/boot/dts/armada-370.dtsi
> > +++ b/arch/arm/boot/dts/armada-370.dtsi
> > @@ -138,24 +138,30 @@
> >  
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio@18180 {
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 07c5090..fc3934f
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > @@ -203,24 +203,30 @@
> >  		internal-regs {
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <17>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  		};
> >  	};
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 64e936a..04dda6a
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > @@ -286,24 +286,28 @@
> >  		internal-regs {
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>; ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio@18180 {
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index d1383dd..fb6d28a
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > @@ -324,24 +324,30 @@
> >  		internal-regs {
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio@18180 {
> > -- 
> > 2.10.2
> >  
> 

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
@ 2017-03-24  8:11       ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-24  8:11 UTC (permalink / raw)
  To: Gregory CLEMENT
  Cc: Mark Rutland, Andrew Lunn, Jason Cooper, Alexandre Courbot,
	Linus Walleij, Russell King, linux-gpio, Rob Herring,
	Thierry Reding, Imre Kaloz,
	moderated list:ARM/Marvell Kirkwood and Armada 370,
	devicetree@vger.kernel.org open list:OPEN FIRMWARE AND FLATTENED
	DEVICE TREE BINDINGS, linux-kernel@vger.kernel.org open list,
	linux-pwm@vger.kernel.org open list:PWM SUBSYSTEM,
	Sebastian Hesselbarth

On Thu, 23 Mar 2017 17:40:53 +0100
Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:

> Hi Ralph,
>  
>  On sam., mars 18 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com>
> wrote:
> 
> It seems that I don't receive the 1st patch of the series.

Hi Gregory,

it makes no sense to only send part of a series to a recipient. Will
have to improve my use of --cc-cmd it seems. Will pay attention to this
for v3.

Sorry
Ralph

> 
> Also could you refresh my mind to expose why these patchse were not
> apply the first time and why we should apply them now?
> 
> Thanks,
> 
> Gregory
> 
> 
> > From: Andrew Lunn <andrew@lunn.ch>
> >
> > Add properties to the gpio nodes to allow them to be also used as
> > pwm lines.
> >
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > URL: https://patchwork.ozlabs.org/patch/427294/
> > Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> > ---
> >  arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
> >  arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
> >  arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
> >  arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
> >  4 files changed, 30 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/armada-370.dtsi
> > b/arch/arm/boot/dts/armada-370.dtsi index cc011c8..aa9fe72 100644
> > --- a/arch/arm/boot/dts/armada-370.dtsi
> > +++ b/arch/arm/boot/dts/armada-370.dtsi
> > @@ -138,24 +138,30 @@
> >  
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio@18180 {
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 07c5090..fc3934f
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > @@ -203,24 +203,30 @@
> >  		internal-regs {
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <17>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  		};
> >  	};
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 64e936a..04dda6a
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > @@ -286,24 +286,28 @@
> >  		internal-regs {
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>; ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio@18180 {
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index d1383dd..fb6d28a
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > @@ -324,24 +324,30 @@
> >  		internal-regs {
> >  			gpio0: gpio@18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio@18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio@18180 {
> > -- 
> > 2.10.2
> >  
> 


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^ permalink raw reply	[flat|nested] 31+ messages in thread
* [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
@ 2017-03-24  8:11       ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-24  8:11 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, 23 Mar 2017 17:40:53 +0100
Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:

> Hi Ralph,
>  
>  On sam., mars 18 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com>
> wrote:
> 
> It seems that I don't receive the 1st patch of the series.

Hi Gregory,

it makes no sense to only send part of a series to a recipient. Will
have to improve my use of --cc-cmd it seems. Will pay attention to this
for v3.

Sorry
Ralph

> 
> Also could you refresh my mind to expose why these patchse were not
> apply the first time and why we should apply them now?
> 
> Thanks,
> 
> Gregory
> 
> 
> > From: Andrew Lunn <andrew@lunn.ch>
> >
> > Add properties to the gpio nodes to allow them to be also used as
> > pwm lines.
> >
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > URL: https://patchwork.ozlabs.org/patch/427294/
> > Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> > ---
> >  arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
> >  arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
> >  arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
> >  arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
> >  4 files changed, 30 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/armada-370.dtsi
> > b/arch/arm/boot/dts/armada-370.dtsi index cc011c8..aa9fe72 100644
> > --- a/arch/arm/boot/dts/armada-370.dtsi
> > +++ b/arch/arm/boot/dts/armada-370.dtsi
> > @@ -138,24 +138,30 @@
> >  
> >  			gpio0: gpio at 18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio at 18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio at 18180 {
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 07c5090..fc3934f
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
> > @@ -203,24 +203,30 @@
> >  		internal-regs {
> >  			gpio0: gpio at 18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio at 18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <17>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  		};
> >  	};
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 64e936a..04dda6a
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
> > @@ -286,24 +286,28 @@
> >  		internal-regs {
> >  			gpio0: gpio at 18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio at 18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>; ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio at 18180 {
> > diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index d1383dd..fb6d28a
> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
> > @@ -324,24 +324,30 @@
> >  		internal-regs {
> >  			gpio0: gpio at 18100 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18100 0x40>;
> > +				reg = <0x18100 0x40>, <0x181c0
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <82>, <83>, <84>,
> > <85>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio1: gpio at 18140 {
> >  				compatible = "marvell,orion-gpio";
> > -				reg = <0x18140 0x40>;
> > +				reg = <0x18140 0x40>, <0x181c8
> > 0x08>;
> > +				reg-names = "gpio", "pwm";
> >  				ngpios = <32>;
> >  				gpio-controller;
> >  				#gpio-cells = <2>;
> > +				#pwm-cells = <2>;
> >  				interrupt-controller;
> >  				#interrupt-cells = <2>;
> >  				interrupts = <87>, <88>, <89>,
> > <90>;
> > +				clocks = <&coreclk 0>;
> >  			};
> >  
> >  			gpio2: gpio at 18180 {
> > -- 
> > 2.10.2
> >  
> 

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
  2017-03-24  8:11       ` Ralph Sennhauser
@ 2017-03-24  8:37         ` Gregory CLEMENT
  -1 siblings, 0 replies; 31+ messages in thread
From: Gregory CLEMENT @ 2017-03-24  8:37 UTC (permalink / raw)
  To: Ralph Sennhauser
  Cc: Mark Rutland, Andrew Lunn, Jason Cooper, Alexandre Courbot,
	Linus Walleij, Russell King, linux-gpio, Rob Herring,
	Thierry Reding, Imre Kaloz,
	moderated list:ARM/Marvell Kirkwood and Armada 370,
	devicetree@vger.kernel.org open list:OPEN FIRMWARE AND FLATTENED
	DEVICE TREE BINDINGS, linux-kernel@vger.kernel.org open list,
	linux-pwm@vger.kernel.org open list:PWM SUBSYSTEM,
	Sebastian Hesselbarth

Hi Ralph,
 
 On ven., mars 24 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com> wrote:

> On Thu, 23 Mar 2017 17:40:53 +0100
> Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
>
>> Hi Ralph,
>>  
>>  On sam., mars 18 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> wrote:
>> 
>> It seems that I don't receive the 1st patch of the series.
>
> Hi Gregory,
>
> it makes no sense to only send part of a series to a recipient. Will

To be frank it depends. Some maintainers don't want to receive a patch
which is not related to their subsystem. But it is not my case, I prefer
to have the full picture.

> have to improve my use of --cc-cmd it seems. Will pay attention to this
> for v3.

Also don't forget to add te cover letter too if you have written one.

Thanks!

Gregory

>
> Sorry
> Ralph
>
>> 
>> Also could you refresh my mind to expose why these patchse were not
>> apply the first time and why we should apply them now?
>> 
>> Thanks,
>> 
>> Gregory
>> 
>> 
>> > From: Andrew Lunn <andrew@lunn.ch>
>> >
>> > Add properties to the gpio nodes to allow them to be also used as
>> > pwm lines.
>> >
>> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> > URL: https://patchwork.ozlabs.org/patch/427294/
>> > Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> > ---
>> >  arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
>> >  arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
>> >  arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
>> >  arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
>> >  4 files changed, 30 insertions(+), 8 deletions(-)
>> >
>> > diff --git a/arch/arm/boot/dts/armada-370.dtsi
>> > b/arch/arm/boot/dts/armada-370.dtsi index cc011c8..aa9fe72 100644
>> > --- a/arch/arm/boot/dts/armada-370.dtsi
>> > +++ b/arch/arm/boot/dts/armada-370.dtsi
>> > @@ -138,24 +138,30 @@
>> >  
>> >  			gpio0: gpio@18100 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18100 0x40>;
>> > +				reg = <0x18100 0x40>, <0x181c0
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <82>, <83>, <84>,
>> > <85>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio1: gpio@18140 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18140 0x40>;
>> > +				reg = <0x18140 0x40>, <0x181c8
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <87>, <88>, <89>,
>> > <90>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio2: gpio@18180 {
>> > diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
>> > b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 07c5090..fc3934f
>> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
>> > +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
>> > @@ -203,24 +203,30 @@
>> >  		internal-regs {
>> >  			gpio0: gpio@18100 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18100 0x40>;
>> > +				reg = <0x18100 0x40>, <0x181c0
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <82>, <83>, <84>,
>> > <85>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio1: gpio@18140 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18140 0x40>;
>> > +				reg = <0x18140 0x40>, <0x181c8
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <17>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <87>, <88>, <89>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  		};
>> >  	};
>> > diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
>> > b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 64e936a..04dda6a
>> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
>> > +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
>> > @@ -286,24 +286,28 @@
>> >  		internal-regs {
>> >  			gpio0: gpio@18100 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18100 0x40>;
>> > +				reg = <0x18100 0x40>, <0x181c0
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <82>, <83>, <84>,
>> > <85>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio1: gpio@18140 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18140 0x40>;
>> > +				reg = <0x18140 0x40>, <0x181c8
>> > 0x08>; ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <87>, <88>, <89>,
>> > <90>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio2: gpio@18180 {
>> > diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
>> > b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index d1383dd..fb6d28a
>> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
>> > +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
>> > @@ -324,24 +324,30 @@
>> >  		internal-regs {
>> >  			gpio0: gpio@18100 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18100 0x40>;
>> > +				reg = <0x18100 0x40>, <0x181c0
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <82>, <83>, <84>,
>> > <85>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio1: gpio@18140 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18140 0x40>;
>> > +				reg = <0x18140 0x40>, <0x181c8
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <87>, <88>, <89>,
>> > <90>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio2: gpio@18180 {
>> > -- 
>> > 2.10.2
>> >  
>> 
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 31+ messages in thread
* [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
@ 2017-03-24  8:37         ` Gregory CLEMENT
  0 siblings, 0 replies; 31+ messages in thread
From: Gregory CLEMENT @ 2017-03-24  8:37 UTC (permalink / raw)
  To: linux-arm-kernel

Hi Ralph,
 
 On ven., mars 24 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com> wrote:

> On Thu, 23 Mar 2017 17:40:53 +0100
> Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
>
>> Hi Ralph,
>>  
>>  On sam., mars 18 2017, Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> wrote:
>> 
>> It seems that I don't receive the 1st patch of the series.
>
> Hi Gregory,
>
> it makes no sense to only send part of a series to a recipient. Will

To be frank it depends. Some maintainers don't want to receive a patch
which is not related to their subsystem. But it is not my case, I prefer
to have the full picture.

> have to improve my use of --cc-cmd it seems. Will pay attention to this
> for v3.

Also don't forget to add te cover letter too if you have written one.

Thanks!

Gregory

>
> Sorry
> Ralph
>
>> 
>> Also could you refresh my mind to expose why these patchse were not
>> apply the first time and why we should apply them now?
>> 
>> Thanks,
>> 
>> Gregory
>> 
>> 
>> > From: Andrew Lunn <andrew@lunn.ch>
>> >
>> > Add properties to the gpio nodes to allow them to be also used as
>> > pwm lines.
>> >
>> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>> > URL: https://patchwork.ozlabs.org/patch/427294/
>> > Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
>> > ---
>> >  arch/arm/boot/dts/armada-370.dtsi        | 10 ++++++++--
>> >  arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++--
>> >  arch/arm/boot/dts/armada-xp-mv78260.dtsi |  8 ++++++--
>> >  arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++--
>> >  4 files changed, 30 insertions(+), 8 deletions(-)
>> >
>> > diff --git a/arch/arm/boot/dts/armada-370.dtsi
>> > b/arch/arm/boot/dts/armada-370.dtsi index cc011c8..aa9fe72 100644
>> > --- a/arch/arm/boot/dts/armada-370.dtsi
>> > +++ b/arch/arm/boot/dts/armada-370.dtsi
>> > @@ -138,24 +138,30 @@
>> >  
>> >  			gpio0: gpio at 18100 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18100 0x40>;
>> > +				reg = <0x18100 0x40>, <0x181c0
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <82>, <83>, <84>,
>> > <85>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio1: gpio at 18140 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18140 0x40>;
>> > +				reg = <0x18140 0x40>, <0x181c8
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <87>, <88>, <89>,
>> > <90>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio2: gpio at 18180 {
>> > diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
>> > b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 07c5090..fc3934f
>> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
>> > +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
>> > @@ -203,24 +203,30 @@
>> >  		internal-regs {
>> >  			gpio0: gpio at 18100 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18100 0x40>;
>> > +				reg = <0x18100 0x40>, <0x181c0
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <82>, <83>, <84>,
>> > <85>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio1: gpio at 18140 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18140 0x40>;
>> > +				reg = <0x18140 0x40>, <0x181c8
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <17>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <87>, <88>, <89>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  		};
>> >  	};
>> > diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
>> > b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 64e936a..04dda6a
>> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
>> > +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
>> > @@ -286,24 +286,28 @@
>> >  		internal-regs {
>> >  			gpio0: gpio at 18100 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18100 0x40>;
>> > +				reg = <0x18100 0x40>, <0x181c0
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <82>, <83>, <84>,
>> > <85>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio1: gpio at 18140 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18140 0x40>;
>> > +				reg = <0x18140 0x40>, <0x181c8
>> > 0x08>; ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <87>, <88>, <89>,
>> > <90>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio2: gpio at 18180 {
>> > diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
>> > b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index d1383dd..fb6d28a
>> > 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
>> > +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
>> > @@ -324,24 +324,30 @@
>> >  		internal-regs {
>> >  			gpio0: gpio at 18100 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18100 0x40>;
>> > +				reg = <0x18100 0x40>, <0x181c0
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <82>, <83>, <84>,
>> > <85>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio1: gpio at 18140 {
>> >  				compatible = "marvell,orion-gpio";
>> > -				reg = <0x18140 0x40>;
>> > +				reg = <0x18140 0x40>, <0x181c8
>> > 0x08>;
>> > +				reg-names = "gpio", "pwm";
>> >  				ngpios = <32>;
>> >  				gpio-controller;
>> >  				#gpio-cells = <2>;
>> > +				#pwm-cells = <2>;
>> >  				interrupt-controller;
>> >  				#interrupt-cells = <2>;
>> >  				interrupts = <87>, <88>, <89>,
>> > <90>;
>> > +				clocks = <&coreclk 0>;
>> >  			};
>> >  
>> >  			gpio2: gpio at 18180 {
>> > -- 
>> > 2.10.2
>> >  
>> 
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 1/4] gpio: mvebu: Add limited PWM support
  2017-03-18 15:43   ` Ralph Sennhauser
@ 2017-03-24 15:18     ` Rob Herring
  -1 siblings, 0 replies; 31+ messages in thread
From: Rob Herring @ 2017-03-24 15:18 UTC (permalink / raw)
  To: Ralph Sennhauser
  Cc: linux-gpio, Andrew Lunn, Imre Kaloz, Thierry Reding,
	Linus Walleij, Alexandre Courbot, Mark Rutland,
	Greg Kroah-Hartman, David S. Miller, Geert Uytterhoeven,
	Mauro Carvalho Chehab, Guenter Roeck, open list:PWM SUBSYSTEM,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list

On Sat, Mar 18, 2017 at 04:43:01PM +0100, Ralph Sennhauser wrote:
> From: Andrew Lunn <andrew@lunn.ch>
> 
> Armada 370/XP devices can 'blink' gpio lines with a configurable on
> and off period. This can be modelled as a PWM.
> 
> However, there are only two sets of PWM configuration registers for
> all the gpio lines. This driver simply allows a single gpio line per
> gpio chip of 32 lines to be used as a PWM. Attempts to use more return
> EBUSY.
> 
> Due to the interleaving of registers it is not simple to separate the
> PWM driver from the gpio driver. Thus the gpio driver has been
> extended with a PWM driver.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427287/
> URL: https://patchwork.ozlabs.org/patch/427295/
> [Ralph Sennhauser:
>   * port forward
>   * merge pwm portion into gpio-mvebu.c
>   * merge documentation patch
>   * update MAINTAINERS]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> ---
>  .../devicetree/bindings/gpio/gpio-mvebu.txt        |  31 +++
>  MAINTAINERS                                        |   2 +
>  drivers/gpio/gpio-mvebu.c                          | 291 +++++++++++++++++++--
>  3 files changed, 307 insertions(+), 17 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
> index a6f3bec..86932e3 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
> +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
> @@ -38,6 +38,23 @@ Required properties:
>  - #gpio-cells: Should be two. The first cell is the pin number. The
>    second cell is reserved for flags, unused at the moment.
>  
> +Optional properties:
> +
> +In order to use the gpio lines in PWM mode, some additional optional
> +properties are required. Only Armada 370 and XP support these properties.
> +
> +- reg: an additional register set is needed, for the GPIO Blink
> +  Counter on/off registers.
> +
> +- reg-names: Must contain an entry "pwm" corresponding to the
> +  additional register range needed for pwm operation.
> +
> +- #pwm-cells: Should be two. The first cell is the pin number. The

s/pin number/gpio line/ ?

> +  second cell is reserved for flags and should be set to 0, so it has a
> +  known value. It then becomes possible to use it in the future.
> +
> +- clocks: Must be a phandle to the clock for the gpio controller.
> +
>  Example:
>  
>  		gpio0: gpio@d0018100 {
> @@ -51,3 +68,17 @@ Example:
>  			#interrupt-cells = <2>;
>  			interrupts = <16>, <17>, <18>, <19>;
>  		};
> +
> +		gpio1: gpio@18140 {
> +			compatible = "marvell,orion-gpio";

If only 370 and XP support this, I'd expect a compatible string for one 
of them here.

> +			reg = <0x18140 0x40>, <0x181c8 0x08>;
> +			reg-names = "gpio", "pwm";
> +			ngpios = <17>;
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			#pwm-cells = <2>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			interrupts = <87>, <88>, <89>;
> +			clocks = <&coreclk 0>;
> +		};

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 1/4] gpio: mvebu: Add limited PWM support
@ 2017-03-24 15:18     ` Rob Herring
  0 siblings, 0 replies; 31+ messages in thread
From: Rob Herring @ 2017-03-24 15:18 UTC (permalink / raw)
  To: Ralph Sennhauser
  Cc: linux-gpio, Andrew Lunn, Imre Kaloz, Thierry Reding,
	Linus Walleij, Alexandre Courbot, Mark Rutland,
	Greg Kroah-Hartman, David S. Miller, Geert Uytterhoeven,
	Mauro Carvalho Chehab, Guenter Roeck, open list:PWM SUBSYSTEM,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list

On Sat, Mar 18, 2017 at 04:43:01PM +0100, Ralph Sennhauser wrote:
> From: Andrew Lunn <andrew@lunn.ch>
> 
> Armada 370/XP devices can 'blink' gpio lines with a configurable on
> and off period. This can be modelled as a PWM.
> 
> However, there are only two sets of PWM configuration registers for
> all the gpio lines. This driver simply allows a single gpio line per
> gpio chip of 32 lines to be used as a PWM. Attempts to use more return
> EBUSY.
> 
> Due to the interleaving of registers it is not simple to separate the
> PWM driver from the gpio driver. Thus the gpio driver has been
> extended with a PWM driver.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> URL: https://patchwork.ozlabs.org/patch/427287/
> URL: https://patchwork.ozlabs.org/patch/427295/
> [Ralph Sennhauser:
>   * port forward
>   * merge pwm portion into gpio-mvebu.c
>   * merge documentation patch
>   * update MAINTAINERS]
> Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> ---
>  .../devicetree/bindings/gpio/gpio-mvebu.txt        |  31 +++
>  MAINTAINERS                                        |   2 +
>  drivers/gpio/gpio-mvebu.c                          | 291 +++++++++++++++++++--
>  3 files changed, 307 insertions(+), 17 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
> index a6f3bec..86932e3 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
> +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
> @@ -38,6 +38,23 @@ Required properties:
>  - #gpio-cells: Should be two. The first cell is the pin number. The
>    second cell is reserved for flags, unused at the moment.
>  
> +Optional properties:
> +
> +In order to use the gpio lines in PWM mode, some additional optional
> +properties are required. Only Armada 370 and XP support these properties.
> +
> +- reg: an additional register set is needed, for the GPIO Blink
> +  Counter on/off registers.
> +
> +- reg-names: Must contain an entry "pwm" corresponding to the
> +  additional register range needed for pwm operation.
> +
> +- #pwm-cells: Should be two. The first cell is the pin number. The

s/pin number/gpio line/ ?

> +  second cell is reserved for flags and should be set to 0, so it has a
> +  known value. It then becomes possible to use it in the future.
> +
> +- clocks: Must be a phandle to the clock for the gpio controller.
> +
>  Example:
>  
>  		gpio0: gpio@d0018100 {
> @@ -51,3 +68,17 @@ Example:
>  			#interrupt-cells = <2>;
>  			interrupts = <16>, <17>, <18>, <19>;
>  		};
> +
> +		gpio1: gpio@18140 {
> +			compatible = "marvell,orion-gpio";

If only 370 and XP support this, I'd expect a compatible string for one 
of them here.

> +			reg = <0x18140 0x40>, <0x181c8 0x08>;
> +			reg-names = "gpio", "pwm";
> +			ngpios = <17>;
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			#pwm-cells = <2>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			interrupts = <87>, <88>, <89>;
> +			clocks = <&coreclk 0>;
> +		};

^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 1/4] gpio: mvebu: Add limited PWM support
  2017-03-24 15:18     ` Rob Herring
@ 2017-03-24 22:21       ` Ralph Sennhauser
  -1 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-24 22:21 UTC (permalink / raw)
  To: Rob Herring, Thomas Petazzoni
  Cc: linux-gpio-u79uwXL29TY76Z2rM5mHXA, Andrew Lunn, Imre Kaloz,
	Thierry Reding, Linus Walleij, Alexandre Courbot, Mark Rutland,
	Greg Kroah-Hartman, David S. Miller, Geert Uytterhoeven,
	Mauro Carvalho Chehab, Guenter Roeck, open list:PWM SUBSYSTEM,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list, Gregory CLEMENT

On Fri, 24 Mar 2017 10:18:29 -0500
Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:

> On Sat, Mar 18, 2017 at 04:43:01PM +0100, Ralph Sennhauser wrote:
> > From: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
> > 
> > Armada 370/XP devices can 'blink' gpio lines with a configurable on
> > and off period. This can be modelled as a PWM.
> > 
> > However, there are only two sets of PWM configuration registers for
> > all the gpio lines. This driver simply allows a single gpio line per
> > gpio chip of 32 lines to be used as a PWM. Attempts to use more
> > return EBUSY.
> > 
> > Due to the interleaving of registers it is not simple to separate
> > the PWM driver from the gpio driver. Thus the gpio driver has been
> > extended with a PWM driver.
> > 
> > Signed-off-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
> > URL: https://patchwork.ozlabs.org/patch/427287/
> > URL: https://patchwork.ozlabs.org/patch/427295/
> > [Ralph Sennhauser:
> >   * port forward
> >   * merge pwm portion into gpio-mvebu.c
> >   * merge documentation patch
> >   * update MAINTAINERS]
> > Signed-off-by: Ralph Sennhauser <ralph.sennhauser-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > ---
> >  .../devicetree/bindings/gpio/gpio-mvebu.txt        |  31 +++
> >  MAINTAINERS                                        |   2 +
> >  drivers/gpio/gpio-mvebu.c                          | 291
> > +++++++++++++++++++-- 3 files changed, 307 insertions(+), 17
> > deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
> > b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt index
> > a6f3bec..86932e3 100644 ---
> > a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +++
> > b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt @@ -38,6
> > +38,23 @@ Required properties:
> >  - #gpio-cells: Should be two. The first cell is the pin number. The
> >    second cell is reserved for flags, unused at the moment.
> >  
> > +Optional properties:
> > +
> > +In order to use the gpio lines in PWM mode, some additional
> > optional +properties are required. Only Armada 370 and XP support
> > these properties. +
> > +- reg: an additional register set is needed, for the GPIO Blink
> > +  Counter on/off registers.
> > +
> > +- reg-names: Must contain an entry "pwm" corresponding to the
> > +  additional register range needed for pwm operation.
> > +
> > +- #pwm-cells: Should be two. The first cell is the pin number.
> > The  
> 
> s/pin number/gpio line/ ?

Better indeed.

> 
> > +  second cell is reserved for flags and should be set to 0, so it
> > has a
> > +  known value. It then becomes possible to use it in the future.
> > +
> > +- clocks: Must be a phandle to the clock for the gpio controller.
> > +
> >  Example:
> >  
> >  		gpio0: gpio@d0018100 {
> > @@ -51,3 +68,17 @@ Example:
> >  			#interrupt-cells = <2>;
> >  			interrupts = <16>, <17>, <18>, <19>;
> >  		};
> > +
> > +		gpio1: gpio@18140 {
> > +			compatible = "marvell,orion-gpio";  
> 
> If only 370 and XP support this, I'd expect a compatible string for
> one of them here.

Commit 5f79c651e81e ("arm: mvebu: use global interrupts for GPIOs on
Armada XP") changes it from "marvell,armadaxp-gpio". The commit message
says for 3.8 basically leaving it open for a "fix" later.

Adding Thomas Petazzoni as the author.

Thomas, would you happen to know if this is still how it's supposed to
be for now?

Thanks
Ralph


> 
> > +			reg = <0x18140 0x40>, <0x181c8 0x08>;
> > +			reg-names = "gpio", "pwm";
> > +			ngpios = <17>;
> > +			gpio-controller;
> > +			#gpio-cells = <2>;
> > +			#pwm-cells = <2>;
> > +			interrupt-controller;
> > +			#interrupt-cells = <2>;
> > +			interrupts = <87>, <88>, <89>;
> > +			clocks = <&coreclk 0>;
> > +		};  

--
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^ permalink raw reply	[flat|nested] 31+ messages in thread
* Re: [PATCH v2 1/4] gpio: mvebu: Add limited PWM support
@ 2017-03-24 22:21       ` Ralph Sennhauser
  0 siblings, 0 replies; 31+ messages in thread
From: Ralph Sennhauser @ 2017-03-24 22:21 UTC (permalink / raw)
  To: Rob Herring, Thomas Petazzoni
  Cc: linux-gpio, Andrew Lunn, Imre Kaloz, Thierry Reding,
	Linus Walleij, Alexandre Courbot, Mark Rutland,
	Greg Kroah-Hartman, David S. Miller, Geert Uytterhoeven,
	Mauro Carvalho Chehab, Guenter Roeck, open list:PWM SUBSYSTEM,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list, Gregory CLEMENT

On Fri, 24 Mar 2017 10:18:29 -0500
Rob Herring <robh@kernel.org> wrote:

> On Sat, Mar 18, 2017 at 04:43:01PM +0100, Ralph Sennhauser wrote:
> > From: Andrew Lunn <andrew@lunn.ch>
> > 
> > Armada 370/XP devices can 'blink' gpio lines with a configurable on
> > and off period. This can be modelled as a PWM.
> > 
> > However, there are only two sets of PWM configuration registers for
> > all the gpio lines. This driver simply allows a single gpio line per
> > gpio chip of 32 lines to be used as a PWM. Attempts to use more
> > return EBUSY.
> > 
> > Due to the interleaving of registers it is not simple to separate
> > the PWM driver from the gpio driver. Thus the gpio driver has been
> > extended with a PWM driver.
> > 
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > URL: https://patchwork.ozlabs.org/patch/427287/
> > URL: https://patchwork.ozlabs.org/patch/427295/
> > [Ralph Sennhauser:
> >   * port forward
> >   * merge pwm portion into gpio-mvebu.c
> >   * merge documentation patch
> >   * update MAINTAINERS]
> > Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
> > ---
> >  .../devicetree/bindings/gpio/gpio-mvebu.txt        |  31 +++
> >  MAINTAINERS                                        |   2 +
> >  drivers/gpio/gpio-mvebu.c                          | 291
> > +++++++++++++++++++-- 3 files changed, 307 insertions(+), 17
> > deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
> > b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt index
> > a6f3bec..86932e3 100644 ---
> > a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +++
> > b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt @@ -38,6
> > +38,23 @@ Required properties:
> >  - #gpio-cells: Should be two. The first cell is the pin number. The
> >    second cell is reserved for flags, unused at the moment.
> >  
> > +Optional properties:
> > +
> > +In order to use the gpio lines in PWM mode, some additional
> > optional +properties are required. Only Armada 370 and XP support
> > these properties. +
> > +- reg: an additional register set is needed, for the GPIO Blink
> > +  Counter on/off registers.
> > +
> > +- reg-names: Must contain an entry "pwm" corresponding to the
> > +  additional register range needed for pwm operation.
> > +
> > +- #pwm-cells: Should be two. The first cell is the pin number.
> > The  
> 
> s/pin number/gpio line/ ?

Better indeed.

> 
> > +  second cell is reserved for flags and should be set to 0, so it
> > has a
> > +  known value. It then becomes possible to use it in the future.
> > +
> > +- clocks: Must be a phandle to the clock for the gpio controller.
> > +
> >  Example:
> >  
> >  		gpio0: gpio@d0018100 {
> > @@ -51,3 +68,17 @@ Example:
> >  			#interrupt-cells = <2>;
> >  			interrupts = <16>, <17>, <18>, <19>;
> >  		};
> > +
> > +		gpio1: gpio@18140 {
> > +			compatible = "marvell,orion-gpio";  
> 
> If only 370 and XP support this, I'd expect a compatible string for
> one of them here.

Commit 5f79c651e81e ("arm: mvebu: use global interrupts for GPIOs on
Armada XP") changes it from "marvell,armadaxp-gpio". The commit message
says for 3.8 basically leaving it open for a "fix" later.

Adding Thomas Petazzoni as the author.

Thomas, would you happen to know if this is still how it's supposed to
be for now?

Thanks
Ralph


> 
> > +			reg = <0x18140 0x40>, <0x181c8 0x08>;
> > +			reg-names = "gpio", "pwm";
> > +			ngpios = <17>;
> > +			gpio-controller;
> > +			#gpio-cells = <2>;
> > +			#pwm-cells = <2>;
> > +			interrupt-controller;
> > +			#interrupt-cells = <2>;
> > +			interrupts = <87>, <88>, <89>;
> > +			clocks = <&coreclk 0>;
> > +		};  

^ permalink raw reply	[flat|nested] 31+ messages in thread
end of thread, other threads:[~2017-03-24 22:21 UTC | newest]

Thread overview: 31+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-03-18 15:43 [PATCH v2 0/4] gpio: mvebu: Add PWM fan support Ralph Sennhauser
2017-03-18 15:43 ` Ralph Sennhauser
2017-03-18 15:43 ` [PATCH v2 1/4] gpio: mvebu: Add limited PWM support Ralph Sennhauser
2017-03-18 15:43   ` Ralph Sennhauser
2017-03-24 15:18   ` Rob Herring
2017-03-24 15:18     ` Rob Herring
2017-03-24 22:21     ` Ralph Sennhauser
2017-03-24 22:21       ` Ralph Sennhauser
2017-03-18 15:43 ` [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files Ralph Sennhauser
2017-03-18 15:43   ` Ralph Sennhauser
2017-03-18 15:43   ` Ralph Sennhauser
2017-03-23 16:40   ` Gregory CLEMENT
2017-03-23 16:40     ` Gregory CLEMENT
2017-03-23 16:40     ` Gregory CLEMENT
2017-03-23 21:22     ` Andrew Lunn
2017-03-23 21:22       ` Andrew Lunn
2017-03-23 21:22       ` Andrew Lunn
2017-03-24  8:11     ` Ralph Sennhauser
2017-03-24  8:11       ` Ralph Sennhauser
2017-03-24  8:11       ` Ralph Sennhauser
2017-03-24  8:11       ` Ralph Sennhauser
2017-03-24  8:37       ` Gregory CLEMENT
2017-03-24  8:37         ` Gregory CLEMENT
2017-03-18 15:43 ` [PATCH v2 3/4] ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig Ralph Sennhauser
2017-03-18 15:43   ` Ralph Sennhauser
2017-03-18 15:43   ` Ralph Sennhauser
2017-03-18 15:43 ` [PATCH v2 4/4] mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan Ralph Sennhauser
2017-03-18 15:43   ` Ralph Sennhauser
2017-03-18 15:43   ` Ralph Sennhauser
2017-03-23  9:23 ` [PATCH v2 0/4] gpio: mvebu: Add PWM fan support Linus Walleij
2017-03-23  9:57   ` Ralph Sennhauser

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