From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: Chen-Yu Tsai <wens@csie.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH 2/2] arm64: allwinner: a64: add pmu0 regs for USB PHY
Date: Thu, 6 Apr 2017 09:13:23 +0200 [thread overview]
Message-ID: <20170406071323.isaowk3qh3rdu7lh@lukather> (raw)
In-Reply-To: <20170405143034.8868-3-icenowy@aosc.io>
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On Wed, Apr 05, 2017 at 10:30:34PM +0800, Icenowy Zheng wrote:
> The USB PHY in A64 has a "pmu0" region, which controls the EHCI/OHCI
> controller pair that can be connected to the PHY0.
>
> Add the MMIO region for PHY node.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Applied, thanks
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>,
Greg Kroah-Hartman
<gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH 2/2] arm64: allwinner: a64: add pmu0 regs for USB PHY
Date: Thu, 6 Apr 2017 09:13:23 +0200 [thread overview]
Message-ID: <20170406071323.isaowk3qh3rdu7lh@lukather> (raw)
In-Reply-To: <20170405143034.8868-3-icenowy-h8G6r0blFSE@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 421 bytes --]
On Wed, Apr 05, 2017 at 10:30:34PM +0800, Icenowy Zheng wrote:
> The USB PHY in A64 has a "pmu0" region, which controls the EHCI/OHCI
> controller pair that can be connected to the PHY0.
>
> Add the MMIO region for PHY node.
>
> Signed-off-by: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
Applied, thanks
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] arm64: allwinner: a64: add pmu0 regs for USB PHY
Date: Thu, 6 Apr 2017 09:13:23 +0200 [thread overview]
Message-ID: <20170406071323.isaowk3qh3rdu7lh@lukather> (raw)
In-Reply-To: <20170405143034.8868-3-icenowy@aosc.io>
On Wed, Apr 05, 2017 at 10:30:34PM +0800, Icenowy Zheng wrote:
> The USB PHY in A64 has a "pmu0" region, which controls the EHCI/OHCI
> controller pair that can be connected to the PHY0.
>
> Add the MMIO region for PHY node.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Applied, thanks
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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next prev parent reply other threads:[~2017-04-06 7:13 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-05 14:30 [PATCH 0/2] pmu0 MMIO region for A64 USB PHY Icenowy Zheng
2017-04-05 14:30 ` Icenowy Zheng
2017-04-05 14:30 ` Icenowy Zheng
2017-04-05 14:30 ` [PATCH 1/2] dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64 Icenowy Zheng
2017-04-05 14:30 ` Icenowy Zheng
2017-04-05 14:30 ` Icenowy Zheng
2017-04-05 14:30 ` [PATCH 2/2] arm64: allwinner: a64: add pmu0 regs for USB PHY Icenowy Zheng
2017-04-05 14:30 ` Icenowy Zheng
2017-04-05 14:30 ` Icenowy Zheng
2017-04-06 7:13 ` Maxime Ripard [this message]
2017-04-06 7:13 ` Maxime Ripard
2017-04-06 7:13 ` Maxime Ripard
2017-04-06 10:26 ` [PATCH 0/2] pmu0 MMIO region for A64 " Kishon Vijay Abraham I
2017-04-06 10:26 ` Kishon Vijay Abraham I
2017-04-06 10:26 ` Kishon Vijay Abraham I
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