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From: Andre Przywara <andre.przywara@arm.com>
To: Stefano Stabellini <sstabellini@kernel.org>,
	Julien Grall <julien.grall@arm.com>
Cc: xen-devel@lists.xenproject.org,
	Vijay Kilari <vijay.kilari@gmail.com>,
	Shanker Donthineni <shankerd@codeaurora.org>
Subject: [PATCH v6 30/36] ARM: vITS: handle MAPTI command
Date: Fri,  7 Apr 2017 18:33:01 +0100	[thread overview]
Message-ID: <20170407173307.9788-31-andre.przywara@arm.com> (raw)
In-Reply-To: <20170407173307.9788-1-andre.przywara@arm.com>

The MAPTI commands associates a DeviceID/EventID pair with a LPI/CPU
pair and actually instantiates LPI interrupts.
We connect the already allocated host LPI to this virtual LPI, so that
any triggering LPI on the host can be quickly forwarded to a guest.
Beside entering the VCPU and the virtual LPI number in the respective
host LPI entry, we also initialize and add the already allocated
struct pending_irq to our radix tree, so that we can now easily find it
by its virtual LPI number.
We also read the property table to update the enabled bit and the
priority for our new LPI, as we might have missed this during an earlier
INVALL call (which only checks mapped LPIs).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 xen/arch/arm/gic-v3-its.c        | 74 ++++++++++++++++++++++++++++++
 xen/arch/arm/gic-v3-lpi.c        | 18 ++++++++
 xen/arch/arm/vgic-v3-its.c       | 99 ++++++++++++++++++++++++++++++++++++++++
 xen/include/asm-arm/gic_v3_its.h |  6 +++
 4 files changed, 197 insertions(+)

diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c
index 1dad428..b55e7f1 100644
--- a/xen/arch/arm/gic-v3-its.c
+++ b/xen/arch/arm/gic-v3-its.c
@@ -799,6 +799,80 @@ out:
     return ret;
 }
 
+/* Must be called with the its_device_lock held. */
+static struct its_device *get_its_device(struct domain *d, paddr_t vdoorbell,
+                                          uint32_t vdevid)
+{
+    struct rb_node *node = d->arch.vgic.its_devices.rb_node;
+    struct its_device *dev;
+
+    ASSERT(spin_is_locked(&d->arch.vgic.its_devices_lock));
+
+    while (node)
+    {
+        int cmp;
+
+        dev = rb_entry(node, struct its_device, rbnode);
+        cmp = compare_its_guest_devices(dev, vdoorbell, vdevid);
+
+        if ( !cmp )
+            return dev;
+
+        if ( cmp > 0 )
+            node = node->rb_left;
+        else
+            node = node->rb_right;
+    }
+
+    return NULL;
+}
+
+static uint32_t get_host_lpi(struct its_device *dev, uint32_t eventid)
+{
+    uint32_t host_lpi = 0;
+
+    if ( dev && (eventid < dev->eventids) )
+        host_lpi = dev->host_lpi_blocks[eventid / LPI_BLOCK] +
+                                       (eventid % LPI_BLOCK);
+
+    return host_lpi;
+}
+
+/*
+ * Connects the event ID for an already assigned device to the given VCPU/vLPI
+ * pair. The corresponding physical LPI is already mapped on the host side
+ * (when assigning the physical device to the guest), so we just connect the
+ * target VCPU/vLPI pair to that interrupt to inject it properly if it fires.
+ * Returns a pointer to the already allocated struct pending_irq that is
+ * meant to be used by that event.
+ */
+struct pending_irq *gicv3_assign_guest_event(struct domain *d,
+                                             paddr_t vdoorbell_address,
+                                             uint32_t vdevid, uint32_t veventid,
+                                             struct vcpu *v, uint32_t virt_lpi)
+{
+    struct its_device *dev;
+    struct pending_irq *pirq = NULL;
+    uint32_t host_lpi = 0;
+
+    spin_lock(&d->arch.vgic.its_devices_lock);
+    dev = get_its_device(d, vdoorbell_address, vdevid);
+    if ( dev )
+    {
+        host_lpi = get_host_lpi(dev, veventid);
+        pirq = &dev->pend_irqs[veventid];
+    }
+    spin_unlock(&d->arch.vgic.its_devices_lock);
+
+    if ( !host_lpi || !pirq )
+        return NULL;
+
+    gicv3_lpi_update_host_entry(host_lpi, d->domain_id,
+                                v ? v->vcpu_id : INVALID_VCPU_ID, virt_lpi);
+
+    return pirq;
+}
+
 /* Scan the DT for any ITS nodes and create a list of host ITSes out of it. */
 void gicv3_its_dt_init(const struct dt_device_node *node)
 {
diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c
index a670f73..86bda68 100644
--- a/xen/arch/arm/gic-v3-lpi.c
+++ b/xen/arch/arm/gic-v3-lpi.c
@@ -225,6 +225,24 @@ void gicv3_do_LPI(unsigned int lpi)
     rcu_unlock_domain(d);
 }
 
+void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id,
+                                 unsigned int vcpu_id, uint32_t virt_lpi)
+{
+    union host_lpi *hlpip, hlpi;
+
+    ASSERT(host_lpi >= LPI_OFFSET);
+
+    host_lpi -= LPI_OFFSET;
+
+    hlpip = &lpi_data.host_lpis[host_lpi / HOST_LPIS_PER_PAGE][host_lpi % HOST_LPIS_PER_PAGE];
+
+    hlpi.virt_lpi = virt_lpi;
+    hlpi.dom_id = domain_id;
+    hlpi.vcpu_id = vcpu_id;
+
+    write_u64_atomic(&hlpip->data, hlpi.data);
+}
+
 static int gicv3_lpi_allocate_pendtable(uint64_t *reg)
 {
     uint64_t val;
diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
index 37c932b..e66557f 100644
--- a/xen/arch/arm/vgic-v3-its.c
+++ b/xen/arch/arm/vgic-v3-its.c
@@ -381,6 +381,33 @@ static int its_handle_int(struct virt_its *its, uint64_t *cmdptr)
     return 0;
 }
 
+/*
+ * For a given virtual LPI read the enabled bit and priority from the virtual
+ * property table and update the virtual IRQ's state in the given pending_irq.
+ */
+static int update_lpi_property(struct domain *d, uint32_t vlpi,
+                               struct pending_irq *p)
+{
+    paddr_t addr;
+    uint8_t property;
+    int ret;
+
+    addr = d->arch.vgic.rdist_propbase & GENMASK(51, 12);
+
+    ret = vgic_access_guest_memory(d, addr + vlpi - LPI_OFFSET,
+                                   &property, sizeof(property), false);
+    if ( ret )
+        return ret;
+
+    p->lpi_priority = property & LPI_PROP_PRIO_MASK;
+    if ( property & LPI_PROP_ENABLED )
+        set_bit(GIC_IRQ_GUEST_ENABLED, &p->status);
+    else
+        clear_bit(GIC_IRQ_GUEST_ENABLED, &p->status);
+
+    return 0;
+}
+
 static int its_handle_mapc(struct virt_its *its, uint64_t *cmdptr)
 {
     uint32_t collid = its_cmd_get_collection(cmdptr);
@@ -445,6 +472,74 @@ static int its_handle_mapd(struct virt_its *its, uint64_t *cmdptr)
     return ret;
 }
 
+static int its_handle_mapti(struct virt_its *its, uint64_t *cmdptr)
+{
+    uint32_t devid = its_cmd_get_deviceid(cmdptr);
+    uint32_t eventid = its_cmd_get_id(cmdptr);
+    uint32_t intid = its_cmd_get_physical_id(cmdptr), _intid;
+    uint16_t collid = its_cmd_get_collection(cmdptr);
+    struct pending_irq *pirq;
+    struct vcpu *vcpu = NULL;
+    int ret = 0;
+
+    if ( its_cmd_get_command(cmdptr) == GITS_CMD_MAPI )
+        intid = eventid;
+
+    spin_lock(&its->its_lock);
+    /*
+     * Check whether there is a valid existing mapping. If yes, behavior is
+     * unpredictable, we choose to ignore this command here.
+     * This makes sure we start with a pristine pending_irq below.
+     */
+    if ( read_itte_locked(its, devid, eventid, &vcpu, &_intid) &&
+         _intid != INVALID_LPI )
+    {
+        spin_unlock(&its->its_lock);
+        return -1;
+    }
+
+    /* Enter the mapping in our virtual ITS tables. */
+    if ( !write_itte_locked(its, devid, eventid, collid, intid, &vcpu) )
+    {
+        spin_unlock(&its->its_lock);
+        return -1;
+    }
+
+    spin_unlock(&its->its_lock);
+
+    /*
+     * Connect this virtual LPI to the corresponding host LPI, which is
+     * determined by the same device ID and event ID on the host side.
+     * This returns us the corresponding, still unused pending_irq.
+     */
+    pirq = gicv3_assign_guest_event(its->d, its->doorbell_address,
+                                    devid, eventid, vcpu, intid);
+    if ( !pirq )
+        return -1;
+
+    vgic_init_pending_irq(pirq, intid);
+
+    /*
+     * Now read the guest's property table to initialize our cached state.
+     * It can't fire at this time, because it is not known to the host yet.
+     */
+    ret = update_lpi_property(its->d, intid, pirq);
+    if ( ret )
+        return ret;
+
+    pirq->lpi_vcpu_id = vcpu->vcpu_id;
+
+    /*
+     * Now insert the pending_irq into the domain's LPI tree, so that
+     * it becomes live.
+     */
+    write_lock(&its->d->arch.vgic.pend_lpi_tree_lock);
+    radix_tree_insert(&its->d->arch.vgic.pend_lpi_tree, intid, pirq);
+    write_unlock(&its->d->arch.vgic.pend_lpi_tree_lock);
+
+    return 0;
+}
+
 #define ITS_CMD_BUFFER_SIZE(baser)      ((((baser) & 0xff) + 1) << 12)
 
 /*
@@ -486,6 +581,10 @@ static int vgic_its_handle_cmds(struct domain *d, struct virt_its *its)
         case GITS_CMD_MAPD:
             ret = its_handle_mapd(its, command);
             break;
+        case GITS_CMD_MAPI:
+        case GITS_CMD_MAPTI:
+            ret = its_handle_mapti(its, command);
+            break;
         case GITS_CMD_SYNC:
             /* We handle ITS commands synchronously, so we ignore SYNC. */
             break;
diff --git a/xen/include/asm-arm/gic_v3_its.h b/xen/include/asm-arm/gic_v3_its.h
index ea574c4..0be88ac 100644
--- a/xen/include/asm-arm/gic_v3_its.h
+++ b/xen/include/asm-arm/gic_v3_its.h
@@ -169,6 +169,12 @@ int gicv3_its_map_guest_device(struct domain *d,
 int gicv3_allocate_host_lpi_block(struct domain *d, uint32_t *first_lpi);
 void gicv3_free_host_lpi_block(uint32_t first_lpi);
 
+struct pending_irq *gicv3_assign_guest_event(struct domain *d, paddr_t doorbell,
+                                             uint32_t devid, uint32_t eventid,
+                                             struct vcpu *v, uint32_t virt_lpi);
+void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id,
+                                 unsigned int vcpu_id, uint32_t virt_lpi);
+
 #else
 
 static inline void gicv3_its_dt_init(const struct dt_device_node *node)
-- 
2.9.0


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  parent reply	other threads:[~2017-04-07 17:31 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-07 17:32 [PATCH v6 00/36] arm64: Dom0 ITS emulation Andre Przywara
2017-04-07 17:32 ` [PATCH v6 01/36] ARM: GICv3 ITS: parse and store ITS subnodes from hardware DT Andre Przywara
2017-04-07 17:51   ` Stefano Stabellini
2017-04-07 18:02   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 02/36] ARM: GICv3 ITS: initialize host ITS Andre Przywara
2017-04-07 17:32 ` [PATCH v6 03/36] ARM: GICv3: allocate LPI pending and property table Andre Przywara
2017-04-07 18:04   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 04/36] ARM: GICv3 ITS: allocate device and collection table Andre Przywara
2017-04-07 17:32 ` [PATCH v6 05/36] ARM: GICv3 ITS: map ITS command buffer Andre Przywara
2017-04-07 17:32 ` [PATCH v6 06/36] ARM: GICv3 ITS: introduce ITS command handling Andre Przywara
2017-04-07 17:32 ` [PATCH v6 07/36] ARM: GICv3 ITS: introduce host LPI array Andre Przywara
2017-04-07 17:55   ` Stefano Stabellini
2017-04-07 18:08   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 08/36] ARM: vGICv3: introduce ITS emulation stub Andre Przywara
2017-04-07 17:57   ` Stefano Stabellini
2017-04-07 18:09   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 09/36] ARM: GICv3 ITS: introduce device mapping Andre Przywara
2017-04-07 18:21   ` Stefano Stabellini
2017-04-07 19:21     ` Andre Przywara
2017-04-07 18:21   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 10/36] ARM: GIC: Add checks for NULL pointer pending_irq's Andre Przywara
2017-04-07 18:32   ` Julien Grall
2017-04-07 19:07   ` Stefano Stabellini
2017-04-07 20:46     ` André Przywara
2017-04-07 20:58       ` Julien Grall
2017-04-07 21:45         ` Stefano Stabellini
2017-04-07 22:09           ` Stefano Stabellini
2017-04-07 22:12             ` André Przywara
2017-04-07 17:32 ` [PATCH v6 11/36] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2017-04-07 18:49   ` Stefano Stabellini
2017-04-07 21:02     ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 12/36] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2017-04-07 18:59   ` Stefano Stabellini
2017-04-07 21:09   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 13/36] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2017-04-07 19:10   ` Stefano Stabellini
2017-04-07 17:32 ` [PATCH v6 14/36] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2017-04-07 21:29   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 15/36] ARM: introduce vgic_access_guest_memory() Andre Przywara
2017-04-07 21:35   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 16/36] ARM: vGICv3: re-use vgic_reg64_check_access Andre Przywara
2017-04-09 19:39   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 17/36] ARM: GIC: clear LPI pending bit on cleaning up LR Andre Przywara
2017-04-07 17:32 ` [PATCH v6 18/36] ARM: GIC: export vgic_init_pending_irq() Andre Przywara
2017-04-09 19:40   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 19/36] ARM: VGIC: add vcpu_id to struct pending_irq Andre Przywara
2017-04-07 22:11   ` Julien Grall
2017-04-07 22:14     ` Stefano Stabellini
2017-04-07 22:19       ` Julien Grall
2017-04-07 22:31         ` Stefano Stabellini
2017-04-07 22:52           ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 20/36] ARM: vGICv3: add virtual ITS list head and comment about iteration Andre Przywara
2017-04-07 17:32 ` [PATCH v6 21/36] ARM: GICv3: prepare for virtual ITS subnodes Andre Przywara
2017-04-07 22:59   ` Julien Grall
2017-04-07 23:06     ` André Przywara
2017-04-07 23:12       ` Julien Grall
2017-04-07 23:23         ` André Przywara
2017-04-07 17:32 ` [PATCH v6 22/36] ARM: vGIC: advertise LPI support Andre Przywara
2017-04-09 19:37   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 23/36] ARM: vGICv3: handle disabled LPIs Andre Przywara
2017-04-07 17:32 ` [PATCH v6 24/36] ARM: vITS: add command handling stub and MMIO emulation Andre Przywara
2017-04-09 20:16   ` Julien Grall
2017-04-11 15:49     ` Andre Przywara
2017-04-07 17:32 ` [PATCH v6 25/36] ARM: vITS: introduce translation table walks Andre Przywara
2017-04-07 17:32 ` [PATCH v6 26/36] ARM: vITS: handle CLEAR command Andre Przywara
2017-04-07 17:32 ` [PATCH v6 27/36] ARM: vITS: handle INT command Andre Przywara
2017-04-07 17:32 ` [PATCH v6 28/36] ARM: vITS: handle MAPC command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 29/36] ARM: vITS: handle MAPD command Andre Przywara
2017-04-07 17:33 ` Andre Przywara [this message]
2017-04-07 17:33 ` [PATCH v6 31/36] ARM: vITS: handle MOVI command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 32/36] ARM: vITS: handle DISCARD command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 33/36] ARM: vITS: handle INV command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 34/36] ARM: vITS: handle INVALL command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 35/36] ARM: vITS: create and initialize virtual ITSes for Dom0 Andre Przywara
2017-04-07 17:33 ` [PATCH v6 36/36] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara

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