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From: Andre Przywara <andre.przywara@arm.com>
To: Stefano Stabellini <sstabellini@kernel.org>,
	Julien Grall <julien.grall@arm.com>
Cc: xen-devel@lists.xenproject.org,
	Vijay Kilari <vijay.kilari@gmail.com>,
	Shanker Donthineni <shankerd@codeaurora.org>
Subject: [PATCH v6 35/36] ARM: vITS: create and initialize virtual ITSes for Dom0
Date: Fri,  7 Apr 2017 18:33:06 +0100	[thread overview]
Message-ID: <20170407173307.9788-36-andre.przywara@arm.com> (raw)
In-Reply-To: <20170407173307.9788-1-andre.przywara@arm.com>

For each hardware ITS create and initialize a virtual ITS for Dom0.
We use the same memory mapped address to keep the doorbell working.
This introduces a function to initialize a virtual ITS.
We maintain a list of virtual ITSes, at the moment for the only
purpose of later being able to free them again.
We advertise 24 bits worth of LPIs on the guest side, using the full
32 bits seems to trigger a Linux bug (to be investigated).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 xen/arch/arm/vgic-v3-its.c       | 72 ++++++++++++++++++++++++++++++++++++++++
 xen/arch/arm/vgic-v3.c           |  1 +
 xen/include/asm-arm/gic_v3_its.h |  4 +++
 3 files changed, 77 insertions(+)

diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
index ce90187..439210f 100644
--- a/xen/arch/arm/vgic-v3-its.c
+++ b/xen/arch/arm/vgic-v3-its.c
@@ -42,6 +42,7 @@
  */
 struct virt_its {
     struct domain *d;
+    struct list_head vits_list;
     paddr_t doorbell_address;
     unsigned int devid_bits;
     unsigned int intid_bits;
@@ -74,14 +75,48 @@ struct vits_itte
 
 int vgic_v3_its_init_domain(struct domain *d)
 {
+    int ret;
+
+    INIT_LIST_HEAD(&d->arch.vgic.vits_list);
     spin_lock_init(&d->arch.vgic.its_devices_lock);
     d->arch.vgic.its_devices = RB_ROOT;
 
+    if ( is_hardware_domain(d) )
+    {
+        struct host_its *hw_its;
+
+        list_for_each_entry(hw_its, &host_its_list, entry)
+        {
+            /*
+             * For each host ITS create a virtual ITS using the same
+             * base and thus doorbell address.
+             * Use the same number of device ID bits as the host, and
+             * allow 24 bits for the interrupt ID.
+             */
+            ret = vgic_v3_its_init_virtual(d, hw_its->addr,
+                                           hw_its->devid_bits, 24);
+            if ( ret )
+            {
+                vgic_v3_its_free_domain(d);
+                return ret;
+            }
+            else
+                d->arch.vgic.has_its = true;
+        }
+    }
+
     return 0;
 }
 
 void vgic_v3_its_free_domain(struct domain *d)
 {
+    struct virt_its *pos, *temp;
+
+    list_for_each_entry_safe( pos, temp, &d->arch.vgic.vits_list, vits_list )
+    {
+        list_del(&pos->vits_list);
+        xfree(pos);
+    }
     ASSERT(RB_EMPTY_ROOT(&d->arch.vgic.its_devices));
 }
 
@@ -1255,6 +1290,43 @@ static const struct mmio_handler_ops vgic_its_mmio_handler = {
     .write = vgic_v3_its_mmio_write,
 };
 
+int vgic_v3_its_init_virtual(struct domain *d, paddr_t guest_addr,
+                             unsigned int devid_bits, unsigned int intid_bits)
+{
+    struct virt_its *its;
+    uint64_t base_attr;
+
+    its = xzalloc(struct virt_its);
+    if ( !its )
+        return -ENOMEM;
+
+    base_attr  = GIC_BASER_InnerShareable << GITS_BASER_SHAREABILITY_SHIFT;
+    base_attr |= GIC_BASER_CACHE_SameAsInner << GITS_BASER_OUTER_CACHEABILITY_SHIFT;
+    base_attr |= GIC_BASER_CACHE_RaWaWb << GITS_BASER_INNER_CACHEABILITY_SHIFT;
+
+    its->cbaser  = base_attr;
+    base_attr |= 0ULL << GITS_BASER_PAGE_SIZE_SHIFT;    /* 4K pages */
+    its->baser_dev = GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT;
+    its->baser_dev |= (sizeof(uint64_t) - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
+    its->baser_dev |= base_attr;
+    its->baser_coll  = GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT;
+    its->baser_coll |= (sizeof(uint16_t) - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
+    its->baser_coll |= base_attr;
+    its->d = d;
+    its->doorbell_address = guest_addr + ITS_DOORBELL_OFFSET;
+    its->devid_bits = devid_bits;
+    its->intid_bits = intid_bits;
+    spin_lock_init(&its->vcmd_lock);
+    spin_lock_init(&its->its_lock);
+
+    register_mmio_handler(d, &vgic_its_mmio_handler, guest_addr, SZ_64K, its);
+
+    /* Register the virtual ITSes to be able to clean them up later. */
+    list_add_tail(&its->vits_list, &d->arch.vgic.vits_list);
+
+    return 0;
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index 1c1d014..d381ce6 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1659,6 +1659,7 @@ static int vgic_v3_domain_init(struct domain *d)
 
             first_cpu += size / d->arch.vgic.rdist_stride;
         }
+        d->arch.vgic.nr_regions = vgic_v3_hw.nr_rdist_regions;
     }
     else
     {
diff --git a/xen/include/asm-arm/gic_v3_its.h b/xen/include/asm-arm/gic_v3_its.h
index cd2b527..75ce534 100644
--- a/xen/include/asm-arm/gic_v3_its.h
+++ b/xen/include/asm-arm/gic_v3_its.h
@@ -156,6 +156,10 @@ int gicv3_its_setup_collection(unsigned int cpu);
 int vgic_v3_its_init_domain(struct domain *d);
 void vgic_v3_its_free_domain(struct domain *d);
 
+/* Create and register a virtual ITS at the given guest address. */
+int vgic_v3_its_init_virtual(struct domain *d, paddr_t guest_addr,
+			     unsigned int devid_bits, unsigned int intid_bits);
+
 /*
  * Map a device on the host by allocating an ITT on the host (ITS).
  * "nr_event" specifies how many events (interrupts) this device will need.
-- 
2.9.0


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  parent reply	other threads:[~2017-04-07 17:31 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-07 17:32 [PATCH v6 00/36] arm64: Dom0 ITS emulation Andre Przywara
2017-04-07 17:32 ` [PATCH v6 01/36] ARM: GICv3 ITS: parse and store ITS subnodes from hardware DT Andre Przywara
2017-04-07 17:51   ` Stefano Stabellini
2017-04-07 18:02   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 02/36] ARM: GICv3 ITS: initialize host ITS Andre Przywara
2017-04-07 17:32 ` [PATCH v6 03/36] ARM: GICv3: allocate LPI pending and property table Andre Przywara
2017-04-07 18:04   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 04/36] ARM: GICv3 ITS: allocate device and collection table Andre Przywara
2017-04-07 17:32 ` [PATCH v6 05/36] ARM: GICv3 ITS: map ITS command buffer Andre Przywara
2017-04-07 17:32 ` [PATCH v6 06/36] ARM: GICv3 ITS: introduce ITS command handling Andre Przywara
2017-04-07 17:32 ` [PATCH v6 07/36] ARM: GICv3 ITS: introduce host LPI array Andre Przywara
2017-04-07 17:55   ` Stefano Stabellini
2017-04-07 18:08   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 08/36] ARM: vGICv3: introduce ITS emulation stub Andre Przywara
2017-04-07 17:57   ` Stefano Stabellini
2017-04-07 18:09   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 09/36] ARM: GICv3 ITS: introduce device mapping Andre Przywara
2017-04-07 18:21   ` Stefano Stabellini
2017-04-07 19:21     ` Andre Przywara
2017-04-07 18:21   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 10/36] ARM: GIC: Add checks for NULL pointer pending_irq's Andre Przywara
2017-04-07 18:32   ` Julien Grall
2017-04-07 19:07   ` Stefano Stabellini
2017-04-07 20:46     ` André Przywara
2017-04-07 20:58       ` Julien Grall
2017-04-07 21:45         ` Stefano Stabellini
2017-04-07 22:09           ` Stefano Stabellini
2017-04-07 22:12             ` André Przywara
2017-04-07 17:32 ` [PATCH v6 11/36] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2017-04-07 18:49   ` Stefano Stabellini
2017-04-07 21:02     ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 12/36] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2017-04-07 18:59   ` Stefano Stabellini
2017-04-07 21:09   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 13/36] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2017-04-07 19:10   ` Stefano Stabellini
2017-04-07 17:32 ` [PATCH v6 14/36] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2017-04-07 21:29   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 15/36] ARM: introduce vgic_access_guest_memory() Andre Przywara
2017-04-07 21:35   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 16/36] ARM: vGICv3: re-use vgic_reg64_check_access Andre Przywara
2017-04-09 19:39   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 17/36] ARM: GIC: clear LPI pending bit on cleaning up LR Andre Przywara
2017-04-07 17:32 ` [PATCH v6 18/36] ARM: GIC: export vgic_init_pending_irq() Andre Przywara
2017-04-09 19:40   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 19/36] ARM: VGIC: add vcpu_id to struct pending_irq Andre Przywara
2017-04-07 22:11   ` Julien Grall
2017-04-07 22:14     ` Stefano Stabellini
2017-04-07 22:19       ` Julien Grall
2017-04-07 22:31         ` Stefano Stabellini
2017-04-07 22:52           ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 20/36] ARM: vGICv3: add virtual ITS list head and comment about iteration Andre Przywara
2017-04-07 17:32 ` [PATCH v6 21/36] ARM: GICv3: prepare for virtual ITS subnodes Andre Przywara
2017-04-07 22:59   ` Julien Grall
2017-04-07 23:06     ` André Przywara
2017-04-07 23:12       ` Julien Grall
2017-04-07 23:23         ` André Przywara
2017-04-07 17:32 ` [PATCH v6 22/36] ARM: vGIC: advertise LPI support Andre Przywara
2017-04-09 19:37   ` Julien Grall
2017-04-07 17:32 ` [PATCH v6 23/36] ARM: vGICv3: handle disabled LPIs Andre Przywara
2017-04-07 17:32 ` [PATCH v6 24/36] ARM: vITS: add command handling stub and MMIO emulation Andre Przywara
2017-04-09 20:16   ` Julien Grall
2017-04-11 15:49     ` Andre Przywara
2017-04-07 17:32 ` [PATCH v6 25/36] ARM: vITS: introduce translation table walks Andre Przywara
2017-04-07 17:32 ` [PATCH v6 26/36] ARM: vITS: handle CLEAR command Andre Przywara
2017-04-07 17:32 ` [PATCH v6 27/36] ARM: vITS: handle INT command Andre Przywara
2017-04-07 17:32 ` [PATCH v6 28/36] ARM: vITS: handle MAPC command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 29/36] ARM: vITS: handle MAPD command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 30/36] ARM: vITS: handle MAPTI command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 31/36] ARM: vITS: handle MOVI command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 32/36] ARM: vITS: handle DISCARD command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 33/36] ARM: vITS: handle INV command Andre Przywara
2017-04-07 17:33 ` [PATCH v6 34/36] ARM: vITS: handle INVALL command Andre Przywara
2017-04-07 17:33 ` Andre Przywara [this message]
2017-04-07 17:33 ` [PATCH v6 36/36] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara

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