* [PATCH linux dev-4.10 v3 1/3] aspeed: barreleye: Remove unnecessary GPIO configuration
2017-05-05 2:42 [PATCH linux dev-4.10 v3 0/3] Clean up mach-aspeed/aspeed.c Andrew Jeffery
@ 2017-05-05 2:42 ` Andrew Jeffery
2017-05-05 2:42 ` [PATCH linux dev-4.10 v3 2/3] aspeed: barreleye: Passthrough debounce isn't required Andrew Jeffery
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Andrew Jeffery @ 2017-05-05 2:42 UTC (permalink / raw)
To: joel; +Cc: Andrew Jeffery, openbmc, bradleyb, ken.th.liu, john.hc.wang
These values will be configured by requesting the GPIOs from userspace,
as the GPIO controller plumbs its pin request through the pinctrl
subsystem.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/mach-aspeed/aspeed.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index 0f1a536ba1b2..88d0a59d043d 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -64,13 +64,6 @@ static void __init do_barreleye_setup(void)
writel(0x9E82FCE7, AST_IO(AST_BASE_GPIO | 0x00));
writel(0x0370E677, AST_IO(AST_BASE_GPIO | 0x04));
- /* SCU setup
- * - GPION must be set to GPIO mode (SCU88[0:7] = 0) on
- * Barreleye so they can be used to read the PCIe inventory
- * status
- */
- writel(0x01C00000, AST_IO(AST_BASE_SCU | 0x88));
-
/* To enable GPIOE0 pass through function debounce mode */
writel(0x010FFFFF, AST_IO(AST_BASE_SCU | 0xA8));
--
2.9.3
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH linux dev-4.10 v3 2/3] aspeed: barreleye: Passthrough debounce isn't required
2017-05-05 2:42 [PATCH linux dev-4.10 v3 0/3] Clean up mach-aspeed/aspeed.c Andrew Jeffery
2017-05-05 2:42 ` [PATCH linux dev-4.10 v3 1/3] aspeed: barreleye: Remove unnecessary GPIO configuration Andrew Jeffery
@ 2017-05-05 2:42 ` Andrew Jeffery
2017-05-05 2:42 ` [PATCH linux dev-4.10 v3 3/3] aspeed: barreleye: Debounce BMC_PWBTN_IN_N through devicetree Andrew Jeffery
2017-06-05 8:18 ` [PATCH linux dev-4.10 v3 0/3] Clean up mach-aspeed/aspeed.c Andrew Jeffery
3 siblings, 0 replies; 6+ messages in thread
From: Andrew Jeffery @ 2017-05-05 2:42 UTC (permalink / raw)
To: joel; +Cc: Andrew Jeffery, openbmc, bradleyb, ken.th.liu, john.hc.wang
Passthrough debouncing concerns GPIO passthrough mode, but both GPIOE0
and GPIOE1 are independently exported by userspace. Therefore barreleye
is not using passthrough mode and we can drop this configuration.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/mach-aspeed/aspeed.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index 88d0a59d043d..31b0e69f62b8 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -64,9 +64,6 @@ static void __init do_barreleye_setup(void)
writel(0x9E82FCE7, AST_IO(AST_BASE_GPIO | 0x00));
writel(0x0370E677, AST_IO(AST_BASE_GPIO | 0x04));
- /* To enable GPIOE0 pass through function debounce mode */
- writel(0x010FFFFF, AST_IO(AST_BASE_SCU | 0xA8));
-
/*
* Do read/modify/write on power gpio to prevent resetting power on
* reboot
--
2.9.3
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH linux dev-4.10 v3 3/3] aspeed: barreleye: Debounce BMC_PWBTN_IN_N through devicetree
2017-05-05 2:42 [PATCH linux dev-4.10 v3 0/3] Clean up mach-aspeed/aspeed.c Andrew Jeffery
2017-05-05 2:42 ` [PATCH linux dev-4.10 v3 1/3] aspeed: barreleye: Remove unnecessary GPIO configuration Andrew Jeffery
2017-05-05 2:42 ` [PATCH linux dev-4.10 v3 2/3] aspeed: barreleye: Passthrough debounce isn't required Andrew Jeffery
@ 2017-05-05 2:42 ` Andrew Jeffery
2017-06-05 8:18 ` [PATCH linux dev-4.10 v3 0/3] Clean up mach-aspeed/aspeed.c Andrew Jeffery
3 siblings, 0 replies; 6+ messages in thread
From: Andrew Jeffery @ 2017-05-05 2:42 UTC (permalink / raw)
To: joel; +Cc: Andrew Jeffery, openbmc, bradleyb, ken.th.liu, john.hc.wang
This is a breaking change for userspace, as the GPIO is now represented
as a key-code from a GPIO keyboard input.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts | 11 +++++++++++
arch/arm/mach-aspeed/aspeed.c | 8 --------
2 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts b/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
index be1f2d120fee..9b75fc039f2d 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
@@ -74,6 +74,17 @@
gpios = <&gpio ASPEED_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
};
};
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ gpioe0 {
+ gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_LOW>;
+ label = "bmc_pwbtn_in_n";
+ linux,code = <0>;
+ debounce-interval = <20>;
+ };
+ };
};
&pinctrl {
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index 31b0e69f62b8..760fed641a0b 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -73,14 +73,6 @@ static void __init do_barreleye_setup(void)
writel(reg, AST_IO(AST_BASE_GPIO | 0x20));
writel(0xC738F20A, AST_IO(AST_BASE_GPIO | 0x24));
writel(0x0031FFAF, AST_IO(AST_BASE_GPIO | 0x80));
-
- /* Select TIMER3 as debounce timer */
- writel(0x00000001, AST_IO(AST_BASE_GPIO | 0x48));
- writel(0x00000001, AST_IO(AST_BASE_GPIO | 0x4C));
-
- /* Set debounce timer to 480000 cycles, with a pclk of 48MHz,
- * corresponds to 20 ms. This time was found by experimentation */
- writel(0x000EA600, AST_IO(AST_BASE_GPIO | 0x58));
}
static void __init do_palmetto_setup(void)
--
2.9.3
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH linux dev-4.10 v3 0/3] Clean up mach-aspeed/aspeed.c
2017-05-05 2:42 [PATCH linux dev-4.10 v3 0/3] Clean up mach-aspeed/aspeed.c Andrew Jeffery
` (2 preceding siblings ...)
2017-05-05 2:42 ` [PATCH linux dev-4.10 v3 3/3] aspeed: barreleye: Debounce BMC_PWBTN_IN_N through devicetree Andrew Jeffery
@ 2017-06-05 8:18 ` Andrew Jeffery
2017-06-06 7:37 ` Joel Stanley
3 siblings, 1 reply; 6+ messages in thread
From: Andrew Jeffery @ 2017-06-05 8:18 UTC (permalink / raw)
To: joel; +Cc: openbmc, bradleyb, ken.th.liu, john.hc.wang
[-- Attachment #1: Type: text/plain, Size: 1625 bytes --]
On Fri, 2017-05-05 at 12:12 +0930, Andrew Jeffery wrote:
> Hi all,
>
> Here's v3 of the series cleaning up the board file given functionality we now
> have in the tree. Between patches acked and applied from v1 and v2, there's
> only Barreleye left. I've dug into the archives and Cc'ed Ken and John so they
> can provide feedback if they have availability.
>
> A slip of the fingers meant that v2 didn't actually get Cc'ed to the list, so
> apologies for that. Xo kindly Cc'ed his replies so the acks at least saw the
> light of day.
>
> Again, the controversial patch is the debounce patch for BMC_PWBTN_IN_N, which
> changes how the GPIO is exposed to userspace (and so needs a corresponding
> userspace update). I'm hoping Brad can give feedback or start the discussion to
> coordinate the userspace change.
>
> Cheers,
>
> Andrew
>
Joel, I'd like to see at least the first two patches taken. Hopefully
some of the GPIO work that Brad was involved in can be applied to the
Barreleye userspace so we can also take the third patch.
> Andrew Jeffery (3):
> aspeed: barreleye: Remove unnecessary GPIO configuration
> aspeed: barreleye: Passthrough debounce isn't required
Take the above two with some testing.
> aspeed: barreleye: Debounce BMC_PWBTN_IN_N through devicetree
Take this one once we we're ready in userspace.
Cheers,
Andrew
>
> arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts | 11 +++++++++++
> arch/arm/mach-aspeed/aspeed.c | 18 ------------------
> 2 files changed, 11 insertions(+), 18 deletions(-)
>
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH linux dev-4.10 v3 0/3] Clean up mach-aspeed/aspeed.c
2017-06-05 8:18 ` [PATCH linux dev-4.10 v3 0/3] Clean up mach-aspeed/aspeed.c Andrew Jeffery
@ 2017-06-06 7:37 ` Joel Stanley
0 siblings, 0 replies; 6+ messages in thread
From: Joel Stanley @ 2017-06-06 7:37 UTC (permalink / raw)
To: Andrew Jeffery; +Cc: OpenBMC Maillist, Brad Bishop, ken.th.liu, john.hc.wang
On Mon, Jun 5, 2017 at 5:48 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> On Fri, 2017-05-05 at 12:12 +0930, Andrew Jeffery wrote:
>> Hi all,
>>
>> Here's v3 of the series cleaning up the board file given functionality we now
>> have in the tree. Between patches acked and applied from v1 and v2, there's
>> only Barreleye left. I've dug into the archives and Cc'ed Ken and John so they
>> can provide feedback if they have availability.
>>
>> A slip of the fingers meant that v2 didn't actually get Cc'ed to the list, so
>> apologies for that. Xo kindly Cc'ed his replies so the acks at least saw the
>> light of day.
>>
>> Again, the controversial patch is the debounce patch for BMC_PWBTN_IN_N, which
>> changes how the GPIO is exposed to userspace (and so needs a corresponding
>> userspace update). I'm hoping Brad can give feedback or start the discussion to
>> coordinate the userspace change.
>>
>> Cheers,
>>
>> Andrew
>>
>
> Joel, I'd like to see at least the first two patches taken. Hopefully
> some of the GPIO work that Brad was involved in can be applied to the
> Barreleye userspace so we can also take the third patch.
>
>> Andrew Jeffery (3):
>> aspeed: barreleye: Remove unnecessary GPIO configuration
>> aspeed: barreleye: Passthrough debounce isn't required
>
> Take the above two with some testing.
Those two have been merged into 4.10. They are not part of the kernel
bump I sent today, but will be part of the next.
>> aspeed: barreleye: Debounce BMC_PWBTN_IN_N through devicetree
>
> Take this one once we we're ready in userspace.
Cool. Is there a ticket open to track that work?
Cheers,
Joel
^ permalink raw reply [flat|nested] 6+ messages in thread