From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> To: intel-gfx@lists.freedesktop.org Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, "# v4 . 8+" <stable@vger.kernel.org>, Mahesh Kumar <mahesh1.kumar@intel.com>, Matt Roper <matthew.d.roper@intel.com> Subject: [PATCH] drm/i915: Always recompute watermarks when distrust_bios_wm is set Date: Wed, 31 May 2017 09:56:46 +0200 [thread overview] Message-ID: <20170531075646.15158-1-maarten.lankhorst@linux.intel.com> (raw) In-Reply-To: <20170526151546.25025-2-mahesh1.kumar@intel.com> On some systems there can be a race condition in which no crtc state is added to the first atomic commit. This results in all crtc's having a null DDB allocation, causing a FIFO underrun on any update until the first modeset. Reported-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Inspired-by: Mahesh Kumar <mahesh1.kumar@intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Fixes: 98d39494d375 ("drm/i915/gen9: Compute DDB allocation at atomic check time (v4)") Cc: <stable@vger.kernel.org> # v4.8+ Cc: Mahesh Kumar <mahesh1.kumar@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a488e068c3d6..8daa382b47f3 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5037,10 +5037,27 @@ skl_compute_wm(struct drm_atomic_state *state) struct drm_crtc_state *cstate; struct intel_atomic_state *intel_state = to_intel_atomic_state(state); struct skl_wm_values *results = &intel_state->wm_results; + struct drm_device *dev = state->dev; struct skl_pipe_wm *pipe_wm; bool changed = false; int ret, i; + if (to_i915(dev)->wm.distrust_bios_wm) { + changed = true; + + /* + * The first commit after driver load must update the ddb + * allocations, so make sure we at least hold a lock to + * inspect the state required for watermark updates. + * + * Below we'll grab the required crtc state. + */ + ret = drm_modeset_lock(&dev->mode_config.connection_mutex, + state->acquire_ctx); + if (ret) + return ret; + } + /* * If this transaction isn't actually touching any CRTC's, don't * bother with watermark calculation. Note that if we pass this @@ -5051,6 +5068,7 @@ skl_compute_wm(struct drm_atomic_state *state) */ for_each_new_crtc_in_state(state, crtc, cstate, i) changed = true; + if (!changed) return 0; -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> To: intel-gfx@lists.freedesktop.org Cc: "# v4 . 8+" <stable@vger.kernel.org> Subject: [PATCH] drm/i915: Always recompute watermarks when distrust_bios_wm is set Date: Wed, 31 May 2017 09:56:46 +0200 [thread overview] Message-ID: <20170531075646.15158-1-maarten.lankhorst@linux.intel.com> (raw) In-Reply-To: <20170526151546.25025-2-mahesh1.kumar@intel.com> On some systems there can be a race condition in which no crtc state is added to the first atomic commit. This results in all crtc's having a null DDB allocation, causing a FIFO underrun on any update until the first modeset. Reported-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Inspired-by: Mahesh Kumar <mahesh1.kumar@intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Fixes: 98d39494d375 ("drm/i915/gen9: Compute DDB allocation at atomic check time (v4)") Cc: <stable@vger.kernel.org> # v4.8+ Cc: Mahesh Kumar <mahesh1.kumar@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a488e068c3d6..8daa382b47f3 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5037,10 +5037,27 @@ skl_compute_wm(struct drm_atomic_state *state) struct drm_crtc_state *cstate; struct intel_atomic_state *intel_state = to_intel_atomic_state(state); struct skl_wm_values *results = &intel_state->wm_results; + struct drm_device *dev = state->dev; struct skl_pipe_wm *pipe_wm; bool changed = false; int ret, i; + if (to_i915(dev)->wm.distrust_bios_wm) { + changed = true; + + /* + * The first commit after driver load must update the ddb + * allocations, so make sure we at least hold a lock to + * inspect the state required for watermark updates. + * + * Below we'll grab the required crtc state. + */ + ret = drm_modeset_lock(&dev->mode_config.connection_mutex, + state->acquire_ctx); + if (ret) + return ret; + } + /* * If this transaction isn't actually touching any CRTC's, don't * bother with watermark calculation. Note that if we pass this @@ -5051,6 +5068,7 @@ skl_compute_wm(struct drm_atomic_state *state) */ for_each_new_crtc_in_state(state, crtc, cstate, i) changed = true; + if (!changed) return 0; -- 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-05-31 8:05 UTC|newest] Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-05-26 15:15 [PATCH 0/3] Remaining patches for WM cleanup series Mahesh Kumar 2017-05-26 15:15 ` [PATCH 1/3] drm/i915/skl+: Don't trust cached ddb values Mahesh Kumar 2017-05-26 21:23 ` Rodrigo Vivi 2017-05-29 5:56 ` Mahesh Kumar 2017-05-30 10:00 ` Maarten Lankhorst 2017-05-30 12:56 ` Mahesh Kumar 2017-05-30 14:35 ` Lankhorst, Maarten 2017-05-31 7:56 ` Maarten Lankhorst [this message] 2017-05-31 7:56 ` [PATCH] drm/i915: Always recompute watermarks when distrust_bios_wm is set Maarten Lankhorst 2017-05-31 10:42 ` Mahesh Kumar 2017-05-31 10:59 ` Maarten Lankhorst 2017-05-31 15:42 ` [PATCH] drm/i915: Always recompute watermarks when distrust_bios_wm is set, v2 Maarten Lankhorst 2017-05-31 17:43 ` Mahesh Kumar 2017-05-31 17:43 ` Mahesh Kumar 2017-05-31 22:08 ` Matt Roper 2017-05-26 15:15 ` [PATCH 2/3] drm/i915/skl: New ddb allocation algorithm Mahesh Kumar 2017-05-31 22:16 ` Matt Roper 2017-06-01 5:59 ` Mahesh Kumar 2017-05-26 15:15 ` [PATCH 3/3] drm/i915/skl+: consider max supported plane pixel rate while scaling Mahesh Kumar 2017-06-01 8:24 ` Maarten Lankhorst 2017-05-26 15:43 ` ✗ Fi.CI.BAT: warning for Remaining patches for WM cleanup series (rev3) Patchwork
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20170531075646.15158-1-maarten.lankhorst@linux.intel.com \ --to=maarten.lankhorst@linux.intel.com \ --cc=intel-gfx@lists.freedesktop.org \ --cc=mahesh1.kumar@intel.com \ --cc=matthew.d.roper@intel.com \ --cc=stable@vger.kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.