All of lore.kernel.org
 help / color / mirror / Atom feed
From: Christoffer Dall <christoffer.dall@linaro.org>
To: Will Deacon <will.deacon@arm.com>
Cc: Christoffer Dall <cdall@linaro.org>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
	Marc Zyngier <marc.zyngier@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [RFC PATCH v2 02/19] arm64: Use the physical counter when available for read_cycles
Date: Thu, 27 Jul 2017 00:14:29 -0700	[thread overview]
Message-ID: <20170727071429.GA1432@lvm> (raw)
In-Reply-To: <20170726171728.GB18154@arm.com>

On Wed, Jul 26, 2017 at 06:17:29PM +0100, Will Deacon wrote:
> On Tue, Jul 25, 2017 at 07:36:47AM -0700, Christoffer Dall wrote:
> > On Tue, Jul 25, 2017 at 10:43:08AM +0100, Will Deacon wrote:
> > > On Mon, Jul 17, 2017 at 04:27:01PM +0200, Christoffer Dall wrote:
> > > > Currently get_cycles() is hardwired to arch_counter_get_cntvct() on
> > > > arm64, but as we move to using the physical timer for the in-kernel
> > > > time-keeping, we need to make that more flexible.
> > > > 
> > > > First, we need to make sure the physical counter can be read on equal
> > > > terms to the virtual counter, which includes adding physical counter
> > > > read functions for timers that require errata.
> > > > 
> > > > Second, we need to make a choice between reading the physical vs virtual
> > > > counter, depending on which timer is used for time keeping in the kernel
> > > > otherwise.  We can do this using a static key to avoid a performance
> > > > penalty during runtime when reading the counter.
> > > > 
> > > > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > > > Cc: Will Deacon <will.deacon@arm.com>
> > > > Cc: Mark Rutland <mark.rutland@arm.com>
> > > > Cc: Marc Zyngier <marc.zyngier@arm.com>
> > > > Signed-off-by: Christoffer Dall <cdall@linaro.org>
> > > > ---
> > > >  arch/arm64/include/asm/arch_timer.h  | 18 ++++++++++++------
> > > >  arch/arm64/include/asm/timex.h       |  2 +-
> > > >  drivers/clocksource/arm_arch_timer.c | 32 ++++++++++++++++++++++++++++++--
> > > >  3 files changed, 43 insertions(+), 9 deletions(-)
> > > 
> > > [...]
> > > 
> > > > @@ -886,10 +912,12 @@ static void __init arch_counter_register(unsigned type)
> > > >  
> > > >  	/* Register the CP15 based counter if we have one */
> > > >  	if (type & ARCH_TIMER_TYPE_CP15) {
> > > > -		if (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI)
> > > > +		if (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) {
> > > >  			arch_timer_read_counter = arch_counter_get_cntvct;
> > > > -		else
> > > > +		} else {
> > > >  			arch_timer_read_counter = arch_counter_get_cntpct;
> > > > +			static_branch_enable(&arch_timer_phys_counter_available);
> > > > +		}
> > > 
> > > I'm a bit worried about this change, although I can't put my finger on
> > > exactly the problematic scenario. My concern is that if we have a system
> > > where the host kernel is entered at NS-EL1 (because, e.g. EL2 is used for
> > > something else or the bootloader just didn't load us there) then the booting
> > > protocol doesn't mandate a zero-initialised CNTVOFF value. If we can
> > > subsequently end up using the physical counter in the kernel and the virtual
> > > counter in userspace, the vDSO will get confused because the datapage values
> > > will not correspond to the values it actually ends up reading. 
> > 
> > Just so I'm sure I'm understanding correctly, vDSO always reads the
> > virtual counter?
> 
> Yes, that's right.
> 
> > > There's also
> > > the likelihood that existing EL2 init code simply isn't setting up
> > > CNTHCTL_EL2 and CNTVOFF correctly, so we probably need a way to force
> > > virtual counter on the cmdline.
> > 
> > My understanding was that we only ever use the physical counter when we
> > boot at EL2 and therefore the kernel is in control of CNTVOFF and can
> > set that to 0.  Is this not the case, or are you asking for a way to
> > mandate this relationship or make it abundantly clear?
> 
> AFAICT, arch_timer_ppi_nr could return ARCH_TIMER_PHYS_NONSECURE_PPI
> or ARCH_TIMER_PHYS_SECURE_PPI when we're not running at EL2, which would
> cause us to use the physical counter with your patch applied.
> 

With patch 1, yes.

How about simply adding something like this then:


diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index f4e7261..b0426ac 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -912,7 +912,8 @@ static void __init arch_counter_register(unsigned type)
 
 	/* Register the CP15 based counter if we have one */
 	if (type & ARCH_TIMER_TYPE_CP15) {
-		if (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) {
+		if (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI ||
+		    (!is_hyp_mode_available() && IS_ENABLED(CONFIG_ARM64))) {
 			arch_timer_read_counter = arch_counter_get_cntvct;
 		} else {
 			arch_timer_read_counter = arch_counter_get_cntpct;


> > Also, are you fine with arch_timer_read_counter changing to using the
> > physical counter on arm64, but you're merely worried about
> > read_cycles()?
> 
> Assuming you mean get_cycles(), 

Yes, I should change that in the patch subject as well.

> then no, I'm not worried about that because
> it's just used for things like small delta calculations and entropy.

ok, I was a bit confused becasue this patch only changes get_cycles(),
where the previous patch changes what arch_timer_read_counter() does.

> I'm
> worried about the timekeeper (which I think uses arch_timer_read_counter)
> being based on the physical counter and the vDSO being based on the virtual
> counter and CNTVOFF != 0.
> 

ok, so with the above proposed modification we'll maintain that CNTVOFF
== 0 whenever we're not in VCPU context and the timekeeper will always
use the physical counter.

[...]

> > 
> > How does this change affect the 32-bit side?  All this should do is
> > enable a static branch which is unused on the 32-bit side; what am I
> > missing?
> 
> The PPI selection is more complicated for 32-bit, because of the
> "arm,cpu-registers-not-fw-configured" quirk.
> 

ok, but I don't see how my two patches here affect the 32-bit side, as
I only change the logic on the arm64 side?

Thanks,
-Christoffer

WARNING: multiple messages have this Message-ID (diff)
From: christoffer.dall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v2 02/19] arm64: Use the physical counter when available for read_cycles
Date: Thu, 27 Jul 2017 00:14:29 -0700	[thread overview]
Message-ID: <20170727071429.GA1432@lvm> (raw)
In-Reply-To: <20170726171728.GB18154@arm.com>

On Wed, Jul 26, 2017 at 06:17:29PM +0100, Will Deacon wrote:
> On Tue, Jul 25, 2017 at 07:36:47AM -0700, Christoffer Dall wrote:
> > On Tue, Jul 25, 2017 at 10:43:08AM +0100, Will Deacon wrote:
> > > On Mon, Jul 17, 2017 at 04:27:01PM +0200, Christoffer Dall wrote:
> > > > Currently get_cycles() is hardwired to arch_counter_get_cntvct() on
> > > > arm64, but as we move to using the physical timer for the in-kernel
> > > > time-keeping, we need to make that more flexible.
> > > > 
> > > > First, we need to make sure the physical counter can be read on equal
> > > > terms to the virtual counter, which includes adding physical counter
> > > > read functions for timers that require errata.
> > > > 
> > > > Second, we need to make a choice between reading the physical vs virtual
> > > > counter, depending on which timer is used for time keeping in the kernel
> > > > otherwise.  We can do this using a static key to avoid a performance
> > > > penalty during runtime when reading the counter.
> > > > 
> > > > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > > > Cc: Will Deacon <will.deacon@arm.com>
> > > > Cc: Mark Rutland <mark.rutland@arm.com>
> > > > Cc: Marc Zyngier <marc.zyngier@arm.com>
> > > > Signed-off-by: Christoffer Dall <cdall@linaro.org>
> > > > ---
> > > >  arch/arm64/include/asm/arch_timer.h  | 18 ++++++++++++------
> > > >  arch/arm64/include/asm/timex.h       |  2 +-
> > > >  drivers/clocksource/arm_arch_timer.c | 32 ++++++++++++++++++++++++++++++--
> > > >  3 files changed, 43 insertions(+), 9 deletions(-)
> > > 
> > > [...]
> > > 
> > > > @@ -886,10 +912,12 @@ static void __init arch_counter_register(unsigned type)
> > > >  
> > > >  	/* Register the CP15 based counter if we have one */
> > > >  	if (type & ARCH_TIMER_TYPE_CP15) {
> > > > -		if (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI)
> > > > +		if (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) {
> > > >  			arch_timer_read_counter = arch_counter_get_cntvct;
> > > > -		else
> > > > +		} else {
> > > >  			arch_timer_read_counter = arch_counter_get_cntpct;
> > > > +			static_branch_enable(&arch_timer_phys_counter_available);
> > > > +		}
> > > 
> > > I'm a bit worried about this change, although I can't put my finger on
> > > exactly the problematic scenario. My concern is that if we have a system
> > > where the host kernel is entered at NS-EL1 (because, e.g. EL2 is used for
> > > something else or the bootloader just didn't load us there) then the booting
> > > protocol doesn't mandate a zero-initialised CNTVOFF value. If we can
> > > subsequently end up using the physical counter in the kernel and the virtual
> > > counter in userspace, the vDSO will get confused because the datapage values
> > > will not correspond to the values it actually ends up reading. 
> > 
> > Just so I'm sure I'm understanding correctly, vDSO always reads the
> > virtual counter?
> 
> Yes, that's right.
> 
> > > There's also
> > > the likelihood that existing EL2 init code simply isn't setting up
> > > CNTHCTL_EL2 and CNTVOFF correctly, so we probably need a way to force
> > > virtual counter on the cmdline.
> > 
> > My understanding was that we only ever use the physical counter when we
> > boot at EL2 and therefore the kernel is in control of CNTVOFF and can
> > set that to 0.  Is this not the case, or are you asking for a way to
> > mandate this relationship or make it abundantly clear?
> 
> AFAICT, arch_timer_ppi_nr could return ARCH_TIMER_PHYS_NONSECURE_PPI
> or ARCH_TIMER_PHYS_SECURE_PPI when we're not running at EL2, which would
> cause us to use the physical counter with your patch applied.
> 

With patch 1, yes.

How about simply adding something like this then:


diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index f4e7261..b0426ac 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -912,7 +912,8 @@ static void __init arch_counter_register(unsigned type)
 
 	/* Register the CP15 based counter if we have one */
 	if (type & ARCH_TIMER_TYPE_CP15) {
-		if (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) {
+		if (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI ||
+		    (!is_hyp_mode_available() && IS_ENABLED(CONFIG_ARM64))) {
 			arch_timer_read_counter = arch_counter_get_cntvct;
 		} else {
 			arch_timer_read_counter = arch_counter_get_cntpct;


> > Also, are you fine with arch_timer_read_counter changing to using the
> > physical counter on arm64, but you're merely worried about
> > read_cycles()?
> 
> Assuming you mean get_cycles(), 

Yes, I should change that in the patch subject as well.

> then no, I'm not worried about that because
> it's just used for things like small delta calculations and entropy.

ok, I was a bit confused becasue this patch only changes get_cycles(),
where the previous patch changes what arch_timer_read_counter() does.

> I'm
> worried about the timekeeper (which I think uses arch_timer_read_counter)
> being based on the physical counter and the vDSO being based on the virtual
> counter and CNTVOFF != 0.
> 

ok, so with the above proposed modification we'll maintain that CNTVOFF
== 0 whenever we're not in VCPU context and the timekeeper will always
use the physical counter.

[...]

> > 
> > How does this change affect the 32-bit side?  All this should do is
> > enable a static branch which is unused on the 32-bit side; what am I
> > missing?
> 
> The PPI selection is more complicated for 32-bit, because of the
> "arm,cpu-registers-not-fw-configured" quirk.
> 

ok, but I don't see how my two patches here affect the 32-bit side, as
I only change the logic on the arm64 side?

Thanks,
-Christoffer

  reply	other threads:[~2017-07-27  7:14 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-17 14:26 [RFC PATCH v2 00/19] KVM: arm/arm64: Optimize arch timer register handling Christoffer Dall
2017-07-17 14:26 ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 01/19] arm64: Use physical counter for in-kernel reads Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 02/19] arm64: Use the physical counter when available for read_cycles Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-25  9:43   ` Will Deacon
2017-07-25  9:43     ` Will Deacon
2017-07-25 14:36     ` Christoffer Dall
2017-07-25 14:36       ` Christoffer Dall
2017-07-26 17:17       ` Will Deacon
2017-07-26 17:17         ` Will Deacon
2017-07-27  7:14         ` Christoffer Dall [this message]
2017-07-27  7:14           ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 03/19] KVM: arm/arm64: Guard kvm_vgic_map_is_active against !vgic_initialized Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 04/19] KVM: arm/arm64: Support calling vgic_update_irq_pending from irq context Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 05/19] KVM: arm/arm64: Check that system supports split eoi/deactivate Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-08-01 11:35   ` Marc Zyngier
2017-08-01 11:35     ` Marc Zyngier
2017-08-01 12:26     ` Christoffer Dall
2017-08-01 12:26       ` Christoffer Dall
2017-08-01 12:37       ` Marc Zyngier
2017-08-01 12:37         ` Marc Zyngier
2017-08-01 12:54         ` Christoffer Dall
2017-08-01 12:54           ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 06/19] KVM: arm/arm64: Make timer_arm and timer_disarm helpers more generic Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-08-01 14:10   ` Marc Zyngier
2017-08-01 14:10     ` Marc Zyngier
2017-08-01 14:57     ` Christoffer Dall
2017-08-01 14:57       ` Christoffer Dall
2017-08-01 15:41       ` Marc Zyngier
2017-08-01 15:41         ` Marc Zyngier
2017-07-17 14:27 ` [RFC PATCH v2 07/19] KVM: arm/arm64: Rename soft timer to bg_timer Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 08/19] KVM: arm/arm64: Use separate timer for phys timer emulation Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 09/19] KVM: arm/arm64: Move timer/vgic flush/sync under disabled irq Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 10/19] KVM: arm/arm64: Move timer save/restore out of the hyp code Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 11/19] genirq: Document vcpu_info usage for per-CPU interrupts Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-08-01 16:15   ` Marc Zyngier
2017-08-01 16:15     ` Marc Zyngier
2017-08-01 16:57     ` Christoffer Dall
2017-08-01 16:57       ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 12/19] KVM: arm/arm64: Set VCPU affinity for virt timer irq Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 13/19] KVM: arm/arm64: Avoid timer save/restore in vcpu entry/exit Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 14/19] KVM: arm/arm64: Support EL1 phys timer register access in set/get reg Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 15/19] KVM: arm/arm64: Use kvm_arm_timer_set/get_reg for guest register traps Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 16/19] KVM: arm/arm64: Move phys_timer_emulate function Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 17/19] KVM: arm/arm64: Avoid phys timer emulation in vcpu entry/exit Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 18/19] KVM: arm/arm64: Get rid of kvm_timer_flush_hwstate Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall
2017-07-17 14:27 ` [RFC PATCH v2 19/19] KVM: arm/arm64: Rework kvm_timer_should_fire Christoffer Dall
2017-07-17 14:27   ` Christoffer Dall

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170727071429.GA1432@lvm \
    --to=christoffer.dall@linaro.org \
    --cc=catalin.marinas@arm.com \
    --cc=cdall@linaro.org \
    --cc=kvm@vger.kernel.org \
    --cc=kvmarm@lists.cs.columbia.edu \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.