* [patch v1 0/2] JTAG driver introduction
@ 2017-08-02 13:18 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-02 13:18 UTC (permalink / raw)
To: gregkh, arnd
Cc: linux-kernel, linux-arm-kernel, devicetree, openbmc, joel, jiri,
tklauser, linux-serial, mec, vadimp, system-sw-low-level,
Oleksandr Shamray
When a need raise up to use JTAG interface for system's devices
programming or CPU debugging, it could be done from the external
JTAG master controller.
For such purpose, usually the user layer
application implements jtag protocol or using a proprietary
connection to vendor hardware.
This method is slow and not generic.
We propose to implement general JTAG interface and infrastructure
to communicate with user layer application. In such way, we can
have the standard JTAG interface core part and separation from
specific HW implementation.
This allow new capability to debug the CPU or program system's
device via BMC without additional devices nor cost.
This patch purpose is to add JTAG master core infrastructure by
defining new JTAG class and provide generic JTAG interface
to allow hardware specific drivers to connect this interface.
This will enable all JTAG drivers to use the common interface
part and will have separate for hardware implementation.
The JTAG (Joint Test Action Group) core driver provides minimal generic
JTAG interface, which can be used by hardware specific JTAG master
controllers. By providing common interface for the JTAG controllers,
user space device programing is hardware independent.
Modern SoC which in use for embedded system' equipped with
internal JTAG master interface.
This interface is used for programming and debugging system's
hardware components, like CPLD, FPGA, CPU, voltage and
industrial controllers.
Firmware for such devices can be upgraded through JTAG interface during
Runtime. The JTAG standard support for multiple devices programming,
is in case their lines are daisy-chained together.
For example, systems which equipped with host CPU, BMC SoC or/and
number of programmable devices are capable to connect a pin and
select system components dynamically for programming and debugging,
This is using by the BMC which is equipped with internal SoC master
controller.
For example:
BMC JTAG master --> pin selected to CPLDs chain for programming (filed
upgrade, production)
BMC JTAG master --> pin selected to voltage monitors for programming
(field upgrade, production)
BMC JTAG master --> pin selected to host CPU (on-site debugging
and developers debugging)
For example, we can have application in user space which using calls
to JTAG driver executes CPLD programming directly from SVF file
The JTAG standard (IEEE 1149.1) defines the next connector pins:
- TDI (Test Data In);
- TDO (Test Data Out);
- TCK (Test Clock);
- TMS (Test Mode Select);
- TRST (Test Reset) (Optional);
The SoC equipped with JTAG master controller, performs
device programming on command or vector level. For example
a file in a standard SVF (Serial Vector Format) that contains
boundary scan vectors, can be used by sending each vector
to the JTAG interface and the JTAG controller will execute
the programming.
Initial version provides the system calls set for:
- SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
- SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
Oleksandr Shamray (2):
drivers: jtag: Add JTAG core driver
drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master
driver
Documentation/ioctl/ioctl-number.txt | 2 +
MAINTAINERS | 8 +
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/jtag/Kconfig | 31 ++
drivers/jtag/Makefile | 3 +
drivers/jtag/jtag-aspeed.c | 802 ++++++++++++++++++++++++++++++++++
drivers/jtag/jtag.c | 347 +++++++++++++++
include/linux/jtag.h | 63 +++
include/uapi/linux/jtag.h | 133 ++++++
10 files changed, 1392 insertions(+), 0 deletions(-)
create mode 100644 drivers/jtag/Kconfig
create mode 100644 drivers/jtag/Makefile
create mode 100644 drivers/jtag/jtag-aspeed.c
create mode 100644 drivers/jtag/jtag.c
create mode 100644 include/linux/jtag.h
create mode 100644 include/uapi/linux/jtag.h
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 0/2] JTAG driver introduction
@ 2017-08-02 13:18 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-02 13:18 UTC (permalink / raw)
To: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r, arnd-r2nGTMty4D4
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
openbmc-uLR06cmDAlY/bJ5BZ2RsiQ, joel-U3u1mxZcP9KHXe+LvDLADg,
jiri-rHqAuBHg3fBzbRFIqnYvSA, tklauser-93Khv+1bN0NyDzI6CaY1VQ,
linux-serial-u79uwXL29TY76Z2rM5mHXA, mec-WqBc5aa1uDFeoWH0uzbU5w,
vadimp-45czdsxZ+A5DPfheJLI6IQ,
system-sw-low-level-VPRAkNaXOzVWk0Htik3J/w, Oleksandr Shamray
When a need raise up to use JTAG interface for system's devices
programming or CPU debugging, it could be done from the external
JTAG master controller.
For such purpose, usually the user layer
application implements jtag protocol or using a proprietary
connection to vendor hardware.
This method is slow and not generic.
We propose to implement general JTAG interface and infrastructure
to communicate with user layer application. In such way, we can
have the standard JTAG interface core part and separation from
specific HW implementation.
This allow new capability to debug the CPU or program system's
device via BMC without additional devices nor cost.
This patch purpose is to add JTAG master core infrastructure by
defining new JTAG class and provide generic JTAG interface
to allow hardware specific drivers to connect this interface.
This will enable all JTAG drivers to use the common interface
part and will have separate for hardware implementation.
The JTAG (Joint Test Action Group) core driver provides minimal generic
JTAG interface, which can be used by hardware specific JTAG master
controllers. By providing common interface for the JTAG controllers,
user space device programing is hardware independent.
Modern SoC which in use for embedded system' equipped with
internal JTAG master interface.
This interface is used for programming and debugging system's
hardware components, like CPLD, FPGA, CPU, voltage and
industrial controllers.
Firmware for such devices can be upgraded through JTAG interface during
Runtime. The JTAG standard support for multiple devices programming,
is in case their lines are daisy-chained together.
For example, systems which equipped with host CPU, BMC SoC or/and
number of programmable devices are capable to connect a pin and
select system components dynamically for programming and debugging,
This is using by the BMC which is equipped with internal SoC master
controller.
For example:
BMC JTAG master --> pin selected to CPLDs chain for programming (filed
upgrade, production)
BMC JTAG master --> pin selected to voltage monitors for programming
(field upgrade, production)
BMC JTAG master --> pin selected to host CPU (on-site debugging
and developers debugging)
For example, we can have application in user space which using calls
to JTAG driver executes CPLD programming directly from SVF file
The JTAG standard (IEEE 1149.1) defines the next connector pins:
- TDI (Test Data In);
- TDO (Test Data Out);
- TCK (Test Clock);
- TMS (Test Mode Select);
- TRST (Test Reset) (Optional);
The SoC equipped with JTAG master controller, performs
device programming on command or vector level. For example
a file in a standard SVF (Serial Vector Format) that contains
boundary scan vectors, can be used by sending each vector
to the JTAG interface and the JTAG controller will execute
the programming.
Initial version provides the system calls set for:
- SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
- SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
Oleksandr Shamray (2):
drivers: jtag: Add JTAG core driver
drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master
driver
Documentation/ioctl/ioctl-number.txt | 2 +
MAINTAINERS | 8 +
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/jtag/Kconfig | 31 ++
drivers/jtag/Makefile | 3 +
drivers/jtag/jtag-aspeed.c | 802 ++++++++++++++++++++++++++++++++++
drivers/jtag/jtag.c | 347 +++++++++++++++
include/linux/jtag.h | 63 +++
include/uapi/linux/jtag.h | 133 ++++++
10 files changed, 1392 insertions(+), 0 deletions(-)
create mode 100644 drivers/jtag/Kconfig
create mode 100644 drivers/jtag/Makefile
create mode 100644 drivers/jtag/jtag-aspeed.c
create mode 100644 drivers/jtag/jtag.c
create mode 100644 include/linux/jtag.h
create mode 100644 include/uapi/linux/jtag.h
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^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 0/2] JTAG driver introduction
@ 2017-08-02 13:18 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-02 13:18 UTC (permalink / raw)
To: linux-arm-kernel
When a need raise up to use JTAG interface for system's devices
programming or CPU debugging, it could be done from the external
JTAG master controller.
For such purpose, usually the user layer
application implements jtag protocol or using a proprietary
connection to vendor hardware.
This method is slow and not generic.
We propose to implement general JTAG interface and infrastructure
to communicate with user layer application. In such way, we can
have the standard JTAG interface core part and separation from
specific HW implementation.
This allow new capability to debug the CPU or program system's
device via BMC without additional devices nor cost.
This patch purpose is to add JTAG master core infrastructure by
defining new JTAG class and provide generic JTAG interface
to allow hardware specific drivers to connect this interface.
This will enable all JTAG drivers to use the common interface
part and will have separate for hardware implementation.
The JTAG (Joint Test Action Group) core driver provides minimal generic
JTAG interface, which can be used by hardware specific JTAG master
controllers. By providing common interface for the JTAG controllers,
user space device programing is hardware independent.
Modern SoC which in use for embedded system' equipped with
internal JTAG master interface.
This interface is used for programming and debugging system's
hardware components, like CPLD, FPGA, CPU, voltage and
industrial controllers.
Firmware for such devices can be upgraded through JTAG interface during
Runtime. The JTAG standard support for multiple devices programming,
is in case their lines are daisy-chained together.
For example, systems which equipped with host CPU, BMC SoC or/and
number of programmable devices are capable to connect a pin and
select system components dynamically for programming and debugging,
This is using by the BMC which is equipped with internal SoC master
controller.
For example:
BMC JTAG master --> pin selected to CPLDs chain for programming (filed
upgrade, production)
BMC JTAG master --> pin selected to voltage monitors for programming
(field upgrade, production)
BMC JTAG master --> pin selected to host CPU (on-site debugging
and developers debugging)
For example, we can have application in user space which using calls
to JTAG driver executes CPLD programming directly from SVF file
The JTAG standard (IEEE 1149.1) defines the next connector pins:
- TDI (Test Data In);
- TDO (Test Data Out);
- TCK (Test Clock);
- TMS (Test Mode Select);
- TRST (Test Reset) (Optional);
The SoC equipped with JTAG master controller, performs
device programming on command or vector level. For example
a file in a standard SVF (Serial Vector Format) that contains
boundary scan vectors, can be used by sending each vector
to the JTAG interface and the JTAG controller will execute
the programming.
Initial version provides the system calls set for:
- SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
- SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks.
SoC which are not equipped with JTAG master interface, can be built
on top of JTAG core driver infrastructure, by applying bit-banging of
TDI, TDO, TCK and TMS pins within the hardware specific driver.
Oleksandr Shamray (2):
drivers: jtag: Add JTAG core driver
drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master
driver
Documentation/ioctl/ioctl-number.txt | 2 +
MAINTAINERS | 8 +
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/jtag/Kconfig | 31 ++
drivers/jtag/Makefile | 3 +
drivers/jtag/jtag-aspeed.c | 802 ++++++++++++++++++++++++++++++++++
drivers/jtag/jtag.c | 347 +++++++++++++++
include/linux/jtag.h | 63 +++
include/uapi/linux/jtag.h | 133 ++++++
10 files changed, 1392 insertions(+), 0 deletions(-)
create mode 100644 drivers/jtag/Kconfig
create mode 100644 drivers/jtag/Makefile
create mode 100644 drivers/jtag/jtag-aspeed.c
create mode 100644 drivers/jtag/jtag.c
create mode 100644 include/linux/jtag.h
create mode 100644 include/uapi/linux/jtag.h
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 1/2] drivers: jtag: Add JTAG core driver
2017-08-02 13:18 ` Oleksandr Shamray
@ 2017-08-02 13:18 ` Oleksandr Shamray
-1 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-02 13:18 UTC (permalink / raw)
To: gregkh, arnd
Cc: linux-kernel, linux-arm-kernel, devicetree, openbmc, joel, jiri,
tklauser, linux-serial, mec, vadimp, system-sw-low-level,
Oleksandr Shamray, Jiri Pirko
JTAG class driver provide infrastructure to support hardware/software
JTAG platform drivers. It provide user layer API interface for flashing
and debugging external devices which equipped with JTAG interface
using standard transactions.
Driver exposes set of IOCTL to user space for:
- XFER:
- SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
- SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks).
- SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
Documentation/ioctl/ioctl-number.txt | 2 +
MAINTAINERS | 8 +
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/jtag/Kconfig | 18 ++
drivers/jtag/Makefile | 2 +
drivers/jtag/jtag.c | 347 ++++++++++++++++++++++++++++++++++
include/linux/jtag.h | 63 ++++++
include/uapi/linux/jtag.h | 133 +++++++++++++
9 files changed, 576 insertions(+), 0 deletions(-)
create mode 100644 drivers/jtag/Kconfig
create mode 100644 drivers/jtag/Makefile
create mode 100644 drivers/jtag/jtag.c
create mode 100644 include/linux/jtag.h
create mode 100644 include/uapi/linux/jtag.h
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
index 3e3fdae..1af2508 100644
--- a/Documentation/ioctl/ioctl-number.txt
+++ b/Documentation/ioctl/ioctl-number.txt
@@ -321,6 +321,8 @@ Code Seq#(hex) Include File Comments
0xB0 all RATIO devices in development:
<mailto:vgo@ratio.de>
0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
+0xB2 00-0f linux/jtag.h JTAG driver
+ <mailto:oleksandrs@mellanox.com>
0xB3 00 linux/mmc/ioctl.h
0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org>
0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc@vger.kernel.org>
diff --git a/MAINTAINERS b/MAINTAINERS
index 205d397..141aeaf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7292,6 +7292,14 @@ L: linux-serial@vger.kernel.org
S: Maintained
F: drivers/tty/serial/jsm/
+JTAG SUBSYSTEM
+M: Oleksandr Shamray <oleksandrs@mellanox.com>
+M: Vadim Pasternak <vadimp@mellanox.com>
+S: Maintained
+F: include/linux/jtag.h
+F: include/uapi/linux/jtag.h
+F: drivers/jtag/
+
K10TEMP HARDWARE MONITORING DRIVER
M: Clemens Ladisch <clemens@ladisch.de>
L: linux-hwmon@vger.kernel.org
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 505c676..2214678 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -208,4 +208,6 @@ source "drivers/tee/Kconfig"
source "drivers/mux/Kconfig"
+source "drivers/jtag/Kconfig"
+
endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index dfdcda0..6a2059b 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -182,3 +182,4 @@ obj-$(CONFIG_FPGA) += fpga/
obj-$(CONFIG_FSI) += fsi/
obj-$(CONFIG_TEE) += tee/
obj-$(CONFIG_MULTIPLEXER) += mux/
+obj-$(CONFIG_JTAG) += jtag/
diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
new file mode 100644
index 0000000..a8d0149
--- /dev/null
+++ b/drivers/jtag/Kconfig
@@ -0,0 +1,18 @@
+menuconfig JTAG
+ tristate "JTAG support"
+ default n
+ ---help---
+ This provides basic core functionality support for jtag class devices
+ Hardware equipped with JTAG microcontroller which can be built
+ on top of this drivers. Driver exposes the set of IOCTL to the
+ user space for:
+ SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
+ SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
+ RUNTEST (Forces IEEE 1149.1 bus to a run state for specified
+ number of clocks).
+
+ If you want this support, you should say Y here.
+
+ To compile this driver as a module, choose M here: the module will
+ be called jtag.
+
diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
new file mode 100644
index 0000000..e811330
--- /dev/null
+++ b/drivers/jtag/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_JTAG) += jtag.o
+
diff --git a/drivers/jtag/jtag.c b/drivers/jtag/jtag.c
new file mode 100644
index 0000000..a933bc1
--- /dev/null
+++ b/drivers/jtag/jtag.c
@@ -0,0 +1,347 @@
+/*
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the names of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/jtag.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/rtnetlink.h>
+#include <linux/spinlock.h>
+#include <uapi/linux/jtag.h>
+
+struct jtag {
+ struct list_head list;
+ struct device *dev;
+ struct cdev cdev;
+ int id;
+ spinlock_t lock;
+ bool is_open;
+ const struct jtag_ops *ops;
+ unsigned long priv[0];
+};
+
+static dev_t jtag_devt;
+static LIST_HEAD(jtag_list);
+static DEFINE_MUTEX(jtag_mutex);
+static DEFINE_IDA(jtag_ida);
+
+void *jtag_priv(struct jtag *jtag)
+{
+ return jtag->priv;
+}
+EXPORT_SYMBOL_GPL(jtag_priv);
+
+static void *jtag_copy_from_user(void __user *udata, unsigned long bit_size)
+{
+ void *kdata;
+ unsigned long size;
+ unsigned long err;
+
+ size = DIV_ROUND_UP(bit_size, BITS_PER_BYTE);
+ kdata = kzalloc(size, GFP_KERNEL);
+ if (!kdata)
+ return NULL;
+
+ err = copy_from_user(kdata, udata, size);
+ if (!err)
+ return kdata;
+
+ kfree(kdata);
+ return NULL;
+}
+
+static unsigned long jtag_copy_to_user(void __user *udata, void *kdata,
+ unsigned long bit_size)
+{
+ unsigned long size;
+
+ size = DIV_ROUND_UP(bit_size, BITS_PER_BYTE);
+ return copy_to_user(udata, kdata, size);
+}
+
+static struct class jtag_class = {
+ .name = "jtag",
+ .owner = THIS_MODULE,
+};
+
+static int jtag_run_test_idle(struct jtag *jtag,
+ struct jtag_run_test_idle *idle)
+{
+ if (jtag->ops->idle)
+ return jtag->ops->idle(jtag, idle);
+ else
+ return -EOPNOTSUPP;
+}
+
+static int jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer)
+{
+ if (jtag->ops->xfer)
+ return jtag->ops->xfer(jtag, xfer);
+ else
+ return -EOPNOTSUPP;
+}
+
+static long jtag_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ struct jtag *jtag = file->private_data;
+ struct jtag_run_test_idle idle;
+ struct jtag_xfer xfer;
+ void *user_tdio_data;
+ unsigned long value;
+ int err;
+
+ switch (cmd) {
+ case JTAG_GIOCFREQ:
+ if (jtag->ops->freq_get)
+ err = jtag->ops->freq_get(jtag, &value);
+ else
+ err = -EOPNOTSUPP;
+ if (err)
+ break;
+
+ err = __put_user(value, (unsigned long __user *)arg);
+ break;
+
+ case JTAG_SIOCFREQ:
+ err = __get_user(value, (unsigned long __user *)arg);
+
+ if (value == 0)
+ err = -EINVAL;
+ if (err)
+ break;
+
+ if (jtag->ops->freq_set)
+ err = jtag->ops->freq_set(jtag, value);
+ else
+ err = -EOPNOTSUPP;
+ break;
+
+ case JTAG_IOCRUNTEST:
+ if (copy_from_user(&idle, (void __user *)arg,
+ sizeof(struct jtag_run_test_idle)))
+ return -ENOMEM;
+ err = jtag_run_test_idle(jtag, &idle);
+ break;
+
+ case JTAG_IOCXFER:
+ if (copy_from_user(&xfer, (void __user *)arg,
+ sizeof(struct jtag_xfer)))
+ return -EFAULT;
+
+ user_tdio_data = xfer.tdio;
+ xfer.tdio = jtag_copy_from_user((void __user *)user_tdio_data,
+ xfer.length);
+ if (!xfer.tdio)
+ return -ENOMEM;
+
+ err = jtag_xfer(jtag, &xfer);
+ if (jtag_copy_to_user((void __user *)user_tdio_data,
+ xfer.tdio, xfer.length)) {
+ kfree(xfer.tdio);
+ return -EFAULT;
+ }
+
+ kfree(xfer.tdio);
+ xfer.tdio = user_tdio_data;
+ if (copy_to_user((void __user *)arg, &xfer,
+ sizeof(struct jtag_xfer))) {
+ kfree(xfer.tdio);
+ return -EFAULT;
+ }
+ break;
+
+ case JTAG_GIOCSTATUS:
+ if (jtag->ops->status_get)
+ err = jtag->ops->status_get(jtag,
+ (enum jtag_endstate *)&value);
+ else
+ err = -EOPNOTSUPP;
+ if (err)
+ break;
+
+ err = __put_user(value, (unsigned int __user *)arg);
+ break;
+
+ default:
+ return -EINVAL;
+ }
+ return err;
+}
+
+static struct jtag *jtag_get_dev(int id)
+{
+ struct jtag *jtag;
+
+ mutex_lock(&jtag_mutex);
+ list_for_each_entry(jtag, &jtag_list, list) {
+ if (jtag->id == id)
+ goto found;
+ }
+ jtag = NULL;
+found:
+ mutex_unlock(&jtag_mutex);
+ return jtag;
+}
+
+static int jtag_open(struct inode *inode, struct file *file)
+{
+ struct jtag *jtag;
+ unsigned int minor = iminor(inode);
+
+ jtag = jtag_get_dev(minor);
+ if (!jtag)
+ return -ENODEV;
+
+ spin_lock(&jtag->lock);
+
+ if (jtag->is_open) {
+ dev_info(NULL, "jtag already opened\n");
+ spin_unlock(&jtag->lock);
+ return -EBUSY;
+ }
+
+ jtag->is_open = true;
+ file->private_data = jtag;
+ spin_unlock(&jtag->lock);
+ return 0;
+}
+
+static int jtag_release(struct inode *inode, struct file *file)
+{
+ struct jtag *jtag = file->private_data;
+
+ spin_lock(&jtag->lock);
+ jtag->is_open = false;
+ spin_unlock(&jtag->lock);
+ return 0;
+}
+
+static const struct file_operations jtag_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .unlocked_ioctl = jtag_ioctl,
+ .open = jtag_open,
+ .release = jtag_release,
+};
+
+struct jtag *jtag_alloc(size_t priv_size, const struct jtag_ops *ops)
+{
+ struct jtag *jtag = kzalloc(sizeof(*jtag) + priv_size, GFP_KERNEL);
+
+ if (!jtag)
+ return NULL;
+
+ jtag->ops = ops;
+ return jtag;
+}
+EXPORT_SYMBOL_GPL(jtag_alloc);
+
+void jtag_free(struct jtag *jtag)
+{
+ kfree(jtag);
+}
+EXPORT_SYMBOL_GPL(jtag_free);
+
+int jtag_register(struct jtag *jtag)
+{
+ int id;
+ int err;
+
+ id = ida_simple_get(&jtag_ida, 0, 0, GFP_KERNEL);
+ if (id < 0)
+ return id;
+
+ jtag->id = id;
+ cdev_init(&jtag->cdev, &jtag_fops);
+ jtag->cdev.owner = THIS_MODULE;
+ err = cdev_add(&jtag->cdev, MKDEV(MAJOR(jtag_devt), jtag->id), 1);
+ if (err)
+ goto err_cdev;
+
+ /* Register this jtag device with the driver core */
+ jtag->dev = device_create(&jtag_class, NULL, MKDEV(MAJOR(jtag_devt),
+ jtag->id), NULL, "jtag%d", jtag->id);
+ if (!jtag->dev)
+ goto err_device_create;
+
+ dev_set_drvdata(jtag->dev, jtag);
+ spin_lock_init(&jtag->lock);
+ mutex_lock(&jtag_mutex);
+ list_add_tail(&jtag->list, &jtag_list);
+ mutex_unlock(&jtag_mutex);
+ return err;
+
+err_device_create:
+ cdev_del(&jtag->cdev);
+err_cdev:
+ ida_simple_remove(&jtag_ida, id);
+ return err;
+}
+EXPORT_SYMBOL_GPL(jtag_register);
+
+void jtag_unregister(struct jtag *jtag)
+{
+ struct device *dev = jtag->dev;
+
+ mutex_lock(&jtag_mutex);
+ list_add_tail(&jtag->list, &jtag_list);
+ mutex_unlock(&jtag_mutex);
+ cdev_del(&jtag->cdev);
+ device_unregister(dev);
+ ida_simple_remove(&jtag_ida, jtag->id);
+}
+EXPORT_SYMBOL_GPL(jtag_unregister);
+
+static int __init jtag_init(void)
+{
+ int err;
+
+ err = alloc_chrdev_region(&jtag_devt, 0, 1, "jtag");
+ if (err)
+ return err;
+ return class_register(&jtag_class);
+}
+
+static void __exit jtag_exit(void)
+{
+ class_unregister(&jtag_class);
+}
+
+module_init(jtag_init);
+module_exit(jtag_exit);
+
+MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>");
+MODULE_DESCRIPTION("Generic jtag support");
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/include/linux/jtag.h b/include/linux/jtag.h
new file mode 100644
index 0000000..29c1076
--- /dev/null
+++ b/include/linux/jtag.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the names of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __JTAG_H
+#define __JTAG_H
+
+#include <uapi/linux/jtag.h>
+
+struct jtag;
+/**
+ * struct jtag_ops - callbacks for jtag control functions:
+ *
+ * @freq_get: get frequency function. Filled by device driver
+ * @freq_set: set frequency function. Filled by device driver
+ * @status_get: set status function. Filled by device driver
+ * @idle: set JTAG to idle state function. Filled by device driver
+ * @xfer: send JTAG xfer function. Filled by device driver
+ */
+struct jtag_ops {
+ int (*freq_get)(struct jtag *jtag, unsigned long *freq);
+ int (*freq_set)(struct jtag *jtag, unsigned long freq);
+ int (*status_get)(struct jtag *jtag, enum jtag_endstate *state);
+ int (*idle)(struct jtag *jtag, struct jtag_run_test_idle *idle);
+ int (*xfer)(struct jtag *jtag, struct jtag_xfer *xfer);
+};
+
+void *jtag_priv(struct jtag *jtag);
+int jtag_register(struct jtag *jtag);
+void jtag_unregister(struct jtag *jtag);
+struct jtag *jtag_alloc(size_t priv_size, const struct jtag_ops *ops);
+void jtag_free(struct jtag *jtag);
+
+#endif /* __JTAG_H */
diff --git a/include/uapi/linux/jtag.h b/include/uapi/linux/jtag.h
new file mode 100644
index 0000000..70789ec
--- /dev/null
+++ b/include/uapi/linux/jtag.h
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the names of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __UAPI_LINUX_JTAG_H
+#define __UAPI_LINUX_JTAG_H
+
+/**
+ * enum jtag_xfer_mode:
+ *
+ * @JTAG_XFER_HW_MODE: hardware mode transfer
+ * @JTAG_XFER_SW_MODE: software mode transfer
+ */
+enum jtag_xfer_mode {
+ JTAG_XFER_HW_MODE,
+ JTAG_XFER_SW_MODE,
+};
+
+/**
+ * enum jtag_endstate:
+ *
+ * @JTAG_STATE_IDLE: JTAG state machine IDLE state
+ * @JTAG_STATE_PAUSEIR: JTAG state machine PAUSE_IR state
+ * @JTAG_STATE_PAUSEDR: JTAG state machine PAUSE_DR state
+ */
+enum jtag_endstate {
+ JTAG_STATE_IDLE,
+ JTAG_STATE_PAUSEIR,
+ JTAG_STATE_PAUSEDR,
+};
+
+/**
+ * enum jtag_xfer_type:
+ *
+ * @JTAG_SIR_XFER: SIR transfer
+ * @JTAG_SDR_XFER: SDR transfer
+ */
+enum jtag_xfer_type {
+ JTAG_SIR_XFER,
+ JTAG_SDR_XFER,
+};
+
+/**
+ * enum jtag_xfer_direction:
+ *
+ * @JTAG_READ_XFER: read transfer
+ * @JTAG_WRITE_XFER: write transfer
+ */
+enum jtag_xfer_direction {
+ JTAG_READ_XFER,
+ JTAG_WRITE_XFER,
+};
+
+/**
+ * struct jtag_run_test_idle - forces JTAG sm to
+ * RUN_TEST/IDLE state *
+ * @mode: access mode
+ * @reset: 0 - run IDEL/PAUSE from current state
+ * 1 - go trough TEST_LOGIC/RESET state before IDEL/PAUSE
+ * @end: completion flag
+ * @tck: clock counter
+ *
+ * Structure represents interface to JTAG device for jtag idle
+ * execution.
+ */
+struct jtag_run_test_idle {
+ enum jtag_xfer_mode mode;
+ unsigned char reset;
+ enum jtag_endstate endstate;
+ unsigned char tck;
+};
+
+/**
+ * struct jtag_xfer - jtag xfer:
+ *
+ * @mode: access mode
+ * @type: transfer type
+ * @direction: xfer direction
+ * @length: xfer bits len
+ * @tdio : xfer data array
+ * @endir: xfer end state
+ *
+ * Structure represents interface to Aspeed JTAG device for jtag sdr xfer
+ * execution.
+ */
+struct jtag_xfer {
+ enum jtag_xfer_mode mode;
+ enum jtag_xfer_type type;
+ enum jtag_xfer_direction direction;
+ unsigned short length;
+ char *tdio;
+ enum jtag_endstate endstate;
+};
+
+#define __JTAG_IOCTL_MAGIC 0xb2
+
+#define JTAG_IOCRUNTEST _IOW(__JTAG_IOCTL_MAGIC, 0,\
+ struct jtag_run_test_idle)
+#define JTAG_SIOCFREQ _IOW(__JTAG_IOCTL_MAGIC, 1, unsigned int)
+#define JTAG_GIOCFREQ _IOR(__JTAG_IOCTL_MAGIC, 2, unsigned int)
+#define JTAG_IOCXFER _IOWR(__JTAG_IOCTL_MAGIC, 3, struct jtag_xfer)
+#define JTAG_GIOCSTATUS _IOWR(__JTAG_IOCTL_MAGIC, 4, enum jtag_endstate)
+
+#endif /* __UAPI_LINUX_JTAG_H */
--
1.7.1
^ permalink raw reply related [flat|nested] 55+ messages in thread
* [patch v1 1/2] drivers: jtag: Add JTAG core driver
@ 2017-08-02 13:18 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-02 13:18 UTC (permalink / raw)
To: linux-arm-kernel
JTAG class driver provide infrastructure to support hardware/software
JTAG platform drivers. It provide user layer API interface for flashing
and debugging external devices which equipped with JTAG interface
using standard transactions.
Driver exposes set of IOCTL to user space for:
- XFER:
- SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
- SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
number of clocks).
- SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency.
Driver core provides set of internal APIs for allocation and
registration:
- jtag_register;
- jtag_unregister;
- jtag_alloc;
- jtag_free;
Platform driver on registration with jtag-core creates the next
entry in dev folder:
/dev/jtagX
Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
Documentation/ioctl/ioctl-number.txt | 2 +
MAINTAINERS | 8 +
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/jtag/Kconfig | 18 ++
drivers/jtag/Makefile | 2 +
drivers/jtag/jtag.c | 347 ++++++++++++++++++++++++++++++++++
include/linux/jtag.h | 63 ++++++
include/uapi/linux/jtag.h | 133 +++++++++++++
9 files changed, 576 insertions(+), 0 deletions(-)
create mode 100644 drivers/jtag/Kconfig
create mode 100644 drivers/jtag/Makefile
create mode 100644 drivers/jtag/jtag.c
create mode 100644 include/linux/jtag.h
create mode 100644 include/uapi/linux/jtag.h
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
index 3e3fdae..1af2508 100644
--- a/Documentation/ioctl/ioctl-number.txt
+++ b/Documentation/ioctl/ioctl-number.txt
@@ -321,6 +321,8 @@ Code Seq#(hex) Include File Comments
0xB0 all RATIO devices in development:
<mailto:vgo@ratio.de>
0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
+0xB2 00-0f linux/jtag.h JTAG driver
+ <mailto:oleksandrs@mellanox.com>
0xB3 00 linux/mmc/ioctl.h
0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org>
0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc@vger.kernel.org>
diff --git a/MAINTAINERS b/MAINTAINERS
index 205d397..141aeaf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7292,6 +7292,14 @@ L: linux-serial at vger.kernel.org
S: Maintained
F: drivers/tty/serial/jsm/
+JTAG SUBSYSTEM
+M: Oleksandr Shamray <oleksandrs@mellanox.com>
+M: Vadim Pasternak <vadimp@mellanox.com>
+S: Maintained
+F: include/linux/jtag.h
+F: include/uapi/linux/jtag.h
+F: drivers/jtag/
+
K10TEMP HARDWARE MONITORING DRIVER
M: Clemens Ladisch <clemens@ladisch.de>
L: linux-hwmon at vger.kernel.org
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 505c676..2214678 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -208,4 +208,6 @@ source "drivers/tee/Kconfig"
source "drivers/mux/Kconfig"
+source "drivers/jtag/Kconfig"
+
endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index dfdcda0..6a2059b 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -182,3 +182,4 @@ obj-$(CONFIG_FPGA) += fpga/
obj-$(CONFIG_FSI) += fsi/
obj-$(CONFIG_TEE) += tee/
obj-$(CONFIG_MULTIPLEXER) += mux/
+obj-$(CONFIG_JTAG) += jtag/
diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
new file mode 100644
index 0000000..a8d0149
--- /dev/null
+++ b/drivers/jtag/Kconfig
@@ -0,0 +1,18 @@
+menuconfig JTAG
+ tristate "JTAG support"
+ default n
+ ---help---
+ This provides basic core functionality support for jtag class devices
+ Hardware equipped with JTAG microcontroller which can be built
+ on top of this drivers. Driver exposes the set of IOCTL to the
+ user space for:
+ SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
+ SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
+ RUNTEST (Forces IEEE 1149.1 bus to a run state for specified
+ number of clocks).
+
+ If you want this support, you should say Y here.
+
+ To compile this driver as a module, choose M here: the module will
+ be called jtag.
+
diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
new file mode 100644
index 0000000..e811330
--- /dev/null
+++ b/drivers/jtag/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_JTAG) += jtag.o
+
diff --git a/drivers/jtag/jtag.c b/drivers/jtag/jtag.c
new file mode 100644
index 0000000..a933bc1
--- /dev/null
+++ b/drivers/jtag/jtag.c
@@ -0,0 +1,347 @@
+/*
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the names of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/jtag.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/rtnetlink.h>
+#include <linux/spinlock.h>
+#include <uapi/linux/jtag.h>
+
+struct jtag {
+ struct list_head list;
+ struct device *dev;
+ struct cdev cdev;
+ int id;
+ spinlock_t lock;
+ bool is_open;
+ const struct jtag_ops *ops;
+ unsigned long priv[0];
+};
+
+static dev_t jtag_devt;
+static LIST_HEAD(jtag_list);
+static DEFINE_MUTEX(jtag_mutex);
+static DEFINE_IDA(jtag_ida);
+
+void *jtag_priv(struct jtag *jtag)
+{
+ return jtag->priv;
+}
+EXPORT_SYMBOL_GPL(jtag_priv);
+
+static void *jtag_copy_from_user(void __user *udata, unsigned long bit_size)
+{
+ void *kdata;
+ unsigned long size;
+ unsigned long err;
+
+ size = DIV_ROUND_UP(bit_size, BITS_PER_BYTE);
+ kdata = kzalloc(size, GFP_KERNEL);
+ if (!kdata)
+ return NULL;
+
+ err = copy_from_user(kdata, udata, size);
+ if (!err)
+ return kdata;
+
+ kfree(kdata);
+ return NULL;
+}
+
+static unsigned long jtag_copy_to_user(void __user *udata, void *kdata,
+ unsigned long bit_size)
+{
+ unsigned long size;
+
+ size = DIV_ROUND_UP(bit_size, BITS_PER_BYTE);
+ return copy_to_user(udata, kdata, size);
+}
+
+static struct class jtag_class = {
+ .name = "jtag",
+ .owner = THIS_MODULE,
+};
+
+static int jtag_run_test_idle(struct jtag *jtag,
+ struct jtag_run_test_idle *idle)
+{
+ if (jtag->ops->idle)
+ return jtag->ops->idle(jtag, idle);
+ else
+ return -EOPNOTSUPP;
+}
+
+static int jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer)
+{
+ if (jtag->ops->xfer)
+ return jtag->ops->xfer(jtag, xfer);
+ else
+ return -EOPNOTSUPP;
+}
+
+static long jtag_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ struct jtag *jtag = file->private_data;
+ struct jtag_run_test_idle idle;
+ struct jtag_xfer xfer;
+ void *user_tdio_data;
+ unsigned long value;
+ int err;
+
+ switch (cmd) {
+ case JTAG_GIOCFREQ:
+ if (jtag->ops->freq_get)
+ err = jtag->ops->freq_get(jtag, &value);
+ else
+ err = -EOPNOTSUPP;
+ if (err)
+ break;
+
+ err = __put_user(value, (unsigned long __user *)arg);
+ break;
+
+ case JTAG_SIOCFREQ:
+ err = __get_user(value, (unsigned long __user *)arg);
+
+ if (value == 0)
+ err = -EINVAL;
+ if (err)
+ break;
+
+ if (jtag->ops->freq_set)
+ err = jtag->ops->freq_set(jtag, value);
+ else
+ err = -EOPNOTSUPP;
+ break;
+
+ case JTAG_IOCRUNTEST:
+ if (copy_from_user(&idle, (void __user *)arg,
+ sizeof(struct jtag_run_test_idle)))
+ return -ENOMEM;
+ err = jtag_run_test_idle(jtag, &idle);
+ break;
+
+ case JTAG_IOCXFER:
+ if (copy_from_user(&xfer, (void __user *)arg,
+ sizeof(struct jtag_xfer)))
+ return -EFAULT;
+
+ user_tdio_data = xfer.tdio;
+ xfer.tdio = jtag_copy_from_user((void __user *)user_tdio_data,
+ xfer.length);
+ if (!xfer.tdio)
+ return -ENOMEM;
+
+ err = jtag_xfer(jtag, &xfer);
+ if (jtag_copy_to_user((void __user *)user_tdio_data,
+ xfer.tdio, xfer.length)) {
+ kfree(xfer.tdio);
+ return -EFAULT;
+ }
+
+ kfree(xfer.tdio);
+ xfer.tdio = user_tdio_data;
+ if (copy_to_user((void __user *)arg, &xfer,
+ sizeof(struct jtag_xfer))) {
+ kfree(xfer.tdio);
+ return -EFAULT;
+ }
+ break;
+
+ case JTAG_GIOCSTATUS:
+ if (jtag->ops->status_get)
+ err = jtag->ops->status_get(jtag,
+ (enum jtag_endstate *)&value);
+ else
+ err = -EOPNOTSUPP;
+ if (err)
+ break;
+
+ err = __put_user(value, (unsigned int __user *)arg);
+ break;
+
+ default:
+ return -EINVAL;
+ }
+ return err;
+}
+
+static struct jtag *jtag_get_dev(int id)
+{
+ struct jtag *jtag;
+
+ mutex_lock(&jtag_mutex);
+ list_for_each_entry(jtag, &jtag_list, list) {
+ if (jtag->id == id)
+ goto found;
+ }
+ jtag = NULL;
+found:
+ mutex_unlock(&jtag_mutex);
+ return jtag;
+}
+
+static int jtag_open(struct inode *inode, struct file *file)
+{
+ struct jtag *jtag;
+ unsigned int minor = iminor(inode);
+
+ jtag = jtag_get_dev(minor);
+ if (!jtag)
+ return -ENODEV;
+
+ spin_lock(&jtag->lock);
+
+ if (jtag->is_open) {
+ dev_info(NULL, "jtag already opened\n");
+ spin_unlock(&jtag->lock);
+ return -EBUSY;
+ }
+
+ jtag->is_open = true;
+ file->private_data = jtag;
+ spin_unlock(&jtag->lock);
+ return 0;
+}
+
+static int jtag_release(struct inode *inode, struct file *file)
+{
+ struct jtag *jtag = file->private_data;
+
+ spin_lock(&jtag->lock);
+ jtag->is_open = false;
+ spin_unlock(&jtag->lock);
+ return 0;
+}
+
+static const struct file_operations jtag_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .unlocked_ioctl = jtag_ioctl,
+ .open = jtag_open,
+ .release = jtag_release,
+};
+
+struct jtag *jtag_alloc(size_t priv_size, const struct jtag_ops *ops)
+{
+ struct jtag *jtag = kzalloc(sizeof(*jtag) + priv_size, GFP_KERNEL);
+
+ if (!jtag)
+ return NULL;
+
+ jtag->ops = ops;
+ return jtag;
+}
+EXPORT_SYMBOL_GPL(jtag_alloc);
+
+void jtag_free(struct jtag *jtag)
+{
+ kfree(jtag);
+}
+EXPORT_SYMBOL_GPL(jtag_free);
+
+int jtag_register(struct jtag *jtag)
+{
+ int id;
+ int err;
+
+ id = ida_simple_get(&jtag_ida, 0, 0, GFP_KERNEL);
+ if (id < 0)
+ return id;
+
+ jtag->id = id;
+ cdev_init(&jtag->cdev, &jtag_fops);
+ jtag->cdev.owner = THIS_MODULE;
+ err = cdev_add(&jtag->cdev, MKDEV(MAJOR(jtag_devt), jtag->id), 1);
+ if (err)
+ goto err_cdev;
+
+ /* Register this jtag device with the driver core */
+ jtag->dev = device_create(&jtag_class, NULL, MKDEV(MAJOR(jtag_devt),
+ jtag->id), NULL, "jtag%d", jtag->id);
+ if (!jtag->dev)
+ goto err_device_create;
+
+ dev_set_drvdata(jtag->dev, jtag);
+ spin_lock_init(&jtag->lock);
+ mutex_lock(&jtag_mutex);
+ list_add_tail(&jtag->list, &jtag_list);
+ mutex_unlock(&jtag_mutex);
+ return err;
+
+err_device_create:
+ cdev_del(&jtag->cdev);
+err_cdev:
+ ida_simple_remove(&jtag_ida, id);
+ return err;
+}
+EXPORT_SYMBOL_GPL(jtag_register);
+
+void jtag_unregister(struct jtag *jtag)
+{
+ struct device *dev = jtag->dev;
+
+ mutex_lock(&jtag_mutex);
+ list_add_tail(&jtag->list, &jtag_list);
+ mutex_unlock(&jtag_mutex);
+ cdev_del(&jtag->cdev);
+ device_unregister(dev);
+ ida_simple_remove(&jtag_ida, jtag->id);
+}
+EXPORT_SYMBOL_GPL(jtag_unregister);
+
+static int __init jtag_init(void)
+{
+ int err;
+
+ err = alloc_chrdev_region(&jtag_devt, 0, 1, "jtag");
+ if (err)
+ return err;
+ return class_register(&jtag_class);
+}
+
+static void __exit jtag_exit(void)
+{
+ class_unregister(&jtag_class);
+}
+
+module_init(jtag_init);
+module_exit(jtag_exit);
+
+MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>");
+MODULE_DESCRIPTION("Generic jtag support");
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/include/linux/jtag.h b/include/linux/jtag.h
new file mode 100644
index 0000000..29c1076
--- /dev/null
+++ b/include/linux/jtag.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the names of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __JTAG_H
+#define __JTAG_H
+
+#include <uapi/linux/jtag.h>
+
+struct jtag;
+/**
+ * struct jtag_ops - callbacks for jtag control functions:
+ *
+ * @freq_get: get frequency function. Filled by device driver
+ * @freq_set: set frequency function. Filled by device driver
+ * @status_get: set status function. Filled by device driver
+ * @idle: set JTAG to idle state function. Filled by device driver
+ * @xfer: send JTAG xfer function. Filled by device driver
+ */
+struct jtag_ops {
+ int (*freq_get)(struct jtag *jtag, unsigned long *freq);
+ int (*freq_set)(struct jtag *jtag, unsigned long freq);
+ int (*status_get)(struct jtag *jtag, enum jtag_endstate *state);
+ int (*idle)(struct jtag *jtag, struct jtag_run_test_idle *idle);
+ int (*xfer)(struct jtag *jtag, struct jtag_xfer *xfer);
+};
+
+void *jtag_priv(struct jtag *jtag);
+int jtag_register(struct jtag *jtag);
+void jtag_unregister(struct jtag *jtag);
+struct jtag *jtag_alloc(size_t priv_size, const struct jtag_ops *ops);
+void jtag_free(struct jtag *jtag);
+
+#endif /* __JTAG_H */
diff --git a/include/uapi/linux/jtag.h b/include/uapi/linux/jtag.h
new file mode 100644
index 0000000..70789ec
--- /dev/null
+++ b/include/uapi/linux/jtag.h
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the names of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __UAPI_LINUX_JTAG_H
+#define __UAPI_LINUX_JTAG_H
+
+/**
+ * enum jtag_xfer_mode:
+ *
+ * @JTAG_XFER_HW_MODE: hardware mode transfer
+ * @JTAG_XFER_SW_MODE: software mode transfer
+ */
+enum jtag_xfer_mode {
+ JTAG_XFER_HW_MODE,
+ JTAG_XFER_SW_MODE,
+};
+
+/**
+ * enum jtag_endstate:
+ *
+ * @JTAG_STATE_IDLE: JTAG state machine IDLE state
+ * @JTAG_STATE_PAUSEIR: JTAG state machine PAUSE_IR state
+ * @JTAG_STATE_PAUSEDR: JTAG state machine PAUSE_DR state
+ */
+enum jtag_endstate {
+ JTAG_STATE_IDLE,
+ JTAG_STATE_PAUSEIR,
+ JTAG_STATE_PAUSEDR,
+};
+
+/**
+ * enum jtag_xfer_type:
+ *
+ * @JTAG_SIR_XFER: SIR transfer
+ * @JTAG_SDR_XFER: SDR transfer
+ */
+enum jtag_xfer_type {
+ JTAG_SIR_XFER,
+ JTAG_SDR_XFER,
+};
+
+/**
+ * enum jtag_xfer_direction:
+ *
+ * @JTAG_READ_XFER: read transfer
+ * @JTAG_WRITE_XFER: write transfer
+ */
+enum jtag_xfer_direction {
+ JTAG_READ_XFER,
+ JTAG_WRITE_XFER,
+};
+
+/**
+ * struct jtag_run_test_idle - forces JTAG sm to
+ * RUN_TEST/IDLE state *
+ * @mode: access mode
+ * @reset: 0 - run IDEL/PAUSE from current state
+ * 1 - go trough TEST_LOGIC/RESET state before IDEL/PAUSE
+ * @end: completion flag
+ * @tck: clock counter
+ *
+ * Structure represents interface to JTAG device for jtag idle
+ * execution.
+ */
+struct jtag_run_test_idle {
+ enum jtag_xfer_mode mode;
+ unsigned char reset;
+ enum jtag_endstate endstate;
+ unsigned char tck;
+};
+
+/**
+ * struct jtag_xfer - jtag xfer:
+ *
+ * @mode: access mode
+ * @type: transfer type
+ * @direction: xfer direction
+ * @length: xfer bits len
+ * @tdio : xfer data array
+ * @endir: xfer end state
+ *
+ * Structure represents interface to Aspeed JTAG device for jtag sdr xfer
+ * execution.
+ */
+struct jtag_xfer {
+ enum jtag_xfer_mode mode;
+ enum jtag_xfer_type type;
+ enum jtag_xfer_direction direction;
+ unsigned short length;
+ char *tdio;
+ enum jtag_endstate endstate;
+};
+
+#define __JTAG_IOCTL_MAGIC 0xb2
+
+#define JTAG_IOCRUNTEST _IOW(__JTAG_IOCTL_MAGIC, 0,\
+ struct jtag_run_test_idle)
+#define JTAG_SIOCFREQ _IOW(__JTAG_IOCTL_MAGIC, 1, unsigned int)
+#define JTAG_GIOCFREQ _IOR(__JTAG_IOCTL_MAGIC, 2, unsigned int)
+#define JTAG_IOCXFER _IOWR(__JTAG_IOCTL_MAGIC, 3, struct jtag_xfer)
+#define JTAG_GIOCSTATUS _IOWR(__JTAG_IOCTL_MAGIC, 4, enum jtag_endstate)
+
+#endif /* __UAPI_LINUX_JTAG_H */
--
1.7.1
^ permalink raw reply related [flat|nested] 55+ messages in thread
* [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
2017-08-02 13:18 ` Oleksandr Shamray
@ 2017-08-02 13:18 ` Oleksandr Shamray
-1 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-02 13:18 UTC (permalink / raw)
To: gregkh, arnd
Cc: linux-kernel, linux-arm-kernel, devicetree, openbmc, joel, jiri,
tklauser, linux-serial, mec, vadimp, system-sw-low-level,
Oleksandr Shamray, Jiri Pirko
Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
Driver implements the following jtag ops:
- freq_get;
- freq_set;
- status_get;
- idle;
- xfer;
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/jtag/Kconfig | 13 +
drivers/jtag/Makefile | 1 +
drivers/jtag/jtag-aspeed.c | 802 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 816 insertions(+), 0 deletions(-)
create mode 100644 drivers/jtag/jtag-aspeed.c
diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
index a8d0149..7bf709c 100644
--- a/drivers/jtag/Kconfig
+++ b/drivers/jtag/Kconfig
@@ -16,3 +16,16 @@ menuconfig JTAG
To compile this driver as a module, choose M here: the module will
be called jtag.
+menuconfig JTAG_ASPEED
+ tristate "Aspeed SoC JTAG controller support"
+ depends on JTAG
+ ---help---
+ This provides a support for Aspeed JTAG device, equipped on
+ Aspeed SoC 24xx and 25xx families. Drivers allows programming
+ of hardware devices, connected to SoC through the JTAG interface.
+
+ If you want this support, you should say Y here.
+
+ To compile this driver as a module, choose M here: the module will
+ be called aspeed_jtag.
+
diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
index e811330..e9fa7fa 100644
--- a/drivers/jtag/Makefile
+++ b/drivers/jtag/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_JTAG) += jtag.o
+obj-$(CONFIG_JTAG_ASPEED) += jtag-aspeed.o
diff --git a/drivers/jtag/jtag-aspeed.c b/drivers/jtag/jtag-aspeed.c
new file mode 100644
index 0000000..b820824
--- /dev/null
+++ b/drivers/jtag/jtag-aspeed.c
@@ -0,0 +1,802 @@
+/*
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the names of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <linux/jtag.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <uapi/linux/jtag.h>
+
+#define ASPEED_JTAG_DATA 0x00
+#define ASPEED_JTAG_INST 0x04
+#define ASPEED_JTAG_CTRL 0x08
+#define ASPEED_JTAG_ISR 0x0C
+#define ASPEED_JTAG_SW 0x10
+#define ASPEED_JTAG_TCK 0x14
+#define ASPEED_JTAG_EC 0x18
+
+#define ASPEED_JTAG_DATA_MSB 0x01
+#define ASPEED_JTAG_DATA_CHUNK_SIZE 0x20
+
+/* ASPEED_JTAG_CTRL: Engine Control */
+#define ASPEED_JTAG_CTL_ENG_EN BIT(31)
+#define ASPEED_JTAG_CTL_ENG_OUT_EN BIT(30)
+#define ASPEED_JTAG_CTL_FORCE_TMS BIT(29)
+#define ASPEED_JTAG_CTL_INST_LEN(x) ((x) << 20)
+#define ASPEED_JTAG_CTL_LASPEED_INST BIT(17)
+#define ASPEED_JTAG_CTL_INST_EN BIT(16)
+#define ASPEED_JTAG_CTL_DR_UPDATE BIT(10)
+#define ASPEED_JTAG_CTL_DATA_LEN(x) ((x) << 4)
+#define ASPEED_JTAG_CTL_LASPEED_DATA BIT(1)
+#define ASPEED_JTAG_CTL_DATA_EN BIT(0)
+
+/* ASPEED_JTAG_ISR : Interrupt status and enable */
+#define ASPEED_JTAG_ISR_INST_PAUSE BIT(19)
+#define ASPEED_JTAG_ISR_INST_COMPLETE BIT(18)
+#define ASPEED_JTAG_ISR_DATA_PAUSE BIT(17)
+#define ASPEED_JTAG_ISR_DATA_COMPLETE BIT(16)
+#define ASPEED_JTAG_ISR_INST_PAUSE_EN BIT(3)
+#define ASPEED_JTAG_ISR_INST_COMPLETE_EN BIT(2)
+#define ASPEED_JTAG_ISR_DATA_PAUSE_EN BIT(1)
+#define ASPEED_JTAG_ISR_DATA_COMPLETE_EN BIT(0)
+#define ASPEED_JTAG_ISR_INT_EN_MASK GENMASK(3, 0)
+#define ASPEED_JTAG_ISR_INT_MASK GENMASK(19, 16)
+
+/* ASPEED_JTAG_SW : Software Mode and Status */
+#define ASPEED_JTAG_SW_MODE_EN BIT(19)
+#define ASPEED_JTAG_SW_MODE_TCK BIT(18)
+#define ASPEED_JTAG_SW_MODE_TMS BIT(17)
+#define ASPEED_JTAG_SW_MODE_TDIO BIT(16)
+
+/* ASPEED_JTAG_TCK : TCK Control */
+#define ASPEED_JTAG_TCK_DIVISOR_MASK GENMASK(10, 0)
+#define ASPEED_JTAG_TCK_GET_DIV(x) ((x) & ASPEED_JTAG_TCK_DIVISOR_MASK)
+
+/* ASPEED_JTAG_EC : Controller set for go to IDLE */
+#define ASPEED_JTAG_EC_GO_IDLE BIT(0)
+
+#define ASPEED_JTAG_IOUT_LEN(len) (ASPEED_JTAG_CTL_ENG_EN |\
+ ASPEED_JTAG_CTL_ENG_OUT_EN |\
+ ASPEED_JTAG_CTL_INST_LEN(len))
+
+#define ASPEED_JTAG_DOUT_LEN(len) (ASPEED_JTAG_CTL_ENG_EN |\
+ ASPEED_JTAG_CTL_ENG_OUT_EN |\
+ ASPEED_JTAG_CTL_DATA_LEN(len))
+
+#define ASPEED_JTAG_TCK_WAIT 10
+#define ASPEED_JTAG_RESET_CNTR 10
+
+#define ASPEED_JTAG_NAME "jtag-aspeed"
+
+static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq);
+static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq);
+static int aspeed_jtag_status_get(struct jtag *jtag,
+ enum jtag_endstate *status);
+static int aspeed_jtag_idle(struct jtag *jtag,
+ struct jtag_run_test_idle *runtest);
+static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer);
+
+struct aspeed_jtag {
+ void __iomem *reg_base;
+ struct device *dev;
+ struct clk *pclk;
+ enum jtag_endstate status;
+ int irq;
+ u32 flag;
+ wait_queue_head_t jtag_wq;
+ bool is_open;
+};
+
+static char *end_status_str[] = {"idle", "ir pause", "drpause"};
+
+static struct jtag_ops aspeed_jtag_ops = {
+ .freq_get = aspeed_jtag_freq_get,
+ .freq_set = aspeed_jtag_freq_set,
+ .status_get = aspeed_jtag_status_get,
+ .idle = aspeed_jtag_idle,
+ .xfer = aspeed_jtag_xfer
+};
+
+static u32 aspeed_jtag_read(struct aspeed_jtag *aspeed_jtag, u32 reg)
+{
+ return readl(aspeed_jtag->reg_base + reg);
+}
+
+static void
+aspeed_jtag_write(struct aspeed_jtag *aspeed_jtag, u32 val, u32 reg)
+{
+ writel(val, aspeed_jtag->reg_base + reg);
+}
+
+static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq)
+{
+ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
+ u16 div;
+ u32 tck_val;
+ unsigned long apb_frq;
+
+ apb_frq = clk_get_rate(aspeed_jtag->pclk);
+ div = (apb_frq % freq == 0) ? (apb_frq / freq) - 1 : (apb_frq / freq);
+ tck_val = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK);
+ aspeed_jtag_write(aspeed_jtag,
+ (tck_val & ASPEED_JTAG_TCK_DIVISOR_MASK) | div,
+ ASPEED_JTAG_TCK);
+ return 0;
+}
+
+static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq)
+{
+ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
+ u32 pclk;
+ u32 tck;
+
+ pclk = clk_get_rate(aspeed_jtag->pclk);
+ tck = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK);
+ *frq = pclk / (ASPEED_JTAG_TCK_GET_DIV(tck) + 1);
+
+ return 0;
+}
+
+static void aspeed_jtag_sw_delay(struct aspeed_jtag *aspeed_jtag, int cnt)
+{
+ int i;
+
+ for (i = 0; i < cnt; i++)
+ aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW);
+}
+
+static char aspeed_jtag_tck_cycle(struct aspeed_jtag *aspeed_jtag,
+ u8 tms, u8 tdi)
+{
+ char tdo = 0;
+
+ /* TCK = 0 */
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ (tms * ASPEED_JTAG_SW_MODE_TMS) |
+ (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
+
+ aspeed_jtag_sw_delay(aspeed_jtag, ASPEED_JTAG_TCK_WAIT);
+
+ /* TCK = 1 */
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ ASPEED_JTAG_SW_MODE_TCK |
+ (tms * ASPEED_JTAG_SW_MODE_TMS) |
+ (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
+
+ if (aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW) &
+ ASPEED_JTAG_SW_MODE_TDIO)
+ tdo = 1;
+
+ aspeed_jtag_sw_delay(aspeed_jtag, ASPEED_JTAG_TCK_WAIT);
+
+ /* TCK = 0 */
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ (tms * ASPEED_JTAG_SW_MODE_TMS) |
+ (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
+ return tdo;
+}
+
+static void aspeed_jtag_wait_instruction_pause(struct aspeed_jtag *aspeed_jtag)
+{
+ wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
+ ASPEED_JTAG_ISR_INST_PAUSE);
+ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_PAUSE;
+}
+
+static void
+aspeed_jtag_wait_instruction_complete(struct aspeed_jtag *aspeed_jtag)
+{
+ wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
+ ASPEED_JTAG_ISR_INST_COMPLETE);
+ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_COMPLETE;
+}
+
+static void
+aspeed_jtag_wait_data_pause_complete(struct aspeed_jtag *aspeed_jtag)
+{
+ wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
+ ASPEED_JTAG_ISR_DATA_PAUSE);
+ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_PAUSE;
+}
+
+static void aspeed_jtag_wait_data_complete(struct aspeed_jtag *aspeed_jtag)
+{
+ wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
+ ASPEED_JTAG_ISR_DATA_COMPLETE);
+ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_COMPLETE;
+}
+
+static void aspeed_jtag_sm_cycle(struct aspeed_jtag *aspeed_jtag, u8 *tms,
+ int len)
+{
+ int i;
+
+ for (i = 0; i < len; i++)
+ aspeed_jtag_tck_cycle(aspeed_jtag, tms[i], 0);
+}
+
+static void aspeed_jtag_run_test_idle_sw(struct aspeed_jtag *aspeed_jtag,
+ struct jtag_run_test_idle *runtest)
+{
+ char sm_pause_irpause[] = {1, 1, 1, 1, 0, 1, 0};
+ char sm_pause_drpause[] = {1, 1, 1, 0, 1, 0};
+ char sm_idle_irpause[] = {1, 1, 0, 1, 0};
+ char sm_idle_drpause[] = {1, 0, 1, 0};
+ char sm_pause_idle[] = {1, 1, 0};
+ int i;
+
+ /* SW mode from idle/pause-> to pause/idle */
+ if (runtest->reset) {
+ for (i = 0; i < ASPEED_JTAG_RESET_CNTR; i++)
+ aspeed_jtag_tck_cycle(aspeed_jtag, 1, 0);
+ }
+
+ switch (aspeed_jtag->status) {
+ case JTAG_STATE_IDLE:
+ switch (runtest->endstate) {
+ case JTAG_STATE_PAUSEIR:
+ /* ->DRSCan->IRSCan->IRCap->IRExit1->PauseIR */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_idle_irpause,
+ sizeof(sm_idle_irpause));
+
+ aspeed_jtag->status = JTAG_STATE_PAUSEIR;
+ break;
+ case JTAG_STATE_PAUSEDR:
+ /* ->DRSCan->DRCap->DRExit1->PauseDR */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_idle_drpause,
+ sizeof(sm_idle_drpause));
+
+ aspeed_jtag->status = JTAG_STATE_PAUSEDR;
+ break;
+ case JTAG_STATE_IDLE:
+ /* IDLE */
+ aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
+ aspeed_jtag->status = JTAG_STATE_IDLE;
+ break;
+ default:
+ break;
+ }
+ break;
+
+ case JTAG_STATE_PAUSEIR:
+ /* Fall-through */
+ case JTAG_STATE_PAUSEDR:
+ /* From IR/DR Pause */
+ switch (runtest->endstate) {
+ case JTAG_STATE_PAUSEIR:
+ /*
+ * to Exit2 IR/DR->Updt IR/DR->DRSCan->IRSCan->IRCap->
+ * IRExit1->PauseIR
+ */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_irpause,
+ sizeof(sm_pause_irpause));
+
+ aspeed_jtag->status = JTAG_STATE_PAUSEIR;
+ break;
+ case JTAG_STATE_PAUSEDR:
+ /*
+ * to Exit2 IR/DR->Updt IR/DR->DRSCan->DRCap->
+ * DRExit1->PauseDR
+ */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_drpause,
+ sizeof(sm_pause_drpause));
+ aspeed_jtag->status = JTAG_STATE_PAUSEDR;
+ break;
+ case JTAG_STATE_IDLE:
+ /* to Exit2 IR/DR->Updt IR/DR->IDLE */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_idle,
+ sizeof(sm_pause_idle));
+ aspeed_jtag->status = JTAG_STATE_IDLE;
+ break;
+ default:
+ break;
+ }
+ break;
+
+ default:
+ dev_err(aspeed_jtag->dev, "aspeed_jtag_run_test_idle error\n");
+ break;
+ }
+
+ /* Stay on IDLE for at least TCK cycle */
+ for (i = 0; i < runtest->tck; i++)
+ aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
+}
+
+/**
+ * aspeed_jtag_run_test_idle:
+ * JTAG reset: generates at least 9 TMS high and 1 TMS low to force
+ * devices into Run-Test/Idle State.
+ */
+static int aspeed_jtag_idle(struct jtag *jtag,
+ struct jtag_run_test_idle *runtest)
+{
+ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
+
+ dev_dbg(aspeed_jtag->dev, "aspeed_jtag runtest, status:%d, mode:%s, state:%s, reset:%d, tck:%d\n",
+ aspeed_jtag->status, runtest->mode ? "SW" : "HW",
+ end_status_str[runtest->endstate], runtest->reset,
+ runtest->tck);
+
+ if (runtest->mode) {
+ aspeed_jtag_run_test_idle_sw(aspeed_jtag, runtest);
+ return 0;
+ }
+
+ /* Disable sw mode */
+ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW);
+ /* x TMS high + 1 TMS low */
+ if (runtest->reset)
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN |
+ ASPEED_JTAG_CTL_ENG_OUT_EN |
+ ASPEED_JTAG_CTL_FORCE_TMS, ASPEED_JTAG_CTRL);
+ else
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_EC_GO_IDLE,
+ ASPEED_JTAG_EC);
+
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
+
+ aspeed_jtag->status = JTAG_STATE_IDLE;
+ return 0;
+}
+
+static void aspeed_jtag_xfer_sw(struct aspeed_jtag *aspeed_jtag,
+ struct jtag_xfer *xfer, char *tdio_data)
+{
+ unsigned long remain_xfer = xfer->length;
+ unsigned long shift_bits = 0;
+ unsigned long index = 0;
+ unsigned long tdi;
+ char tdo;
+ unsigned long *data = (unsigned long *)tdio_data;
+
+ if (xfer->direction == JTAG_READ_XFER)
+ tdi = UINT_MAX;
+ else
+ tdi = data[index];
+
+ while (remain_xfer > 1) {
+ tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 0,
+ tdi & ASPEED_JTAG_DATA_MSB);
+ data[index] |= tdo << (shift_bits %
+ ASPEED_JTAG_DATA_CHUNK_SIZE);
+
+ tdi >>= 1;
+ shift_bits++;
+ remain_xfer--;
+
+ if (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE == 0) {
+ dev_dbg(aspeed_jtag->dev, "R/W data[%lu]:%lx\n",
+ index, data[index]);
+
+ tdo = 0;
+ index++;
+
+ if (xfer->direction == JTAG_READ_XFER)
+ tdi = UINT_MAX;
+ else
+ tdi = data[index];
+ }
+ }
+
+ tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 1, tdi & ASPEED_JTAG_DATA_MSB);
+ data[index] |= tdo << (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE);
+}
+
+static void aspeed_jtag_xfer_push_data(struct aspeed_jtag *aspeed_jtag,
+ enum jtag_xfer_type type, u32 bits_len)
+{
+ dev_dbg(aspeed_jtag->dev, "shift bits %d\n", bits_len);
+
+ if (type == JTAG_SIR_XFER) {
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_IOUT_LEN(bits_len),
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) |
+ ASPEED_JTAG_CTL_INST_EN, ASPEED_JTAG_CTRL);
+ } else {
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len),
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) |
+ ASPEED_JTAG_CTL_DATA_EN, ASPEED_JTAG_CTRL);
+ }
+}
+
+static void aspeed_jtag_xfer_push_data_last(struct aspeed_jtag *aspeed_jtag,
+ enum jtag_xfer_type type,
+ u32 shift_bits,
+ enum jtag_endstate endstate)
+{
+ if (endstate != JTAG_STATE_IDLE) {
+ if (type == JTAG_SIR_XFER) {
+ dev_dbg(aspeed_jtag->dev, "IR Keep Pause\n");
+
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_IOUT_LEN(shift_bits),
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_IOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_INST_EN,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_wait_instruction_pause(aspeed_jtag);
+ } else {
+ dev_dbg(aspeed_jtag->dev, "DR Keep Pause\n");
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_DOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_DR_UPDATE,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_DOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_DR_UPDATE |
+ ASPEED_JTAG_CTL_DATA_EN,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_wait_data_pause_complete(aspeed_jtag);
+ }
+ } else {
+ if (type == JTAG_SIR_XFER) {
+ dev_dbg(aspeed_jtag->dev, "IR go IDLE\n");
+
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_IOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_LASPEED_INST,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_IOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_LASPEED_INST |
+ ASPEED_JTAG_CTL_INST_EN,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_wait_instruction_complete(aspeed_jtag);
+ } else {
+ dev_dbg(aspeed_jtag->dev, "DR go IDLE\n");
+
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_DOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_LASPEED_DATA,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_DOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_LASPEED_DATA |
+ ASPEED_JTAG_CTL_DATA_EN,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_wait_data_complete(aspeed_jtag);
+ }
+ }
+}
+
+static void aspeed_jtag_xfer_hw(struct aspeed_jtag *aspeed_jtag,
+ struct jtag_xfer *xfer, char *tdio_data)
+{
+ unsigned long remain_xfer = xfer->length;
+ unsigned long *data = (unsigned long *)tdio_data;
+ unsigned long shift_bits;
+ unsigned long index = 0;
+ u32 data_reg;
+
+ data_reg = xfer->type == JTAG_SIR_XFER ?
+ ASPEED_JTAG_INST : ASPEED_JTAG_DATA;
+ while (remain_xfer) {
+ if (xfer->direction == JTAG_WRITE_XFER) {
+ dev_dbg(aspeed_jtag->dev, "W dr->dr_data[%lu]:%lx\n",
+ index, data[index]);
+
+ aspeed_jtag_write(aspeed_jtag, data[index], data_reg);
+ } else {
+ aspeed_jtag_write(aspeed_jtag, 0, data_reg);
+ }
+
+ if (remain_xfer > ASPEED_JTAG_DATA_CHUNK_SIZE) {
+ shift_bits = ASPEED_JTAG_DATA_CHUNK_SIZE;
+
+ /*
+ * Read bytes were not equals to column length
+ * and go to Pause-DR
+ */
+ aspeed_jtag_xfer_push_data(aspeed_jtag, xfer->type,
+ shift_bits);
+ } else {
+ /*
+ * Read bytes equals to column length =>
+ * Update-DR
+ */
+ shift_bits = remain_xfer;
+ aspeed_jtag_xfer_push_data_last(aspeed_jtag, xfer->type,
+ shift_bits,
+ xfer->endstate);
+ }
+
+ if (xfer->direction == JTAG_READ_XFER) {
+ if (shift_bits < ASPEED_JTAG_DATA_CHUNK_SIZE) {
+ data[index] = aspeed_jtag_read(aspeed_jtag,
+ data_reg);
+
+ data[index] >>= ASPEED_JTAG_DATA_CHUNK_SIZE -
+ shift_bits;
+ } else
+ data[index] = aspeed_jtag_read(aspeed_jtag,
+ data_reg);
+ dev_dbg(aspeed_jtag->dev, "R dr->dr_data[%lu]:%lx\n",
+ index, data[index]);
+ }
+
+ remain_xfer = remain_xfer - shift_bits;
+ index++;
+ dev_dbg(aspeed_jtag->dev, "remain_xfer %lu\n", remain_xfer);
+ }
+}
+
+static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer)
+{
+ unsigned long remain_xfer = xfer->length;
+ unsigned long *data = (unsigned long *)xfer->tdio;
+ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
+ char sm_update_shiftir[] = {1, 1, 0, 0};
+ char sm_update_shiftdr[] = {1, 0, 0};
+ char sm_pause_idle[] = {1, 1, 0};
+ char sm_pause_update[] = {1, 1};
+ unsigned long offset;
+ char dbg_str[256];
+ int pos = 0;
+ int i;
+
+ for (offset = 0, i = 0; offset < xfer->length;
+ offset += ASPEED_JTAG_DATA_CHUNK_SIZE, i++) {
+ pos += snprintf(&dbg_str[pos], sizeof(dbg_str) - pos,
+ "0x%08lx ", data[i]);
+ }
+
+ dev_dbg(aspeed_jtag->dev, "aspeed_jtag %s %s xfer, mode:%s, END:%d, len:%lu, TDI[%s]\n",
+ xfer->type == JTAG_SIR_XFER ? "SIR" : "SDR",
+ xfer->direction == JTAG_READ_XFER ? "READ" : "WRITE",
+ xfer->mode ? "SW" : "HW",
+ xfer->endstate, remain_xfer, dbg_str);
+
+ if (xfer->mode == JTAG_XFER_SW_MODE) {
+ /* SW mode */
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
+
+ if (aspeed_jtag->status != JTAG_STATE_IDLE) {
+ /*IR/DR Pause->Exit2 IR / DR->Update IR /DR */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_update,
+ sizeof(sm_pause_update));
+ }
+
+ if (xfer->type == JTAG_SIR_XFER)
+ /* ->IRSCan->CapIR->ShiftIR */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_update_shiftir,
+ sizeof(sm_update_shiftir));
+ else
+ /* ->DRScan->DRCap->DRShift */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_update_shiftdr,
+ sizeof(sm_update_shiftdr));
+
+ aspeed_jtag_xfer_sw(aspeed_jtag, xfer, xfer->tdio);
+
+ /* DIPause/DRPause */
+ aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
+
+ if (xfer->endstate == JTAG_STATE_IDLE) {
+ /* ->DRExit2->DRUpdate->IDLE */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_idle,
+ sizeof(sm_pause_idle));
+ }
+ } else {
+ /* hw mode */
+ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW);
+ aspeed_jtag_xfer_hw(aspeed_jtag, xfer, xfer->tdio);
+ }
+
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
+ aspeed_jtag->status = xfer->endstate;
+ return 0;
+}
+
+static int aspeed_jtag_status_get(struct jtag *jtag, enum jtag_endstate *status)
+{
+ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
+
+ *status = aspeed_jtag->status;
+ return 0;
+}
+
+static irqreturn_t aspeed_jtag_interrupt(s32 this_irq, void *dev_id)
+{
+ struct aspeed_jtag *aspeed_jtag = dev_id;
+ u32 status;
+ irqreturn_t ret;
+
+ status = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_ISR);
+ dev_dbg(aspeed_jtag->dev, "status %x\n", status);
+
+ if (status & ASPEED_JTAG_ISR_INT_MASK) {
+ aspeed_jtag_write(aspeed_jtag,
+ (status & ASPEED_JTAG_ISR_INT_MASK)
+ | (status & ASPEED_JTAG_ISR_INT_EN_MASK),
+ ASPEED_JTAG_ISR);
+ aspeed_jtag->flag |= status & ASPEED_JTAG_ISR_INT_MASK;
+ }
+
+ if (aspeed_jtag->flag) {
+ wake_up_interruptible(&aspeed_jtag->jtag_wq);
+ ret = IRQ_HANDLED;
+ } else {
+ dev_err(aspeed_jtag->dev, "aspeed_jtag irq status:%x\n",
+ status);
+ ret = IRQ_NONE;
+ }
+ return ret;
+}
+
+int aspeed_jtag_init(struct platform_device *pdev,
+ struct aspeed_jtag *aspeed_jtag)
+{
+ struct resource *res;
+ int err;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ aspeed_jtag->reg_base = devm_ioremap_resource(aspeed_jtag->dev, res);
+ if (IS_ERR(aspeed_jtag->reg_base)) {
+ err = -ENOMEM;
+ goto out_region;
+ }
+
+ aspeed_jtag->pclk = devm_clk_get(aspeed_jtag->dev, NULL);
+ if (IS_ERR(aspeed_jtag->pclk)) {
+ dev_err(aspeed_jtag->dev, "devm_clk_get failed\n");
+ return PTR_ERR(aspeed_jtag->pclk);
+ }
+
+ aspeed_jtag->irq = platform_get_irq(pdev, 0);
+ if (aspeed_jtag->irq < 0) {
+ dev_err(aspeed_jtag->dev, "no irq specified\n");
+ err = -ENOENT;
+ goto out_region;
+ }
+
+ /* Enable clock */
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN |
+ ASPEED_JTAG_CTL_ENG_OUT_EN, ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
+
+ err = devm_request_irq(aspeed_jtag->dev, aspeed_jtag->irq,
+ aspeed_jtag_interrupt, 0,
+ "aspeed-jtag", aspeed_jtag);
+ if (err) {
+ dev_err(aspeed_jtag->dev, "aspeed_jtag unable to get IRQ");
+ goto out_region;
+ }
+ dev_dbg(&pdev->dev, "aspeed_jtag:IRQ %d.\n", aspeed_jtag->irq);
+
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_ISR_INST_PAUSE |
+ ASPEED_JTAG_ISR_INST_COMPLETE |
+ ASPEED_JTAG_ISR_DATA_PAUSE |
+ ASPEED_JTAG_ISR_DATA_COMPLETE |
+ ASPEED_JTAG_ISR_INST_PAUSE_EN |
+ ASPEED_JTAG_ISR_INST_COMPLETE_EN |
+ ASPEED_JTAG_ISR_DATA_PAUSE_EN |
+ ASPEED_JTAG_ISR_DATA_COMPLETE_EN,
+ ASPEED_JTAG_ISR);
+
+ aspeed_jtag->flag = 0;
+ init_waitqueue_head(&aspeed_jtag->jtag_wq);
+ return 0;
+
+out_region:
+ release_mem_region(res->start, res->end - res->start + 1);
+ return err;
+}
+
+int aspeed_jtag_deinit(struct platform_device *pdev,
+ struct aspeed_jtag *aspeed_jtag)
+{
+ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_ISR);
+ devm_free_irq(aspeed_jtag->dev, aspeed_jtag->irq, aspeed_jtag);
+ /* Disabe clock */
+ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_CTRL);
+ return 0;
+}
+
+static int aspeed_jtag_probe(struct platform_device *pdev)
+{
+ struct aspeed_jtag *aspeed_jtag;
+ struct jtag *jtag;
+ int err;
+
+ if (!of_device_is_compatible(pdev->dev.of_node, "aspeed,aspeed-jtag"))
+ return -ENOMEM;
+
+ jtag = jtag_alloc(sizeof(*aspeed_jtag), &aspeed_jtag_ops);
+ if (!jtag)
+ return -ENODEV;
+
+ platform_set_drvdata(pdev, jtag);
+ aspeed_jtag = jtag_priv(jtag);
+ aspeed_jtag->dev = &pdev->dev;
+
+ /* Initialize device*/
+ err = aspeed_jtag_init(pdev, aspeed_jtag);
+ if (err)
+ goto err_jtag_init;
+
+ /* Initialize JTAG core structure*/
+ err = jtag_register(jtag);
+ if (err)
+ goto err_jtag_register;
+
+ return 0;
+
+err_jtag_register:
+ aspeed_jtag_deinit(pdev, aspeed_jtag);
+err_jtag_init:
+ jtag_free(jtag);
+ return err;
+}
+
+static int aspeed_jtag_remove(struct platform_device *pdev)
+{
+ struct jtag *jtag;
+
+ jtag = platform_get_drvdata(pdev);
+ aspeed_jtag_deinit(pdev, jtag_priv(jtag));
+ jtag_unregister(jtag);
+ jtag_free(jtag);
+ return 0;
+}
+
+static const struct of_device_id aspeed_jtag_of_match[] = {
+ { .compatible = "aspeed,aspeed-jtag", },
+ {}
+};
+
+static struct platform_driver aspeed_jtag_driver = {
+ .probe = aspeed_jtag_probe,
+ .remove = aspeed_jtag_remove,
+ .driver = {
+ .name = ASPEED_JTAG_NAME,
+ .of_match_table = aspeed_jtag_of_match,
+ },
+};
+module_platform_driver(aspeed_jtag_driver);
+
+MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>");
+MODULE_DESCRIPTION("ASPEED JTAG driver");
+MODULE_LICENSE("Dual BSD/GPL");
--
1.7.1
^ permalink raw reply related [flat|nested] 55+ messages in thread
* [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-02 13:18 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-02 13:18 UTC (permalink / raw)
To: linux-arm-kernel
Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
Driver implements the following jtag ops:
- freq_get;
- freq_set;
- status_get;
- idle;
- xfer;
It has been tested on Mellanox system with BMC equipped with
Aspeed 2520 SoC for programming CPLD devices.
Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/jtag/Kconfig | 13 +
drivers/jtag/Makefile | 1 +
drivers/jtag/jtag-aspeed.c | 802 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 816 insertions(+), 0 deletions(-)
create mode 100644 drivers/jtag/jtag-aspeed.c
diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
index a8d0149..7bf709c 100644
--- a/drivers/jtag/Kconfig
+++ b/drivers/jtag/Kconfig
@@ -16,3 +16,16 @@ menuconfig JTAG
To compile this driver as a module, choose M here: the module will
be called jtag.
+menuconfig JTAG_ASPEED
+ tristate "Aspeed SoC JTAG controller support"
+ depends on JTAG
+ ---help---
+ This provides a support for Aspeed JTAG device, equipped on
+ Aspeed SoC 24xx and 25xx families. Drivers allows programming
+ of hardware devices, connected to SoC through the JTAG interface.
+
+ If you want this support, you should say Y here.
+
+ To compile this driver as a module, choose M here: the module will
+ be called aspeed_jtag.
+
diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
index e811330..e9fa7fa 100644
--- a/drivers/jtag/Makefile
+++ b/drivers/jtag/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_JTAG) += jtag.o
+obj-$(CONFIG_JTAG_ASPEED) += jtag-aspeed.o
diff --git a/drivers/jtag/jtag-aspeed.c b/drivers/jtag/jtag-aspeed.c
new file mode 100644
index 0000000..b820824
--- /dev/null
+++ b/drivers/jtag/jtag-aspeed.c
@@ -0,0 +1,802 @@
+/*
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the names of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <linux/jtag.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <uapi/linux/jtag.h>
+
+#define ASPEED_JTAG_DATA 0x00
+#define ASPEED_JTAG_INST 0x04
+#define ASPEED_JTAG_CTRL 0x08
+#define ASPEED_JTAG_ISR 0x0C
+#define ASPEED_JTAG_SW 0x10
+#define ASPEED_JTAG_TCK 0x14
+#define ASPEED_JTAG_EC 0x18
+
+#define ASPEED_JTAG_DATA_MSB 0x01
+#define ASPEED_JTAG_DATA_CHUNK_SIZE 0x20
+
+/* ASPEED_JTAG_CTRL: Engine Control */
+#define ASPEED_JTAG_CTL_ENG_EN BIT(31)
+#define ASPEED_JTAG_CTL_ENG_OUT_EN BIT(30)
+#define ASPEED_JTAG_CTL_FORCE_TMS BIT(29)
+#define ASPEED_JTAG_CTL_INST_LEN(x) ((x) << 20)
+#define ASPEED_JTAG_CTL_LASPEED_INST BIT(17)
+#define ASPEED_JTAG_CTL_INST_EN BIT(16)
+#define ASPEED_JTAG_CTL_DR_UPDATE BIT(10)
+#define ASPEED_JTAG_CTL_DATA_LEN(x) ((x) << 4)
+#define ASPEED_JTAG_CTL_LASPEED_DATA BIT(1)
+#define ASPEED_JTAG_CTL_DATA_EN BIT(0)
+
+/* ASPEED_JTAG_ISR : Interrupt status and enable */
+#define ASPEED_JTAG_ISR_INST_PAUSE BIT(19)
+#define ASPEED_JTAG_ISR_INST_COMPLETE BIT(18)
+#define ASPEED_JTAG_ISR_DATA_PAUSE BIT(17)
+#define ASPEED_JTAG_ISR_DATA_COMPLETE BIT(16)
+#define ASPEED_JTAG_ISR_INST_PAUSE_EN BIT(3)
+#define ASPEED_JTAG_ISR_INST_COMPLETE_EN BIT(2)
+#define ASPEED_JTAG_ISR_DATA_PAUSE_EN BIT(1)
+#define ASPEED_JTAG_ISR_DATA_COMPLETE_EN BIT(0)
+#define ASPEED_JTAG_ISR_INT_EN_MASK GENMASK(3, 0)
+#define ASPEED_JTAG_ISR_INT_MASK GENMASK(19, 16)
+
+/* ASPEED_JTAG_SW : Software Mode and Status */
+#define ASPEED_JTAG_SW_MODE_EN BIT(19)
+#define ASPEED_JTAG_SW_MODE_TCK BIT(18)
+#define ASPEED_JTAG_SW_MODE_TMS BIT(17)
+#define ASPEED_JTAG_SW_MODE_TDIO BIT(16)
+
+/* ASPEED_JTAG_TCK : TCK Control */
+#define ASPEED_JTAG_TCK_DIVISOR_MASK GENMASK(10, 0)
+#define ASPEED_JTAG_TCK_GET_DIV(x) ((x) & ASPEED_JTAG_TCK_DIVISOR_MASK)
+
+/* ASPEED_JTAG_EC : Controller set for go to IDLE */
+#define ASPEED_JTAG_EC_GO_IDLE BIT(0)
+
+#define ASPEED_JTAG_IOUT_LEN(len) (ASPEED_JTAG_CTL_ENG_EN |\
+ ASPEED_JTAG_CTL_ENG_OUT_EN |\
+ ASPEED_JTAG_CTL_INST_LEN(len))
+
+#define ASPEED_JTAG_DOUT_LEN(len) (ASPEED_JTAG_CTL_ENG_EN |\
+ ASPEED_JTAG_CTL_ENG_OUT_EN |\
+ ASPEED_JTAG_CTL_DATA_LEN(len))
+
+#define ASPEED_JTAG_TCK_WAIT 10
+#define ASPEED_JTAG_RESET_CNTR 10
+
+#define ASPEED_JTAG_NAME "jtag-aspeed"
+
+static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq);
+static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq);
+static int aspeed_jtag_status_get(struct jtag *jtag,
+ enum jtag_endstate *status);
+static int aspeed_jtag_idle(struct jtag *jtag,
+ struct jtag_run_test_idle *runtest);
+static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer);
+
+struct aspeed_jtag {
+ void __iomem *reg_base;
+ struct device *dev;
+ struct clk *pclk;
+ enum jtag_endstate status;
+ int irq;
+ u32 flag;
+ wait_queue_head_t jtag_wq;
+ bool is_open;
+};
+
+static char *end_status_str[] = {"idle", "ir pause", "drpause"};
+
+static struct jtag_ops aspeed_jtag_ops = {
+ .freq_get = aspeed_jtag_freq_get,
+ .freq_set = aspeed_jtag_freq_set,
+ .status_get = aspeed_jtag_status_get,
+ .idle = aspeed_jtag_idle,
+ .xfer = aspeed_jtag_xfer
+};
+
+static u32 aspeed_jtag_read(struct aspeed_jtag *aspeed_jtag, u32 reg)
+{
+ return readl(aspeed_jtag->reg_base + reg);
+}
+
+static void
+aspeed_jtag_write(struct aspeed_jtag *aspeed_jtag, u32 val, u32 reg)
+{
+ writel(val, aspeed_jtag->reg_base + reg);
+}
+
+static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq)
+{
+ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
+ u16 div;
+ u32 tck_val;
+ unsigned long apb_frq;
+
+ apb_frq = clk_get_rate(aspeed_jtag->pclk);
+ div = (apb_frq % freq == 0) ? (apb_frq / freq) - 1 : (apb_frq / freq);
+ tck_val = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK);
+ aspeed_jtag_write(aspeed_jtag,
+ (tck_val & ASPEED_JTAG_TCK_DIVISOR_MASK) | div,
+ ASPEED_JTAG_TCK);
+ return 0;
+}
+
+static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq)
+{
+ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
+ u32 pclk;
+ u32 tck;
+
+ pclk = clk_get_rate(aspeed_jtag->pclk);
+ tck = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK);
+ *frq = pclk / (ASPEED_JTAG_TCK_GET_DIV(tck) + 1);
+
+ return 0;
+}
+
+static void aspeed_jtag_sw_delay(struct aspeed_jtag *aspeed_jtag, int cnt)
+{
+ int i;
+
+ for (i = 0; i < cnt; i++)
+ aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW);
+}
+
+static char aspeed_jtag_tck_cycle(struct aspeed_jtag *aspeed_jtag,
+ u8 tms, u8 tdi)
+{
+ char tdo = 0;
+
+ /* TCK = 0 */
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ (tms * ASPEED_JTAG_SW_MODE_TMS) |
+ (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
+
+ aspeed_jtag_sw_delay(aspeed_jtag, ASPEED_JTAG_TCK_WAIT);
+
+ /* TCK = 1 */
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ ASPEED_JTAG_SW_MODE_TCK |
+ (tms * ASPEED_JTAG_SW_MODE_TMS) |
+ (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
+
+ if (aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW) &
+ ASPEED_JTAG_SW_MODE_TDIO)
+ tdo = 1;
+
+ aspeed_jtag_sw_delay(aspeed_jtag, ASPEED_JTAG_TCK_WAIT);
+
+ /* TCK = 0 */
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ (tms * ASPEED_JTAG_SW_MODE_TMS) |
+ (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
+ return tdo;
+}
+
+static void aspeed_jtag_wait_instruction_pause(struct aspeed_jtag *aspeed_jtag)
+{
+ wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
+ ASPEED_JTAG_ISR_INST_PAUSE);
+ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_PAUSE;
+}
+
+static void
+aspeed_jtag_wait_instruction_complete(struct aspeed_jtag *aspeed_jtag)
+{
+ wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
+ ASPEED_JTAG_ISR_INST_COMPLETE);
+ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_COMPLETE;
+}
+
+static void
+aspeed_jtag_wait_data_pause_complete(struct aspeed_jtag *aspeed_jtag)
+{
+ wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
+ ASPEED_JTAG_ISR_DATA_PAUSE);
+ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_PAUSE;
+}
+
+static void aspeed_jtag_wait_data_complete(struct aspeed_jtag *aspeed_jtag)
+{
+ wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
+ ASPEED_JTAG_ISR_DATA_COMPLETE);
+ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_COMPLETE;
+}
+
+static void aspeed_jtag_sm_cycle(struct aspeed_jtag *aspeed_jtag, u8 *tms,
+ int len)
+{
+ int i;
+
+ for (i = 0; i < len; i++)
+ aspeed_jtag_tck_cycle(aspeed_jtag, tms[i], 0);
+}
+
+static void aspeed_jtag_run_test_idle_sw(struct aspeed_jtag *aspeed_jtag,
+ struct jtag_run_test_idle *runtest)
+{
+ char sm_pause_irpause[] = {1, 1, 1, 1, 0, 1, 0};
+ char sm_pause_drpause[] = {1, 1, 1, 0, 1, 0};
+ char sm_idle_irpause[] = {1, 1, 0, 1, 0};
+ char sm_idle_drpause[] = {1, 0, 1, 0};
+ char sm_pause_idle[] = {1, 1, 0};
+ int i;
+
+ /* SW mode from idle/pause-> to pause/idle */
+ if (runtest->reset) {
+ for (i = 0; i < ASPEED_JTAG_RESET_CNTR; i++)
+ aspeed_jtag_tck_cycle(aspeed_jtag, 1, 0);
+ }
+
+ switch (aspeed_jtag->status) {
+ case JTAG_STATE_IDLE:
+ switch (runtest->endstate) {
+ case JTAG_STATE_PAUSEIR:
+ /* ->DRSCan->IRSCan->IRCap->IRExit1->PauseIR */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_idle_irpause,
+ sizeof(sm_idle_irpause));
+
+ aspeed_jtag->status = JTAG_STATE_PAUSEIR;
+ break;
+ case JTAG_STATE_PAUSEDR:
+ /* ->DRSCan->DRCap->DRExit1->PauseDR */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_idle_drpause,
+ sizeof(sm_idle_drpause));
+
+ aspeed_jtag->status = JTAG_STATE_PAUSEDR;
+ break;
+ case JTAG_STATE_IDLE:
+ /* IDLE */
+ aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
+ aspeed_jtag->status = JTAG_STATE_IDLE;
+ break;
+ default:
+ break;
+ }
+ break;
+
+ case JTAG_STATE_PAUSEIR:
+ /* Fall-through */
+ case JTAG_STATE_PAUSEDR:
+ /* From IR/DR Pause */
+ switch (runtest->endstate) {
+ case JTAG_STATE_PAUSEIR:
+ /*
+ * to Exit2 IR/DR->Updt IR/DR->DRSCan->IRSCan->IRCap->
+ * IRExit1->PauseIR
+ */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_irpause,
+ sizeof(sm_pause_irpause));
+
+ aspeed_jtag->status = JTAG_STATE_PAUSEIR;
+ break;
+ case JTAG_STATE_PAUSEDR:
+ /*
+ * to Exit2 IR/DR->Updt IR/DR->DRSCan->DRCap->
+ * DRExit1->PauseDR
+ */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_drpause,
+ sizeof(sm_pause_drpause));
+ aspeed_jtag->status = JTAG_STATE_PAUSEDR;
+ break;
+ case JTAG_STATE_IDLE:
+ /* to Exit2 IR/DR->Updt IR/DR->IDLE */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_idle,
+ sizeof(sm_pause_idle));
+ aspeed_jtag->status = JTAG_STATE_IDLE;
+ break;
+ default:
+ break;
+ }
+ break;
+
+ default:
+ dev_err(aspeed_jtag->dev, "aspeed_jtag_run_test_idle error\n");
+ break;
+ }
+
+ /* Stay on IDLE for at least TCK cycle */
+ for (i = 0; i < runtest->tck; i++)
+ aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
+}
+
+/**
+ * aspeed_jtag_run_test_idle:
+ * JTAG reset: generates at least 9 TMS high and 1 TMS low to force
+ * devices into Run-Test/Idle State.
+ */
+static int aspeed_jtag_idle(struct jtag *jtag,
+ struct jtag_run_test_idle *runtest)
+{
+ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
+
+ dev_dbg(aspeed_jtag->dev, "aspeed_jtag runtest, status:%d, mode:%s, state:%s, reset:%d, tck:%d\n",
+ aspeed_jtag->status, runtest->mode ? "SW" : "HW",
+ end_status_str[runtest->endstate], runtest->reset,
+ runtest->tck);
+
+ if (runtest->mode) {
+ aspeed_jtag_run_test_idle_sw(aspeed_jtag, runtest);
+ return 0;
+ }
+
+ /* Disable sw mode */
+ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW);
+ /* x TMS high + 1 TMS low */
+ if (runtest->reset)
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN |
+ ASPEED_JTAG_CTL_ENG_OUT_EN |
+ ASPEED_JTAG_CTL_FORCE_TMS, ASPEED_JTAG_CTRL);
+ else
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_EC_GO_IDLE,
+ ASPEED_JTAG_EC);
+
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
+
+ aspeed_jtag->status = JTAG_STATE_IDLE;
+ return 0;
+}
+
+static void aspeed_jtag_xfer_sw(struct aspeed_jtag *aspeed_jtag,
+ struct jtag_xfer *xfer, char *tdio_data)
+{
+ unsigned long remain_xfer = xfer->length;
+ unsigned long shift_bits = 0;
+ unsigned long index = 0;
+ unsigned long tdi;
+ char tdo;
+ unsigned long *data = (unsigned long *)tdio_data;
+
+ if (xfer->direction == JTAG_READ_XFER)
+ tdi = UINT_MAX;
+ else
+ tdi = data[index];
+
+ while (remain_xfer > 1) {
+ tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 0,
+ tdi & ASPEED_JTAG_DATA_MSB);
+ data[index] |= tdo << (shift_bits %
+ ASPEED_JTAG_DATA_CHUNK_SIZE);
+
+ tdi >>= 1;
+ shift_bits++;
+ remain_xfer--;
+
+ if (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE == 0) {
+ dev_dbg(aspeed_jtag->dev, "R/W data[%lu]:%lx\n",
+ index, data[index]);
+
+ tdo = 0;
+ index++;
+
+ if (xfer->direction == JTAG_READ_XFER)
+ tdi = UINT_MAX;
+ else
+ tdi = data[index];
+ }
+ }
+
+ tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 1, tdi & ASPEED_JTAG_DATA_MSB);
+ data[index] |= tdo << (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE);
+}
+
+static void aspeed_jtag_xfer_push_data(struct aspeed_jtag *aspeed_jtag,
+ enum jtag_xfer_type type, u32 bits_len)
+{
+ dev_dbg(aspeed_jtag->dev, "shift bits %d\n", bits_len);
+
+ if (type == JTAG_SIR_XFER) {
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_IOUT_LEN(bits_len),
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) |
+ ASPEED_JTAG_CTL_INST_EN, ASPEED_JTAG_CTRL);
+ } else {
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len),
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) |
+ ASPEED_JTAG_CTL_DATA_EN, ASPEED_JTAG_CTRL);
+ }
+}
+
+static void aspeed_jtag_xfer_push_data_last(struct aspeed_jtag *aspeed_jtag,
+ enum jtag_xfer_type type,
+ u32 shift_bits,
+ enum jtag_endstate endstate)
+{
+ if (endstate != JTAG_STATE_IDLE) {
+ if (type == JTAG_SIR_XFER) {
+ dev_dbg(aspeed_jtag->dev, "IR Keep Pause\n");
+
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_IOUT_LEN(shift_bits),
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_IOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_INST_EN,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_wait_instruction_pause(aspeed_jtag);
+ } else {
+ dev_dbg(aspeed_jtag->dev, "DR Keep Pause\n");
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_DOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_DR_UPDATE,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_DOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_DR_UPDATE |
+ ASPEED_JTAG_CTL_DATA_EN,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_wait_data_pause_complete(aspeed_jtag);
+ }
+ } else {
+ if (type == JTAG_SIR_XFER) {
+ dev_dbg(aspeed_jtag->dev, "IR go IDLE\n");
+
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_IOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_LASPEED_INST,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_IOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_LASPEED_INST |
+ ASPEED_JTAG_CTL_INST_EN,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_wait_instruction_complete(aspeed_jtag);
+ } else {
+ dev_dbg(aspeed_jtag->dev, "DR go IDLE\n");
+
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_DOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_LASPEED_DATA,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag,
+ ASPEED_JTAG_DOUT_LEN(shift_bits) |
+ ASPEED_JTAG_CTL_LASPEED_DATA |
+ ASPEED_JTAG_CTL_DATA_EN,
+ ASPEED_JTAG_CTRL);
+ aspeed_jtag_wait_data_complete(aspeed_jtag);
+ }
+ }
+}
+
+static void aspeed_jtag_xfer_hw(struct aspeed_jtag *aspeed_jtag,
+ struct jtag_xfer *xfer, char *tdio_data)
+{
+ unsigned long remain_xfer = xfer->length;
+ unsigned long *data = (unsigned long *)tdio_data;
+ unsigned long shift_bits;
+ unsigned long index = 0;
+ u32 data_reg;
+
+ data_reg = xfer->type == JTAG_SIR_XFER ?
+ ASPEED_JTAG_INST : ASPEED_JTAG_DATA;
+ while (remain_xfer) {
+ if (xfer->direction == JTAG_WRITE_XFER) {
+ dev_dbg(aspeed_jtag->dev, "W dr->dr_data[%lu]:%lx\n",
+ index, data[index]);
+
+ aspeed_jtag_write(aspeed_jtag, data[index], data_reg);
+ } else {
+ aspeed_jtag_write(aspeed_jtag, 0, data_reg);
+ }
+
+ if (remain_xfer > ASPEED_JTAG_DATA_CHUNK_SIZE) {
+ shift_bits = ASPEED_JTAG_DATA_CHUNK_SIZE;
+
+ /*
+ * Read bytes were not equals to column length
+ * and go to Pause-DR
+ */
+ aspeed_jtag_xfer_push_data(aspeed_jtag, xfer->type,
+ shift_bits);
+ } else {
+ /*
+ * Read bytes equals to column length =>
+ * Update-DR
+ */
+ shift_bits = remain_xfer;
+ aspeed_jtag_xfer_push_data_last(aspeed_jtag, xfer->type,
+ shift_bits,
+ xfer->endstate);
+ }
+
+ if (xfer->direction == JTAG_READ_XFER) {
+ if (shift_bits < ASPEED_JTAG_DATA_CHUNK_SIZE) {
+ data[index] = aspeed_jtag_read(aspeed_jtag,
+ data_reg);
+
+ data[index] >>= ASPEED_JTAG_DATA_CHUNK_SIZE -
+ shift_bits;
+ } else
+ data[index] = aspeed_jtag_read(aspeed_jtag,
+ data_reg);
+ dev_dbg(aspeed_jtag->dev, "R dr->dr_data[%lu]:%lx\n",
+ index, data[index]);
+ }
+
+ remain_xfer = remain_xfer - shift_bits;
+ index++;
+ dev_dbg(aspeed_jtag->dev, "remain_xfer %lu\n", remain_xfer);
+ }
+}
+
+static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer)
+{
+ unsigned long remain_xfer = xfer->length;
+ unsigned long *data = (unsigned long *)xfer->tdio;
+ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
+ char sm_update_shiftir[] = {1, 1, 0, 0};
+ char sm_update_shiftdr[] = {1, 0, 0};
+ char sm_pause_idle[] = {1, 1, 0};
+ char sm_pause_update[] = {1, 1};
+ unsigned long offset;
+ char dbg_str[256];
+ int pos = 0;
+ int i;
+
+ for (offset = 0, i = 0; offset < xfer->length;
+ offset += ASPEED_JTAG_DATA_CHUNK_SIZE, i++) {
+ pos += snprintf(&dbg_str[pos], sizeof(dbg_str) - pos,
+ "0x%08lx ", data[i]);
+ }
+
+ dev_dbg(aspeed_jtag->dev, "aspeed_jtag %s %s xfer, mode:%s, END:%d, len:%lu, TDI[%s]\n",
+ xfer->type == JTAG_SIR_XFER ? "SIR" : "SDR",
+ xfer->direction == JTAG_READ_XFER ? "READ" : "WRITE",
+ xfer->mode ? "SW" : "HW",
+ xfer->endstate, remain_xfer, dbg_str);
+
+ if (xfer->mode == JTAG_XFER_SW_MODE) {
+ /* SW mode */
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
+
+ if (aspeed_jtag->status != JTAG_STATE_IDLE) {
+ /*IR/DR Pause->Exit2 IR / DR->Update IR /DR */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_update,
+ sizeof(sm_pause_update));
+ }
+
+ if (xfer->type == JTAG_SIR_XFER)
+ /* ->IRSCan->CapIR->ShiftIR */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_update_shiftir,
+ sizeof(sm_update_shiftir));
+ else
+ /* ->DRScan->DRCap->DRShift */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_update_shiftdr,
+ sizeof(sm_update_shiftdr));
+
+ aspeed_jtag_xfer_sw(aspeed_jtag, xfer, xfer->tdio);
+
+ /* DIPause/DRPause */
+ aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
+
+ if (xfer->endstate == JTAG_STATE_IDLE) {
+ /* ->DRExit2->DRUpdate->IDLE */
+ aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_idle,
+ sizeof(sm_pause_idle));
+ }
+ } else {
+ /* hw mode */
+ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW);
+ aspeed_jtag_xfer_hw(aspeed_jtag, xfer, xfer->tdio);
+ }
+
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
+ aspeed_jtag->status = xfer->endstate;
+ return 0;
+}
+
+static int aspeed_jtag_status_get(struct jtag *jtag, enum jtag_endstate *status)
+{
+ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
+
+ *status = aspeed_jtag->status;
+ return 0;
+}
+
+static irqreturn_t aspeed_jtag_interrupt(s32 this_irq, void *dev_id)
+{
+ struct aspeed_jtag *aspeed_jtag = dev_id;
+ u32 status;
+ irqreturn_t ret;
+
+ status = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_ISR);
+ dev_dbg(aspeed_jtag->dev, "status %x\n", status);
+
+ if (status & ASPEED_JTAG_ISR_INT_MASK) {
+ aspeed_jtag_write(aspeed_jtag,
+ (status & ASPEED_JTAG_ISR_INT_MASK)
+ | (status & ASPEED_JTAG_ISR_INT_EN_MASK),
+ ASPEED_JTAG_ISR);
+ aspeed_jtag->flag |= status & ASPEED_JTAG_ISR_INT_MASK;
+ }
+
+ if (aspeed_jtag->flag) {
+ wake_up_interruptible(&aspeed_jtag->jtag_wq);
+ ret = IRQ_HANDLED;
+ } else {
+ dev_err(aspeed_jtag->dev, "aspeed_jtag irq status:%x\n",
+ status);
+ ret = IRQ_NONE;
+ }
+ return ret;
+}
+
+int aspeed_jtag_init(struct platform_device *pdev,
+ struct aspeed_jtag *aspeed_jtag)
+{
+ struct resource *res;
+ int err;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ aspeed_jtag->reg_base = devm_ioremap_resource(aspeed_jtag->dev, res);
+ if (IS_ERR(aspeed_jtag->reg_base)) {
+ err = -ENOMEM;
+ goto out_region;
+ }
+
+ aspeed_jtag->pclk = devm_clk_get(aspeed_jtag->dev, NULL);
+ if (IS_ERR(aspeed_jtag->pclk)) {
+ dev_err(aspeed_jtag->dev, "devm_clk_get failed\n");
+ return PTR_ERR(aspeed_jtag->pclk);
+ }
+
+ aspeed_jtag->irq = platform_get_irq(pdev, 0);
+ if (aspeed_jtag->irq < 0) {
+ dev_err(aspeed_jtag->dev, "no irq specified\n");
+ err = -ENOENT;
+ goto out_region;
+ }
+
+ /* Enable clock */
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN |
+ ASPEED_JTAG_CTL_ENG_OUT_EN, ASPEED_JTAG_CTRL);
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
+ ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
+
+ err = devm_request_irq(aspeed_jtag->dev, aspeed_jtag->irq,
+ aspeed_jtag_interrupt, 0,
+ "aspeed-jtag", aspeed_jtag);
+ if (err) {
+ dev_err(aspeed_jtag->dev, "aspeed_jtag unable to get IRQ");
+ goto out_region;
+ }
+ dev_dbg(&pdev->dev, "aspeed_jtag:IRQ %d.\n", aspeed_jtag->irq);
+
+ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_ISR_INST_PAUSE |
+ ASPEED_JTAG_ISR_INST_COMPLETE |
+ ASPEED_JTAG_ISR_DATA_PAUSE |
+ ASPEED_JTAG_ISR_DATA_COMPLETE |
+ ASPEED_JTAG_ISR_INST_PAUSE_EN |
+ ASPEED_JTAG_ISR_INST_COMPLETE_EN |
+ ASPEED_JTAG_ISR_DATA_PAUSE_EN |
+ ASPEED_JTAG_ISR_DATA_COMPLETE_EN,
+ ASPEED_JTAG_ISR);
+
+ aspeed_jtag->flag = 0;
+ init_waitqueue_head(&aspeed_jtag->jtag_wq);
+ return 0;
+
+out_region:
+ release_mem_region(res->start, res->end - res->start + 1);
+ return err;
+}
+
+int aspeed_jtag_deinit(struct platform_device *pdev,
+ struct aspeed_jtag *aspeed_jtag)
+{
+ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_ISR);
+ devm_free_irq(aspeed_jtag->dev, aspeed_jtag->irq, aspeed_jtag);
+ /* Disabe clock */
+ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_CTRL);
+ return 0;
+}
+
+static int aspeed_jtag_probe(struct platform_device *pdev)
+{
+ struct aspeed_jtag *aspeed_jtag;
+ struct jtag *jtag;
+ int err;
+
+ if (!of_device_is_compatible(pdev->dev.of_node, "aspeed,aspeed-jtag"))
+ return -ENOMEM;
+
+ jtag = jtag_alloc(sizeof(*aspeed_jtag), &aspeed_jtag_ops);
+ if (!jtag)
+ return -ENODEV;
+
+ platform_set_drvdata(pdev, jtag);
+ aspeed_jtag = jtag_priv(jtag);
+ aspeed_jtag->dev = &pdev->dev;
+
+ /* Initialize device*/
+ err = aspeed_jtag_init(pdev, aspeed_jtag);
+ if (err)
+ goto err_jtag_init;
+
+ /* Initialize JTAG core structure*/
+ err = jtag_register(jtag);
+ if (err)
+ goto err_jtag_register;
+
+ return 0;
+
+err_jtag_register:
+ aspeed_jtag_deinit(pdev, aspeed_jtag);
+err_jtag_init:
+ jtag_free(jtag);
+ return err;
+}
+
+static int aspeed_jtag_remove(struct platform_device *pdev)
+{
+ struct jtag *jtag;
+
+ jtag = platform_get_drvdata(pdev);
+ aspeed_jtag_deinit(pdev, jtag_priv(jtag));
+ jtag_unregister(jtag);
+ jtag_free(jtag);
+ return 0;
+}
+
+static const struct of_device_id aspeed_jtag_of_match[] = {
+ { .compatible = "aspeed,aspeed-jtag", },
+ {}
+};
+
+static struct platform_driver aspeed_jtag_driver = {
+ .probe = aspeed_jtag_probe,
+ .remove = aspeed_jtag_remove,
+ .driver = {
+ .name = ASPEED_JTAG_NAME,
+ .of_match_table = aspeed_jtag_of_match,
+ },
+};
+module_platform_driver(aspeed_jtag_driver);
+
+MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>");
+MODULE_DESCRIPTION("ASPEED JTAG driver");
+MODULE_LICENSE("Dual BSD/GPL");
--
1.7.1
^ permalink raw reply related [flat|nested] 55+ messages in thread
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
2017-08-02 13:18 ` Oleksandr Shamray
@ 2017-08-02 13:44 ` Greg KH
-1 siblings, 0 replies; 55+ messages in thread
From: Greg KH @ 2017-08-02 13:44 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: arnd, linux-kernel, linux-arm-kernel, devicetree, openbmc, joel,
jiri, tklauser, linux-serial, mec, vadimp, system-sw-low-level,
Jiri Pirko
On Wed, Aug 02, 2017 at 04:18:37PM +0300, Oleksandr Shamray wrote:
> JTAG class driver provide infrastructure to support hardware/software
> JTAG platform drivers. It provide user layer API interface for flashing
> and debugging external devices which equipped with JTAG interface
> using standard transactions.
Yeah, it's nice to see this.
Some "meta" comments on this patch first:
> --- /dev/null
> +++ b/drivers/jtag/jtag.c
> @@ -0,0 +1,347 @@
> +/*
> + * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
> + * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * 3. Neither the names of the copyright holders nor the names of its
> + * contributors may be used to endorse or promote products derived from
> + * this software without specific prior written permission.
> + *
> + * Alternatively, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") version 2 as published by the Free
> + * Software Foundation.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
Ok, dual BSD/GPL, that's fine, but really? In this day and age you want
to deal with that complexity?
I ask because then you export your symbols as "gpl only" everywhere:
> +void *jtag_priv(struct jtag *jtag)
> +{
> + return jtag->priv;
> +}
> +EXPORT_SYMBOL_GPL(jtag_priv);
Which I don't object to at all, and personally really like, but it kind
of doesn't make sense, right? How about just dropping the dual license
mess? There's nothing here that any other OS will ever care about,
right?
For your uapi header file, that makes sense to keep it dual.
Now a technical comment:
> +/**
> + * struct jtag_run_test_idle - forces JTAG sm to
> + * RUN_TEST/IDLE state *
> + * @mode: access mode
> + * @reset: 0 - run IDEL/PAUSE from current state
> + * 1 - go trough TEST_LOGIC/RESET state before IDEL/PAUSE
> + * @end: completion flag
> + * @tck: clock counter
> + *
> + * Structure represents interface to JTAG device for jtag idle
> + * execution.
> + */
> +struct jtag_run_test_idle {
> + enum jtag_xfer_mode mode;
> + unsigned char reset;
> + enum jtag_endstate endstate;
> + unsigned char tck;
> +};
All structures that cross the user/kernel boundry have to use the __
type variables.
No "unsigned char", it has to be "__u8", no "unsigned short", it has to
be "__u16", and so on.
Also, watch out for your enumerated types, what's the packing end up
looking like on these structures? Have you verified it works with a
64bit kernel and 32bit userspace all correctly?
thanks,
greg k-h
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 1/2] drivers: jtag: Add JTAG core driver
@ 2017-08-02 13:44 ` Greg KH
0 siblings, 0 replies; 55+ messages in thread
From: Greg KH @ 2017-08-02 13:44 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Aug 02, 2017 at 04:18:37PM +0300, Oleksandr Shamray wrote:
> JTAG class driver provide infrastructure to support hardware/software
> JTAG platform drivers. It provide user layer API interface for flashing
> and debugging external devices which equipped with JTAG interface
> using standard transactions.
Yeah, it's nice to see this.
Some "meta" comments on this patch first:
> --- /dev/null
> +++ b/drivers/jtag/jtag.c
> @@ -0,0 +1,347 @@
> +/*
> + * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
> + * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * 3. Neither the names of the copyright holders nor the names of its
> + * contributors may be used to endorse or promote products derived from
> + * this software without specific prior written permission.
> + *
> + * Alternatively, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") version 2 as published by the Free
> + * Software Foundation.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
Ok, dual BSD/GPL, that's fine, but really? In this day and age you want
to deal with that complexity?
I ask because then you export your symbols as "gpl only" everywhere:
> +void *jtag_priv(struct jtag *jtag)
> +{
> + return jtag->priv;
> +}
> +EXPORT_SYMBOL_GPL(jtag_priv);
Which I don't object to at all, and personally really like, but it kind
of doesn't make sense, right? How about just dropping the dual license
mess? There's nothing here that any other OS will ever care about,
right?
For your uapi header file, that makes sense to keep it dual.
Now a technical comment:
> +/**
> + * struct jtag_run_test_idle - forces JTAG sm to
> + * RUN_TEST/IDLE state *
> + * @mode: access mode
> + * @reset: 0 - run IDEL/PAUSE from current state
> + * 1 - go trough TEST_LOGIC/RESET state before IDEL/PAUSE
> + * @end: completion flag
> + * @tck: clock counter
> + *
> + * Structure represents interface to JTAG device for jtag idle
> + * execution.
> + */
> +struct jtag_run_test_idle {
> + enum jtag_xfer_mode mode;
> + unsigned char reset;
> + enum jtag_endstate endstate;
> + unsigned char tck;
> +};
All structures that cross the user/kernel boundry have to use the __
type variables.
No "unsigned char", it has to be "__u8", no "unsigned short", it has to
be "__u16", and so on.
Also, watch out for your enumerated types, what's the packing end up
looking like on these structures? Have you verified it works with a
64bit kernel and 32bit userspace all correctly?
thanks,
greg k-h
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
2017-08-02 13:18 ` Oleksandr Shamray
@ 2017-08-02 13:44 ` Greg KH
-1 siblings, 0 replies; 55+ messages in thread
From: Greg KH @ 2017-08-02 13:44 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: arnd, linux-kernel, linux-arm-kernel, devicetree, openbmc, joel,
jiri, tklauser, linux-serial, mec, vadimp, system-sw-low-level,
Jiri Pirko
On Wed, Aug 02, 2017 at 04:18:37PM +0300, Oleksandr Shamray wrote:
> +menuconfig JTAG
> + tristate "JTAG support"
> + default n
'n' is always the default, no need for this line at all.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 1/2] drivers: jtag: Add JTAG core driver
@ 2017-08-02 13:44 ` Greg KH
0 siblings, 0 replies; 55+ messages in thread
From: Greg KH @ 2017-08-02 13:44 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Aug 02, 2017 at 04:18:37PM +0300, Oleksandr Shamray wrote:
> +menuconfig JTAG
> + tristate "JTAG support"
> + default n
'n' is always the default, no need for this line at all.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 0/2] JTAG driver introduction
2017-08-02 13:18 ` Oleksandr Shamray
@ 2017-08-02 14:12 ` Andrew Lunn
-1 siblings, 0 replies; 55+ messages in thread
From: Andrew Lunn @ 2017-08-02 14:12 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, arnd, devicetree, jiri, system-sw-low-level, openbmc,
linux-kernel, mec, joel, linux-serial, vadimp, tklauser,
linux-arm-kernel
On Wed, Aug 02, 2017 at 04:18:36PM +0300, Oleksandr Shamray wrote:
> When a need raise up to use JTAG interface for system's devices
> programming or CPU debugging, it could be done from the external
> JTAG master controller.
>
> For such purpose, usually the user layer
> application implements jtag protocol or using a proprietary
> connection to vendor hardware.
> This method is slow and not generic.
>
> We propose to implement general JTAG interface and infrastructure
> to communicate with user layer application. In such way, we can
> have the standard JTAG interface core part and separation from
> specific HW implementation.
> This allow new capability to debug the CPU or program system's
> device via BMC without additional devices nor cost.
Hi Oleksandr
Do you have patches for OpenOCD? Or maybe i should ask it another way,
what user space tools are you using?
Thanks
Andrew
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 0/2] JTAG driver introduction
@ 2017-08-02 14:12 ` Andrew Lunn
0 siblings, 0 replies; 55+ messages in thread
From: Andrew Lunn @ 2017-08-02 14:12 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Aug 02, 2017 at 04:18:36PM +0300, Oleksandr Shamray wrote:
> When a need raise up to use JTAG interface for system's devices
> programming or CPU debugging, it could be done from the external
> JTAG master controller.
>
> For such purpose, usually the user layer
> application implements jtag protocol or using a proprietary
> connection to vendor hardware.
> This method is slow and not generic.
>
> We propose to implement general JTAG interface and infrastructure
> to communicate with user layer application. In such way, we can
> have the standard JTAG interface core part and separation from
> specific HW implementation.
> This allow new capability to debug the CPU or program system's
> device via BMC without additional devices nor cost.
Hi Oleksandr
Do you have patches for OpenOCD? Or maybe i should ask it another way,
what user space tools are you using?
Thanks
Andrew
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
2017-08-02 13:18 ` Oleksandr Shamray
@ 2017-08-02 14:16 ` Andrew Lunn
-1 siblings, 0 replies; 55+ messages in thread
From: Andrew Lunn @ 2017-08-02 14:16 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, arnd, devicetree, jiri, system-sw-low-level, openbmc,
linux-kernel, mec, Jiri Pirko, joel, linux-serial, vadimp,
tklauser, linux-arm-kernel
> +void jtag_unregister(struct jtag *jtag)
> +{
> + struct device *dev = jtag->dev;
> +
> + mutex_lock(&jtag_mutex);
> + list_add_tail(&jtag->list, &jtag_list);
add?
> + mutex_unlock(&jtag_mutex);
> + cdev_del(&jtag->cdev);
> + device_unregister(dev);
> + ida_simple_remove(&jtag_ida, jtag->id);
> +}
Andrew
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 1/2] drivers: jtag: Add JTAG core driver
@ 2017-08-02 14:16 ` Andrew Lunn
0 siblings, 0 replies; 55+ messages in thread
From: Andrew Lunn @ 2017-08-02 14:16 UTC (permalink / raw)
To: linux-arm-kernel
> +void jtag_unregister(struct jtag *jtag)
> +{
> + struct device *dev = jtag->dev;
> +
> + mutex_lock(&jtag_mutex);
> + list_add_tail(&jtag->list, &jtag_list);
add?
> + mutex_unlock(&jtag_mutex);
> + cdev_del(&jtag->cdev);
> + device_unregister(dev);
> + ida_simple_remove(&jtag_ida, jtag->id);
> +}
Andrew
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
@ 2017-08-02 14:24 ` Neil Armstrong
0 siblings, 0 replies; 55+ messages in thread
From: Neil Armstrong @ 2017-08-02 14:24 UTC (permalink / raw)
To: Oleksandr Shamray, gregkh, arnd
Cc: devicetree, jiri, system-sw-low-level, openbmc, linux-kernel,
mec, Jiri Pirko, joel, linux-serial, vadimp, tklauser,
linux-arm-kernel
On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
> JTAG class driver provide infrastructure to support hardware/software
> JTAG platform drivers. It provide user layer API interface for flashing
> and debugging external devices which equipped with JTAG interface
> using standard transactions.
>
> Driver exposes set of IOCTL to user space for:
> - XFER:
> - SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
> - SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
> - RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
> number of clocks).
> - SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency.
>
> Driver core provides set of internal APIs for allocation and
> registration:
> - jtag_register;
> - jtag_unregister;
> - jtag_alloc;
> - jtag_free;
>
> Platform driver on registration with jtag-core creates the next
> entry in dev folder:
> /dev/jtagX
>
> Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Jiri Pirko <jiri@mellanox.com>
> ---
> Documentation/ioctl/ioctl-number.txt | 2 +
> MAINTAINERS | 8 +
> drivers/Kconfig | 2 +
> drivers/Makefile | 1 +
> drivers/jtag/Kconfig | 18 ++
> drivers/jtag/Makefile | 2 +
> drivers/jtag/jtag.c | 347 ++++++++++++++++++++++++++++++++++
> include/linux/jtag.h | 63 ++++++
> include/uapi/linux/jtag.h | 133 +++++++++++++
> 9 files changed, 576 insertions(+), 0 deletions(-)
> create mode 100644 drivers/jtag/Kconfig
> create mode 100644 drivers/jtag/Makefile
> create mode 100644 drivers/jtag/jtag.c
> create mode 100644 include/linux/jtag.h
> create mode 100644 include/uapi/linux/jtag.h
>
> diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
> index 3e3fdae..1af2508 100644
> --- a/Documentation/ioctl/ioctl-number.txt
> +++ b/Documentation/ioctl/ioctl-number.txt
> @@ -321,6 +321,8 @@ Code Seq#(hex) Include File Comments
> 0xB0 all RATIO devices in development:
> <mailto:vgo@ratio.de>
> 0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
> +0xB2 00-0f linux/jtag.h JTAG driver
> + <mailto:oleksandrs@mellanox.com>
> 0xB3 00 linux/mmc/ioctl.h
> 0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org>
> 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc@vger.kernel.org>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 205d397..141aeaf 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7292,6 +7292,14 @@ L: linux-serial@vger.kernel.org
> S: Maintained
> F: drivers/tty/serial/jsm/
>
> +JTAG SUBSYSTEM
> +M: Oleksandr Shamray <oleksandrs@mellanox.com>
> +M: Vadim Pasternak <vadimp@mellanox.com>
> +S: Maintained
> +F: include/linux/jtag.h
> +F: include/uapi/linux/jtag.h
> +F: drivers/jtag/
> +
> K10TEMP HARDWARE MONITORING DRIVER
> M: Clemens Ladisch <clemens@ladisch.de>
> L: linux-hwmon@vger.kernel.org
> diff --git a/drivers/Kconfig b/drivers/Kconfig
> index 505c676..2214678 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -208,4 +208,6 @@ source "drivers/tee/Kconfig"
>
> source "drivers/mux/Kconfig"
>
> +source "drivers/jtag/Kconfig"
> +
> endmenu
> diff --git a/drivers/Makefile b/drivers/Makefile
> index dfdcda0..6a2059b 100644
> --- a/drivers/Makefile
> +++ b/drivers/Makefile
> @@ -182,3 +182,4 @@ obj-$(CONFIG_FPGA) += fpga/
> obj-$(CONFIG_FSI) += fsi/
> obj-$(CONFIG_TEE) += tee/
> obj-$(CONFIG_MULTIPLEXER) += mux/
> +obj-$(CONFIG_JTAG) += jtag/
> diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
> new file mode 100644
> index 0000000..a8d0149
> --- /dev/null
> +++ b/drivers/jtag/Kconfig
> @@ -0,0 +1,18 @@
> +menuconfig JTAG
> + tristate "JTAG support"
> + default n
> + ---help---
> + This provides basic core functionality support for jtag class devices
> + Hardware equipped with JTAG microcontroller which can be built
> + on top of this drivers. Driver exposes the set of IOCTL to the
> + user space for:
> + SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
> + SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
> + RUNTEST (Forces IEEE 1149.1 bus to a run state for specified
> + number of clocks).
> +
> + If you want this support, you should say Y here.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called jtag.
> +
> diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
> new file mode 100644
> index 0000000..e811330
> --- /dev/null
> +++ b/drivers/jtag/Makefile
> @@ -0,0 +1,2 @@
> +obj-$(CONFIG_JTAG) += jtag.o
> +
> diff --git a/drivers/jtag/jtag.c b/drivers/jtag/jtag.c
> new file mode 100644
> index 0000000..a933bc1
> --- /dev/null
> +++ b/drivers/jtag/jtag.c
> @@ -0,0 +1,347 @@
> +/*
> + * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
> + * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * 3. Neither the names of the copyright holders nor the names of its
> + * contributors may be used to endorse or promote products derived from
> + * this software without specific prior written permission.
> + *
> + * Alternatively, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") version 2 as published by the Free
> + * Software Foundation.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
Maybe using SPDX-License-Identifier could save us from hundred of useless lines !
Neil
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
@ 2017-08-02 14:24 ` Neil Armstrong
0 siblings, 0 replies; 55+ messages in thread
From: Neil Armstrong @ 2017-08-02 14:24 UTC (permalink / raw)
To: Oleksandr Shamray, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
arnd-r2nGTMty4D4
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, jiri-rHqAuBHg3fBzbRFIqnYvSA,
system-sw-low-level-VPRAkNaXOzVWk0Htik3J/w,
openbmc-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, mec-WqBc5aa1uDFeoWH0uzbU5w,
Jiri Pirko, joel-U3u1mxZcP9KHXe+LvDLADg,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
vadimp-45czdsxZ+A5DPfheJLI6IQ, tklauser-93Khv+1bN0NyDzI6CaY1VQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
> JTAG class driver provide infrastructure to support hardware/software
> JTAG platform drivers. It provide user layer API interface for flashing
> and debugging external devices which equipped with JTAG interface
> using standard transactions.
>
> Driver exposes set of IOCTL to user space for:
> - XFER:
> - SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
> - SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
> - RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
> number of clocks).
> - SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency.
>
> Driver core provides set of internal APIs for allocation and
> registration:
> - jtag_register;
> - jtag_unregister;
> - jtag_alloc;
> - jtag_free;
>
> Platform driver on registration with jtag-core creates the next
> entry in dev folder:
> /dev/jtagX
>
> Signed-off-by: Oleksandr Shamray <oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> Signed-off-by: Jiri Pirko <jiri-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> ---
> Documentation/ioctl/ioctl-number.txt | 2 +
> MAINTAINERS | 8 +
> drivers/Kconfig | 2 +
> drivers/Makefile | 1 +
> drivers/jtag/Kconfig | 18 ++
> drivers/jtag/Makefile | 2 +
> drivers/jtag/jtag.c | 347 ++++++++++++++++++++++++++++++++++
> include/linux/jtag.h | 63 ++++++
> include/uapi/linux/jtag.h | 133 +++++++++++++
> 9 files changed, 576 insertions(+), 0 deletions(-)
> create mode 100644 drivers/jtag/Kconfig
> create mode 100644 drivers/jtag/Makefile
> create mode 100644 drivers/jtag/jtag.c
> create mode 100644 include/linux/jtag.h
> create mode 100644 include/uapi/linux/jtag.h
>
> diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
> index 3e3fdae..1af2508 100644
> --- a/Documentation/ioctl/ioctl-number.txt
> +++ b/Documentation/ioctl/ioctl-number.txt
> @@ -321,6 +321,8 @@ Code Seq#(hex) Include File Comments
> 0xB0 all RATIO devices in development:
> <mailto:vgo-/IYFIZglx74@public.gmane.org>
> 0xB1 00-1F PPPoX <mailto:mostrows-TTukF6hB3AoKZpuMuFhwt/d9D2ou9A/h@public.gmane.org>
> +0xB2 00-0f linux/jtag.h JTAG driver
> + <mailto:oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> 0xB3 00 linux/mmc/ioctl.h
> 0xB4 00-0F linux/gpio.h <mailto:linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
> 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 205d397..141aeaf 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7292,6 +7292,14 @@ L: linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> S: Maintained
> F: drivers/tty/serial/jsm/
>
> +JTAG SUBSYSTEM
> +M: Oleksandr Shamray <oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> +M: Vadim Pasternak <vadimp-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> +S: Maintained
> +F: include/linux/jtag.h
> +F: include/uapi/linux/jtag.h
> +F: drivers/jtag/
> +
> K10TEMP HARDWARE MONITORING DRIVER
> M: Clemens Ladisch <clemens-P6GI/4k7KOmELgA04lAiVw@public.gmane.org>
> L: linux-hwmon-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> diff --git a/drivers/Kconfig b/drivers/Kconfig
> index 505c676..2214678 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -208,4 +208,6 @@ source "drivers/tee/Kconfig"
>
> source "drivers/mux/Kconfig"
>
> +source "drivers/jtag/Kconfig"
> +
> endmenu
> diff --git a/drivers/Makefile b/drivers/Makefile
> index dfdcda0..6a2059b 100644
> --- a/drivers/Makefile
> +++ b/drivers/Makefile
> @@ -182,3 +182,4 @@ obj-$(CONFIG_FPGA) += fpga/
> obj-$(CONFIG_FSI) += fsi/
> obj-$(CONFIG_TEE) += tee/
> obj-$(CONFIG_MULTIPLEXER) += mux/
> +obj-$(CONFIG_JTAG) += jtag/
> diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
> new file mode 100644
> index 0000000..a8d0149
> --- /dev/null
> +++ b/drivers/jtag/Kconfig
> @@ -0,0 +1,18 @@
> +menuconfig JTAG
> + tristate "JTAG support"
> + default n
> + ---help---
> + This provides basic core functionality support for jtag class devices
> + Hardware equipped with JTAG microcontroller which can be built
> + on top of this drivers. Driver exposes the set of IOCTL to the
> + user space for:
> + SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
> + SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
> + RUNTEST (Forces IEEE 1149.1 bus to a run state for specified
> + number of clocks).
> +
> + If you want this support, you should say Y here.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called jtag.
> +
> diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
> new file mode 100644
> index 0000000..e811330
> --- /dev/null
> +++ b/drivers/jtag/Makefile
> @@ -0,0 +1,2 @@
> +obj-$(CONFIG_JTAG) += jtag.o
> +
> diff --git a/drivers/jtag/jtag.c b/drivers/jtag/jtag.c
> new file mode 100644
> index 0000000..a933bc1
> --- /dev/null
> +++ b/drivers/jtag/jtag.c
> @@ -0,0 +1,347 @@
> +/*
> + * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
> + * Copyright (c) 2017 Oleksandr Shamray <oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * 3. Neither the names of the copyright holders nor the names of its
> + * contributors may be used to endorse or promote products derived from
> + * this software without specific prior written permission.
> + *
> + * Alternatively, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") version 2 as published by the Free
> + * Software Foundation.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
Maybe using SPDX-License-Identifier could save us from hundred of useless lines !
Neil
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^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 1/2] drivers: jtag: Add JTAG core driver
@ 2017-08-02 14:24 ` Neil Armstrong
0 siblings, 0 replies; 55+ messages in thread
From: Neil Armstrong @ 2017-08-02 14:24 UTC (permalink / raw)
To: linux-arm-kernel
On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
> JTAG class driver provide infrastructure to support hardware/software
> JTAG platform drivers. It provide user layer API interface for flashing
> and debugging external devices which equipped with JTAG interface
> using standard transactions.
>
> Driver exposes set of IOCTL to user space for:
> - XFER:
> - SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
> - SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
> - RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified
> number of clocks).
> - SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency.
>
> Driver core provides set of internal APIs for allocation and
> registration:
> - jtag_register;
> - jtag_unregister;
> - jtag_alloc;
> - jtag_free;
>
> Platform driver on registration with jtag-core creates the next
> entry in dev folder:
> /dev/jtagX
>
> Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Jiri Pirko <jiri@mellanox.com>
> ---
> Documentation/ioctl/ioctl-number.txt | 2 +
> MAINTAINERS | 8 +
> drivers/Kconfig | 2 +
> drivers/Makefile | 1 +
> drivers/jtag/Kconfig | 18 ++
> drivers/jtag/Makefile | 2 +
> drivers/jtag/jtag.c | 347 ++++++++++++++++++++++++++++++++++
> include/linux/jtag.h | 63 ++++++
> include/uapi/linux/jtag.h | 133 +++++++++++++
> 9 files changed, 576 insertions(+), 0 deletions(-)
> create mode 100644 drivers/jtag/Kconfig
> create mode 100644 drivers/jtag/Makefile
> create mode 100644 drivers/jtag/jtag.c
> create mode 100644 include/linux/jtag.h
> create mode 100644 include/uapi/linux/jtag.h
>
> diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
> index 3e3fdae..1af2508 100644
> --- a/Documentation/ioctl/ioctl-number.txt
> +++ b/Documentation/ioctl/ioctl-number.txt
> @@ -321,6 +321,8 @@ Code Seq#(hex) Include File Comments
> 0xB0 all RATIO devices in development:
> <mailto:vgo@ratio.de>
> 0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
> +0xB2 00-0f linux/jtag.h JTAG driver
> + <mailto:oleksandrs@mellanox.com>
> 0xB3 00 linux/mmc/ioctl.h
> 0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org>
> 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc@vger.kernel.org>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 205d397..141aeaf 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7292,6 +7292,14 @@ L: linux-serial at vger.kernel.org
> S: Maintained
> F: drivers/tty/serial/jsm/
>
> +JTAG SUBSYSTEM
> +M: Oleksandr Shamray <oleksandrs@mellanox.com>
> +M: Vadim Pasternak <vadimp@mellanox.com>
> +S: Maintained
> +F: include/linux/jtag.h
> +F: include/uapi/linux/jtag.h
> +F: drivers/jtag/
> +
> K10TEMP HARDWARE MONITORING DRIVER
> M: Clemens Ladisch <clemens@ladisch.de>
> L: linux-hwmon at vger.kernel.org
> diff --git a/drivers/Kconfig b/drivers/Kconfig
> index 505c676..2214678 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -208,4 +208,6 @@ source "drivers/tee/Kconfig"
>
> source "drivers/mux/Kconfig"
>
> +source "drivers/jtag/Kconfig"
> +
> endmenu
> diff --git a/drivers/Makefile b/drivers/Makefile
> index dfdcda0..6a2059b 100644
> --- a/drivers/Makefile
> +++ b/drivers/Makefile
> @@ -182,3 +182,4 @@ obj-$(CONFIG_FPGA) += fpga/
> obj-$(CONFIG_FSI) += fsi/
> obj-$(CONFIG_TEE) += tee/
> obj-$(CONFIG_MULTIPLEXER) += mux/
> +obj-$(CONFIG_JTAG) += jtag/
> diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
> new file mode 100644
> index 0000000..a8d0149
> --- /dev/null
> +++ b/drivers/jtag/Kconfig
> @@ -0,0 +1,18 @@
> +menuconfig JTAG
> + tristate "JTAG support"
> + default n
> + ---help---
> + This provides basic core functionality support for jtag class devices
> + Hardware equipped with JTAG microcontroller which can be built
> + on top of this drivers. Driver exposes the set of IOCTL to the
> + user space for:
> + SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan);
> + SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan);
> + RUNTEST (Forces IEEE 1149.1 bus to a run state for specified
> + number of clocks).
> +
> + If you want this support, you should say Y here.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called jtag.
> +
> diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
> new file mode 100644
> index 0000000..e811330
> --- /dev/null
> +++ b/drivers/jtag/Makefile
> @@ -0,0 +1,2 @@
> +obj-$(CONFIG_JTAG) += jtag.o
> +
> diff --git a/drivers/jtag/jtag.c b/drivers/jtag/jtag.c
> new file mode 100644
> index 0000000..a933bc1
> --- /dev/null
> +++ b/drivers/jtag/jtag.c
> @@ -0,0 +1,347 @@
> +/*
> + * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
> + * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * 3. Neither the names of the copyright holders nor the names of its
> + * contributors may be used to endorse or promote products derived from
> + * this software without specific prior written permission.
> + *
> + * Alternatively, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") version 2 as published by the Free
> + * Software Foundation.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
Maybe using SPDX-License-Identifier could save us from hundred of useless lines !
Neil
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
2017-08-02 13:18 ` Oleksandr Shamray
@ 2017-08-02 14:30 ` Neil Armstrong
-1 siblings, 0 replies; 55+ messages in thread
From: Neil Armstrong @ 2017-08-02 14:30 UTC (permalink / raw)
To: Oleksandr Shamray, gregkh, arnd
Cc: devicetree, jiri, system-sw-low-level, openbmc, linux-kernel,
mec, Jiri Pirko, joel, linux-serial, vadimp, tklauser,
linux-arm-kernel
On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>
> Driver implements the following jtag ops:
> - freq_get;
> - freq_set;
> - status_get;
> - idle;
> - xfer;
>
> It has been tested on Mellanox system with BMC equipped with
> Aspeed 2520 SoC for programming CPLD devices.
>
> Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Jiri Pirko <jiri@mellanox.com>
> ---
> drivers/jtag/Kconfig | 13 +
> drivers/jtag/Makefile | 1 +
> drivers/jtag/jtag-aspeed.c | 802 ++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 816 insertions(+), 0 deletions(-)
> create mode 100644 drivers/jtag/jtag-aspeed.c
>
> diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
> index a8d0149..7bf709c 100644
> --- a/drivers/jtag/Kconfig
> +++ b/drivers/jtag/Kconfig
> @@ -16,3 +16,16 @@ menuconfig JTAG
> To compile this driver as a module, choose M here: the module will
> be called jtag.
>
> +menuconfig JTAG_ASPEED
> + tristate "Aspeed SoC JTAG controller support"
> + depends on JTAG
> + ---help---
> + This provides a support for Aspeed JTAG device, equipped on
> + Aspeed SoC 24xx and 25xx families. Drivers allows programming
> + of hardware devices, connected to SoC through the JTAG interface.
> +
> + If you want this support, you should say Y here.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called aspeed_jtag.
> +
> diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
> index e811330..e9fa7fa 100644
> --- a/drivers/jtag/Makefile
> +++ b/drivers/jtag/Makefile
> @@ -1,2 +1,3 @@
> obj-$(CONFIG_JTAG) += jtag.o
> +obj-$(CONFIG_JTAG_ASPEED) += jtag-aspeed.o
>
> diff --git a/drivers/jtag/jtag-aspeed.c b/drivers/jtag/jtag-aspeed.c
> new file mode 100644
> index 0000000..b820824
> --- /dev/null
> +++ b/drivers/jtag/jtag-aspeed.c
> @@ -0,0 +1,802 @@
> +/*
> + * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
> + * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * 3. Neither the names of the copyright holders nor the names of its
> + * contributors may be used to endorse or promote products derived from
> + * this software without specific prior written permission.
> + *
> + * Alternatively, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") version 2 as published by the Free
> + * Software Foundation.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
Please use SPDX-License-Identifier here aswell.
> +
> +#include <asm/mach-types.h>
> +#include <asm/mach/arch.h>
> +#include <linux/clk.h>
> +#include <linux/device.h>
> +#include <linux/interrupt.h>
> +#include <linux/jtag.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <uapi/linux/jtag.h>
> +
> +#define ASPEED_JTAG_DATA 0x00
> +#define ASPEED_JTAG_INST 0x04
> +#define ASPEED_JTAG_CTRL 0x08
> +#define ASPEED_JTAG_ISR 0x0C
> +#define ASPEED_JTAG_SW 0x10
> +#define ASPEED_JTAG_TCK 0x14
> +#define ASPEED_JTAG_EC 0x18
> +
> +#define ASPEED_JTAG_DATA_MSB 0x01
> +#define ASPEED_JTAG_DATA_CHUNK_SIZE 0x20
> +
> +/* ASPEED_JTAG_CTRL: Engine Control */
> +#define ASPEED_JTAG_CTL_ENG_EN BIT(31)
> +#define ASPEED_JTAG_CTL_ENG_OUT_EN BIT(30)
> +#define ASPEED_JTAG_CTL_FORCE_TMS BIT(29)
> +#define ASPEED_JTAG_CTL_INST_LEN(x) ((x) << 20)
> +#define ASPEED_JTAG_CTL_LASPEED_INST BIT(17)
> +#define ASPEED_JTAG_CTL_INST_EN BIT(16)
> +#define ASPEED_JTAG_CTL_DR_UPDATE BIT(10)
> +#define ASPEED_JTAG_CTL_DATA_LEN(x) ((x) << 4)
> +#define ASPEED_JTAG_CTL_LASPEED_DATA BIT(1)
> +#define ASPEED_JTAG_CTL_DATA_EN BIT(0)
> +
> +/* ASPEED_JTAG_ISR : Interrupt status and enable */
> +#define ASPEED_JTAG_ISR_INST_PAUSE BIT(19)
> +#define ASPEED_JTAG_ISR_INST_COMPLETE BIT(18)
> +#define ASPEED_JTAG_ISR_DATA_PAUSE BIT(17)
> +#define ASPEED_JTAG_ISR_DATA_COMPLETE BIT(16)
> +#define ASPEED_JTAG_ISR_INST_PAUSE_EN BIT(3)
> +#define ASPEED_JTAG_ISR_INST_COMPLETE_EN BIT(2)
> +#define ASPEED_JTAG_ISR_DATA_PAUSE_EN BIT(1)
> +#define ASPEED_JTAG_ISR_DATA_COMPLETE_EN BIT(0)
> +#define ASPEED_JTAG_ISR_INT_EN_MASK GENMASK(3, 0)
> +#define ASPEED_JTAG_ISR_INT_MASK GENMASK(19, 16)
> +
> +/* ASPEED_JTAG_SW : Software Mode and Status */
> +#define ASPEED_JTAG_SW_MODE_EN BIT(19)
> +#define ASPEED_JTAG_SW_MODE_TCK BIT(18)
> +#define ASPEED_JTAG_SW_MODE_TMS BIT(17)
> +#define ASPEED_JTAG_SW_MODE_TDIO BIT(16)
> +
> +/* ASPEED_JTAG_TCK : TCK Control */
> +#define ASPEED_JTAG_TCK_DIVISOR_MASK GENMASK(10, 0)
> +#define ASPEED_JTAG_TCK_GET_DIV(x) ((x) & ASPEED_JTAG_TCK_DIVISOR_MASK)
> +
> +/* ASPEED_JTAG_EC : Controller set for go to IDLE */
> +#define ASPEED_JTAG_EC_GO_IDLE BIT(0)
> +
> +#define ASPEED_JTAG_IOUT_LEN(len) (ASPEED_JTAG_CTL_ENG_EN |\
> + ASPEED_JTAG_CTL_ENG_OUT_EN |\
> + ASPEED_JTAG_CTL_INST_LEN(len))
> +
> +#define ASPEED_JTAG_DOUT_LEN(len) (ASPEED_JTAG_CTL_ENG_EN |\
> + ASPEED_JTAG_CTL_ENG_OUT_EN |\
> + ASPEED_JTAG_CTL_DATA_LEN(len))
> +
> +#define ASPEED_JTAG_TCK_WAIT 10
> +#define ASPEED_JTAG_RESET_CNTR 10
> +
> +#define ASPEED_JTAG_NAME "jtag-aspeed"
> +
> +static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq);
> +static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq);
> +static int aspeed_jtag_status_get(struct jtag *jtag,
> + enum jtag_endstate *status);
> +static int aspeed_jtag_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *runtest);
> +static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer);
> +
> +struct aspeed_jtag {
> + void __iomem *reg_base;
> + struct device *dev;
> + struct clk *pclk;
> + enum jtag_endstate status;
> + int irq;
> + u32 flag;
> + wait_queue_head_t jtag_wq;
> + bool is_open;
> +};
> +
> +static char *end_status_str[] = {"idle", "ir pause", "drpause"};
> +
> +static struct jtag_ops aspeed_jtag_ops = {
> + .freq_get = aspeed_jtag_freq_get,
> + .freq_set = aspeed_jtag_freq_set,
> + .status_get = aspeed_jtag_status_get,
> + .idle = aspeed_jtag_idle,
> + .xfer = aspeed_jtag_xfer
> +};
> +
> +static u32 aspeed_jtag_read(struct aspeed_jtag *aspeed_jtag, u32 reg)
> +{
> + return readl(aspeed_jtag->reg_base + reg);
> +}
> +
> +static void
> +aspeed_jtag_write(struct aspeed_jtag *aspeed_jtag, u32 val, u32 reg)
> +{
> + writel(val, aspeed_jtag->reg_base + reg);
> +}
Maybe readl_relaxed/writel_relaxed would be enough here.
> +
> +static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> + u16 div;
> + u32 tck_val;
> + unsigned long apb_frq;
> +
> + apb_frq = clk_get_rate(aspeed_jtag->pclk);
> + div = (apb_frq % freq == 0) ? (apb_frq / freq) - 1 : (apb_frq / freq);
> + tck_val = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK);
> + aspeed_jtag_write(aspeed_jtag,
> + (tck_val & ASPEED_JTAG_TCK_DIVISOR_MASK) | div,
> + ASPEED_JTAG_TCK);
> + return 0;
> +}
> +
> +static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> + u32 pclk;
> + u32 tck;
> +
> + pclk = clk_get_rate(aspeed_jtag->pclk);
> + tck = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK);
> + *frq = pclk / (ASPEED_JTAG_TCK_GET_DIV(tck) + 1);
> +
> + return 0;
> +}
> +
> +static void aspeed_jtag_sw_delay(struct aspeed_jtag *aspeed_jtag, int cnt)
> +{
> + int i;
> +
> + for (i = 0; i < cnt; i++)
> + aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW);
> +}
> +
> +static char aspeed_jtag_tck_cycle(struct aspeed_jtag *aspeed_jtag,
> + u8 tms, u8 tdi)
> +{
> + char tdo = 0;
> +
> + /* TCK = 0 */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + (tms * ASPEED_JTAG_SW_MODE_TMS) |
> + (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
> +
> + aspeed_jtag_sw_delay(aspeed_jtag, ASPEED_JTAG_TCK_WAIT);
> +
> + /* TCK = 1 */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TCK |
> + (tms * ASPEED_JTAG_SW_MODE_TMS) |
> + (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
> +
> + if (aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW) &
> + ASPEED_JTAG_SW_MODE_TDIO)
> + tdo = 1;
> +
> + aspeed_jtag_sw_delay(aspeed_jtag, ASPEED_JTAG_TCK_WAIT);
> +
> + /* TCK = 0 */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + (tms * ASPEED_JTAG_SW_MODE_TMS) |
> + (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
> + return tdo;
> +}
> +
> +static void aspeed_jtag_wait_instruction_pause(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_INST_PAUSE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_PAUSE;
> +}
> +
> +static void
> +aspeed_jtag_wait_instruction_complete(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_INST_COMPLETE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_COMPLETE;
> +}
> +
> +static void
> +aspeed_jtag_wait_data_pause_complete(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_DATA_PAUSE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_PAUSE;
> +}
> +
> +static void aspeed_jtag_wait_data_complete(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_DATA_COMPLETE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_COMPLETE;
> +}
> +
> +static void aspeed_jtag_sm_cycle(struct aspeed_jtag *aspeed_jtag, u8 *tms,
> + int len)
> +{
> + int i;
> +
> + for (i = 0; i < len; i++)
> + aspeed_jtag_tck_cycle(aspeed_jtag, tms[i], 0);
> +}
> +
> +static void aspeed_jtag_run_test_idle_sw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_run_test_idle *runtest)
> +{
> + char sm_pause_irpause[] = {1, 1, 1, 1, 0, 1, 0};
> + char sm_pause_drpause[] = {1, 1, 1, 0, 1, 0};
> + char sm_idle_irpause[] = {1, 1, 0, 1, 0};
> + char sm_idle_drpause[] = {1, 0, 1, 0};
> + char sm_pause_idle[] = {1, 1, 0};
> + int i;
> +
> + /* SW mode from idle/pause-> to pause/idle */
> + if (runtest->reset) {
> + for (i = 0; i < ASPEED_JTAG_RESET_CNTR; i++)
> + aspeed_jtag_tck_cycle(aspeed_jtag, 1, 0);
> + }
> +
> + switch (aspeed_jtag->status) {
> + case JTAG_STATE_IDLE:
> + switch (runtest->endstate) {
> + case JTAG_STATE_PAUSEIR:
> + /* ->DRSCan->IRSCan->IRCap->IRExit1->PauseIR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_idle_irpause,
> + sizeof(sm_idle_irpause));
> +
> + aspeed_jtag->status = JTAG_STATE_PAUSEIR;
> + break;
> + case JTAG_STATE_PAUSEDR:
> + /* ->DRSCan->DRCap->DRExit1->PauseDR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_idle_drpause,
> + sizeof(sm_idle_drpause));
> +
> + aspeed_jtag->status = JTAG_STATE_PAUSEDR;
> + break;
> + case JTAG_STATE_IDLE:
> + /* IDLE */
> + aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
> + aspeed_jtag->status = JTAG_STATE_IDLE;
> + break;
> + default:
> + break;
> + }
> + break;
> +
> + case JTAG_STATE_PAUSEIR:
> + /* Fall-through */
> + case JTAG_STATE_PAUSEDR:
> + /* From IR/DR Pause */
> + switch (runtest->endstate) {
> + case JTAG_STATE_PAUSEIR:
> + /*
> + * to Exit2 IR/DR->Updt IR/DR->DRSCan->IRSCan->IRCap->
> + * IRExit1->PauseIR
> + */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_irpause,
> + sizeof(sm_pause_irpause));
> +
> + aspeed_jtag->status = JTAG_STATE_PAUSEIR;
> + break;
> + case JTAG_STATE_PAUSEDR:
> + /*
> + * to Exit2 IR/DR->Updt IR/DR->DRSCan->DRCap->
> + * DRExit1->PauseDR
> + */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_drpause,
> + sizeof(sm_pause_drpause));
> + aspeed_jtag->status = JTAG_STATE_PAUSEDR;
> + break;
> + case JTAG_STATE_IDLE:
> + /* to Exit2 IR/DR->Updt IR/DR->IDLE */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_idle,
> + sizeof(sm_pause_idle));
> + aspeed_jtag->status = JTAG_STATE_IDLE;
> + break;
> + default:
> + break;
> + }
> + break;
> +
> + default:
> + dev_err(aspeed_jtag->dev, "aspeed_jtag_run_test_idle error\n");
> + break;
> + }
> +
> + /* Stay on IDLE for at least TCK cycle */
> + for (i = 0; i < runtest->tck; i++)
> + aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
> +}
> +
> +/**
> + * aspeed_jtag_run_test_idle:
> + * JTAG reset: generates at least 9 TMS high and 1 TMS low to force
> + * devices into Run-Test/Idle State.
> + */
> +static int aspeed_jtag_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *runtest)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> +
> + dev_dbg(aspeed_jtag->dev, "aspeed_jtag runtest, status:%d, mode:%s, state:%s, reset:%d, tck:%d\n",
> + aspeed_jtag->status, runtest->mode ? "SW" : "HW",
> + end_status_str[runtest->endstate], runtest->reset,
> + runtest->tck);
> +
> + if (runtest->mode) {
> + aspeed_jtag_run_test_idle_sw(aspeed_jtag, runtest);
> + return 0;
> + }
> +
> + /* Disable sw mode */
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW);
> + /* x TMS high + 1 TMS low */
> + if (runtest->reset)
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN |
> + ASPEED_JTAG_CTL_ENG_OUT_EN |
> + ASPEED_JTAG_CTL_FORCE_TMS, ASPEED_JTAG_CTRL);
> + else
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_EC_GO_IDLE,
> + ASPEED_JTAG_EC);
> +
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> +
> + aspeed_jtag->status = JTAG_STATE_IDLE;
> + return 0;
> +}
> +
> +static void aspeed_jtag_xfer_sw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_xfer *xfer, char *tdio_data)
> +{
> + unsigned long remain_xfer = xfer->length;
> + unsigned long shift_bits = 0;
> + unsigned long index = 0;
> + unsigned long tdi;
> + char tdo;
> + unsigned long *data = (unsigned long *)tdio_data;
> +
> + if (xfer->direction == JTAG_READ_XFER)
> + tdi = UINT_MAX;
> + else
> + tdi = data[index];
> +
> + while (remain_xfer > 1) {
> + tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 0,
> + tdi & ASPEED_JTAG_DATA_MSB);
> + data[index] |= tdo << (shift_bits %
> + ASPEED_JTAG_DATA_CHUNK_SIZE);
> +
> + tdi >>= 1;
> + shift_bits++;
> + remain_xfer--;
> +
> + if (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE == 0) {
> + dev_dbg(aspeed_jtag->dev, "R/W data[%lu]:%lx\n",
> + index, data[index]);
> +
> + tdo = 0;
> + index++;
> +
> + if (xfer->direction == JTAG_READ_XFER)
> + tdi = UINT_MAX;
> + else
> + tdi = data[index];
> + }
> + }
> +
> + tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 1, tdi & ASPEED_JTAG_DATA_MSB);
> + data[index] |= tdo << (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE);
> +}
> +
> +static void aspeed_jtag_xfer_push_data(struct aspeed_jtag *aspeed_jtag,
> + enum jtag_xfer_type type, u32 bits_len)
> +{
> + dev_dbg(aspeed_jtag->dev, "shift bits %d\n", bits_len);
> +
> + if (type == JTAG_SIR_XFER) {
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_IOUT_LEN(bits_len),
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) |
> + ASPEED_JTAG_CTL_INST_EN, ASPEED_JTAG_CTRL);
> + } else {
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len),
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) |
> + ASPEED_JTAG_CTL_DATA_EN, ASPEED_JTAG_CTRL);
> + }
> +}
> +
> +static void aspeed_jtag_xfer_push_data_last(struct aspeed_jtag *aspeed_jtag,
> + enum jtag_xfer_type type,
> + u32 shift_bits,
> + enum jtag_endstate endstate)
> +{
> + if (endstate != JTAG_STATE_IDLE) {
> + if (type == JTAG_SIR_XFER) {
> + dev_dbg(aspeed_jtag->dev, "IR Keep Pause\n");
> +
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits),
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_INST_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_instruction_pause(aspeed_jtag);
> + } else {
> + dev_dbg(aspeed_jtag->dev, "DR Keep Pause\n");
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_DR_UPDATE,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_DR_UPDATE |
> + ASPEED_JTAG_CTL_DATA_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_data_pause_complete(aspeed_jtag);
> + }
> + } else {
> + if (type == JTAG_SIR_XFER) {
> + dev_dbg(aspeed_jtag->dev, "IR go IDLE\n");
> +
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_INST,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_INST |
> + ASPEED_JTAG_CTL_INST_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_instruction_complete(aspeed_jtag);
> + } else {
> + dev_dbg(aspeed_jtag->dev, "DR go IDLE\n");
> +
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_DATA,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_DATA |
> + ASPEED_JTAG_CTL_DATA_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_data_complete(aspeed_jtag);
> + }
> + }
> +}
> +
> +static void aspeed_jtag_xfer_hw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_xfer *xfer, char *tdio_data)
> +{
> + unsigned long remain_xfer = xfer->length;
> + unsigned long *data = (unsigned long *)tdio_data;
> + unsigned long shift_bits;
> + unsigned long index = 0;
> + u32 data_reg;
> +
> + data_reg = xfer->type == JTAG_SIR_XFER ?
> + ASPEED_JTAG_INST : ASPEED_JTAG_DATA;
> + while (remain_xfer) {
> + if (xfer->direction == JTAG_WRITE_XFER) {
> + dev_dbg(aspeed_jtag->dev, "W dr->dr_data[%lu]:%lx\n",
> + index, data[index]);
> +
> + aspeed_jtag_write(aspeed_jtag, data[index], data_reg);
> + } else {
> + aspeed_jtag_write(aspeed_jtag, 0, data_reg);
> + }
> +
> + if (remain_xfer > ASPEED_JTAG_DATA_CHUNK_SIZE) {
> + shift_bits = ASPEED_JTAG_DATA_CHUNK_SIZE;
> +
> + /*
> + * Read bytes were not equals to column length
> + * and go to Pause-DR
> + */
> + aspeed_jtag_xfer_push_data(aspeed_jtag, xfer->type,
> + shift_bits);
> + } else {
> + /*
> + * Read bytes equals to column length =>
> + * Update-DR
> + */
> + shift_bits = remain_xfer;
> + aspeed_jtag_xfer_push_data_last(aspeed_jtag, xfer->type,
> + shift_bits,
> + xfer->endstate);
> + }
> +
> + if (xfer->direction == JTAG_READ_XFER) {
> + if (shift_bits < ASPEED_JTAG_DATA_CHUNK_SIZE) {
> + data[index] = aspeed_jtag_read(aspeed_jtag,
> + data_reg);
> +
> + data[index] >>= ASPEED_JTAG_DATA_CHUNK_SIZE -
> + shift_bits;
> + } else
> + data[index] = aspeed_jtag_read(aspeed_jtag,
> + data_reg);
> + dev_dbg(aspeed_jtag->dev, "R dr->dr_data[%lu]:%lx\n",
> + index, data[index]);
> + }
> +
> + remain_xfer = remain_xfer - shift_bits;
> + index++;
> + dev_dbg(aspeed_jtag->dev, "remain_xfer %lu\n", remain_xfer);
> + }
> +}
> +
> +static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer)
> +{
> + unsigned long remain_xfer = xfer->length;
> + unsigned long *data = (unsigned long *)xfer->tdio;
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> + char sm_update_shiftir[] = {1, 1, 0, 0};
> + char sm_update_shiftdr[] = {1, 0, 0};
> + char sm_pause_idle[] = {1, 1, 0};
> + char sm_pause_update[] = {1, 1};
> + unsigned long offset;
> + char dbg_str[256];
> + int pos = 0;
> + int i;
> +
> + for (offset = 0, i = 0; offset < xfer->length;
> + offset += ASPEED_JTAG_DATA_CHUNK_SIZE, i++) {
> + pos += snprintf(&dbg_str[pos], sizeof(dbg_str) - pos,
> + "0x%08lx ", data[i]);
> + }
> +
> + dev_dbg(aspeed_jtag->dev, "aspeed_jtag %s %s xfer, mode:%s, END:%d, len:%lu, TDI[%s]\n",
> + xfer->type == JTAG_SIR_XFER ? "SIR" : "SDR",
> + xfer->direction == JTAG_READ_XFER ? "READ" : "WRITE",
> + xfer->mode ? "SW" : "HW",
> + xfer->endstate, remain_xfer, dbg_str);
> +
> + if (xfer->mode == JTAG_XFER_SW_MODE) {
> + /* SW mode */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> +
> + if (aspeed_jtag->status != JTAG_STATE_IDLE) {
> + /*IR/DR Pause->Exit2 IR / DR->Update IR /DR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_update,
> + sizeof(sm_pause_update));
> + }
> +
> + if (xfer->type == JTAG_SIR_XFER)
> + /* ->IRSCan->CapIR->ShiftIR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_update_shiftir,
> + sizeof(sm_update_shiftir));
> + else
> + /* ->DRScan->DRCap->DRShift */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_update_shiftdr,
> + sizeof(sm_update_shiftdr));
> +
> + aspeed_jtag_xfer_sw(aspeed_jtag, xfer, xfer->tdio);
> +
> + /* DIPause/DRPause */
> + aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
> +
> + if (xfer->endstate == JTAG_STATE_IDLE) {
> + /* ->DRExit2->DRUpdate->IDLE */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_idle,
> + sizeof(sm_pause_idle));
> + }
> + } else {
> + /* hw mode */
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW);
> + aspeed_jtag_xfer_hw(aspeed_jtag, xfer, xfer->tdio);
> + }
> +
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> + aspeed_jtag->status = xfer->endstate;
> + return 0;
> +}
> +
> +static int aspeed_jtag_status_get(struct jtag *jtag, enum jtag_endstate *status)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> +
> + *status = aspeed_jtag->status;
> + return 0;
> +}
> +
> +static irqreturn_t aspeed_jtag_interrupt(s32 this_irq, void *dev_id)
> +{
> + struct aspeed_jtag *aspeed_jtag = dev_id;
> + u32 status;
> + irqreturn_t ret;
> +
> + status = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_ISR);
> + dev_dbg(aspeed_jtag->dev, "status %x\n", status);
> +
> + if (status & ASPEED_JTAG_ISR_INT_MASK) {
> + aspeed_jtag_write(aspeed_jtag,
> + (status & ASPEED_JTAG_ISR_INT_MASK)
> + | (status & ASPEED_JTAG_ISR_INT_EN_MASK),
> + ASPEED_JTAG_ISR);
> + aspeed_jtag->flag |= status & ASPEED_JTAG_ISR_INT_MASK;
> + }
> +
> + if (aspeed_jtag->flag) {
> + wake_up_interruptible(&aspeed_jtag->jtag_wq);
> + ret = IRQ_HANDLED;
> + } else {
> + dev_err(aspeed_jtag->dev, "aspeed_jtag irq status:%x\n",
> + status);
> + ret = IRQ_NONE;
> + }
> + return ret;
> +}
> +
> +int aspeed_jtag_init(struct platform_device *pdev,
> + struct aspeed_jtag *aspeed_jtag)
> +{
> + struct resource *res;
> + int err;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + aspeed_jtag->reg_base = devm_ioremap_resource(aspeed_jtag->dev, res);
> + if (IS_ERR(aspeed_jtag->reg_base)) {
> + err = -ENOMEM;
> + goto out_region;
> + }
> +
> + aspeed_jtag->pclk = devm_clk_get(aspeed_jtag->dev, NULL);
> + if (IS_ERR(aspeed_jtag->pclk)) {
> + dev_err(aspeed_jtag->dev, "devm_clk_get failed\n");
> + return PTR_ERR(aspeed_jtag->pclk);
> + }
clk_prepare_enable ?
> +
> + aspeed_jtag->irq = platform_get_irq(pdev, 0);
> + if (aspeed_jtag->irq < 0) {
> + dev_err(aspeed_jtag->dev, "no irq specified\n");
> + err = -ENOENT;
> + goto out_region;
> + }
> +
> + /* Enable clock */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN |
> + ASPEED_JTAG_CTL_ENG_OUT_EN, ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> +
> + err = devm_request_irq(aspeed_jtag->dev, aspeed_jtag->irq,
> + aspeed_jtag_interrupt, 0,
> + "aspeed-jtag", aspeed_jtag);
> + if (err) {
> + dev_err(aspeed_jtag->dev, "aspeed_jtag unable to get IRQ");
> + goto out_region;
> + }
> + dev_dbg(&pdev->dev, "aspeed_jtag:IRQ %d.\n", aspeed_jtag->irq);
> +
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_ISR_INST_PAUSE |
> + ASPEED_JTAG_ISR_INST_COMPLETE |
> + ASPEED_JTAG_ISR_DATA_PAUSE |
> + ASPEED_JTAG_ISR_DATA_COMPLETE |
> + ASPEED_JTAG_ISR_INST_PAUSE_EN |
> + ASPEED_JTAG_ISR_INST_COMPLETE_EN |
> + ASPEED_JTAG_ISR_DATA_PAUSE_EN |
> + ASPEED_JTAG_ISR_DATA_COMPLETE_EN,
> + ASPEED_JTAG_ISR);
> +
> + aspeed_jtag->flag = 0;
> + init_waitqueue_head(&aspeed_jtag->jtag_wq);
> + return 0;
> +
> +out_region:
> + release_mem_region(res->start, res->end - res->start + 1);
> + return err;
> +}
> +
> +int aspeed_jtag_deinit(struct platform_device *pdev,
> + struct aspeed_jtag *aspeed_jtag)
> +{
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_ISR);
> + devm_free_irq(aspeed_jtag->dev, aspeed_jtag->irq, aspeed_jtag);
> + /* Disabe clock */
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_CTRL);
clk_prepare_disable ?
> + return 0;
> +}
> +
> +static int aspeed_jtag_probe(struct platform_device *pdev)
> +{
> + struct aspeed_jtag *aspeed_jtag;
> + struct jtag *jtag;
> + int err;
> +
> + if (!of_device_is_compatible(pdev->dev.of_node, "aspeed,aspeed-jtag"))
> + return -ENOMEM;
> +
> + jtag = jtag_alloc(sizeof(*aspeed_jtag), &aspeed_jtag_ops);
> + if (!jtag)
> + return -ENODEV;
> +
> + platform_set_drvdata(pdev, jtag);
> + aspeed_jtag = jtag_priv(jtag);
> + aspeed_jtag->dev = &pdev->dev;
> +
> + /* Initialize device*/
> + err = aspeed_jtag_init(pdev, aspeed_jtag);
> + if (err)
> + goto err_jtag_init;
> +
> + /* Initialize JTAG core structure*/
> + err = jtag_register(jtag);
> + if (err)
> + goto err_jtag_register;
> +
> + return 0;
> +
> +err_jtag_register:
> + aspeed_jtag_deinit(pdev, aspeed_jtag);
> +err_jtag_init:
> + jtag_free(jtag);
> + return err;
> +}
> +
> +static int aspeed_jtag_remove(struct platform_device *pdev)
> +{
> + struct jtag *jtag;
> +
> + jtag = platform_get_drvdata(pdev);
> + aspeed_jtag_deinit(pdev, jtag_priv(jtag));
> + jtag_unregister(jtag);
> + jtag_free(jtag);
> + return 0;
> +}
> +
> +static const struct of_device_id aspeed_jtag_of_match[] = {
> + { .compatible = "aspeed,aspeed-jtag", },
Please use soc-specific compatible name.
> + {}
> +};
> +
> +static struct platform_driver aspeed_jtag_driver = {
> + .probe = aspeed_jtag_probe,
> + .remove = aspeed_jtag_remove,
> + .driver = {
> + .name = ASPEED_JTAG_NAME,
> + .of_match_table = aspeed_jtag_of_match,
> + },
> +};
> +module_platform_driver(aspeed_jtag_driver);
> +
> +MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>");
> +MODULE_DESCRIPTION("ASPEED JTAG driver");
> +MODULE_LICENSE("Dual BSD/GPL");
>
Hi Oleksandr,
Great work, but you forgot to add proper dt-bindings for the driver.
Neil
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-02 14:30 ` Neil Armstrong
0 siblings, 0 replies; 55+ messages in thread
From: Neil Armstrong @ 2017-08-02 14:30 UTC (permalink / raw)
To: linux-arm-kernel
On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>
> Driver implements the following jtag ops:
> - freq_get;
> - freq_set;
> - status_get;
> - idle;
> - xfer;
>
> It has been tested on Mellanox system with BMC equipped with
> Aspeed 2520 SoC for programming CPLD devices.
>
> Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Jiri Pirko <jiri@mellanox.com>
> ---
> drivers/jtag/Kconfig | 13 +
> drivers/jtag/Makefile | 1 +
> drivers/jtag/jtag-aspeed.c | 802 ++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 816 insertions(+), 0 deletions(-)
> create mode 100644 drivers/jtag/jtag-aspeed.c
>
> diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
> index a8d0149..7bf709c 100644
> --- a/drivers/jtag/Kconfig
> +++ b/drivers/jtag/Kconfig
> @@ -16,3 +16,16 @@ menuconfig JTAG
> To compile this driver as a module, choose M here: the module will
> be called jtag.
>
> +menuconfig JTAG_ASPEED
> + tristate "Aspeed SoC JTAG controller support"
> + depends on JTAG
> + ---help---
> + This provides a support for Aspeed JTAG device, equipped on
> + Aspeed SoC 24xx and 25xx families. Drivers allows programming
> + of hardware devices, connected to SoC through the JTAG interface.
> +
> + If you want this support, you should say Y here.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called aspeed_jtag.
> +
> diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
> index e811330..e9fa7fa 100644
> --- a/drivers/jtag/Makefile
> +++ b/drivers/jtag/Makefile
> @@ -1,2 +1,3 @@
> obj-$(CONFIG_JTAG) += jtag.o
> +obj-$(CONFIG_JTAG_ASPEED) += jtag-aspeed.o
>
> diff --git a/drivers/jtag/jtag-aspeed.c b/drivers/jtag/jtag-aspeed.c
> new file mode 100644
> index 0000000..b820824
> --- /dev/null
> +++ b/drivers/jtag/jtag-aspeed.c
> @@ -0,0 +1,802 @@
> +/*
> + * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
> + * Copyright (c) 2017 Oleksandr Shamray <oleksandrs@mellanox.com>
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * 3. Neither the names of the copyright holders nor the names of its
> + * contributors may be used to endorse or promote products derived from
> + * this software without specific prior written permission.
> + *
> + * Alternatively, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") version 2 as published by the Free
> + * Software Foundation.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + */
Please use SPDX-License-Identifier here aswell.
> +
> +#include <asm/mach-types.h>
> +#include <asm/mach/arch.h>
> +#include <linux/clk.h>
> +#include <linux/device.h>
> +#include <linux/interrupt.h>
> +#include <linux/jtag.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <uapi/linux/jtag.h>
> +
> +#define ASPEED_JTAG_DATA 0x00
> +#define ASPEED_JTAG_INST 0x04
> +#define ASPEED_JTAG_CTRL 0x08
> +#define ASPEED_JTAG_ISR 0x0C
> +#define ASPEED_JTAG_SW 0x10
> +#define ASPEED_JTAG_TCK 0x14
> +#define ASPEED_JTAG_EC 0x18
> +
> +#define ASPEED_JTAG_DATA_MSB 0x01
> +#define ASPEED_JTAG_DATA_CHUNK_SIZE 0x20
> +
> +/* ASPEED_JTAG_CTRL: Engine Control */
> +#define ASPEED_JTAG_CTL_ENG_EN BIT(31)
> +#define ASPEED_JTAG_CTL_ENG_OUT_EN BIT(30)
> +#define ASPEED_JTAG_CTL_FORCE_TMS BIT(29)
> +#define ASPEED_JTAG_CTL_INST_LEN(x) ((x) << 20)
> +#define ASPEED_JTAG_CTL_LASPEED_INST BIT(17)
> +#define ASPEED_JTAG_CTL_INST_EN BIT(16)
> +#define ASPEED_JTAG_CTL_DR_UPDATE BIT(10)
> +#define ASPEED_JTAG_CTL_DATA_LEN(x) ((x) << 4)
> +#define ASPEED_JTAG_CTL_LASPEED_DATA BIT(1)
> +#define ASPEED_JTAG_CTL_DATA_EN BIT(0)
> +
> +/* ASPEED_JTAG_ISR : Interrupt status and enable */
> +#define ASPEED_JTAG_ISR_INST_PAUSE BIT(19)
> +#define ASPEED_JTAG_ISR_INST_COMPLETE BIT(18)
> +#define ASPEED_JTAG_ISR_DATA_PAUSE BIT(17)
> +#define ASPEED_JTAG_ISR_DATA_COMPLETE BIT(16)
> +#define ASPEED_JTAG_ISR_INST_PAUSE_EN BIT(3)
> +#define ASPEED_JTAG_ISR_INST_COMPLETE_EN BIT(2)
> +#define ASPEED_JTAG_ISR_DATA_PAUSE_EN BIT(1)
> +#define ASPEED_JTAG_ISR_DATA_COMPLETE_EN BIT(0)
> +#define ASPEED_JTAG_ISR_INT_EN_MASK GENMASK(3, 0)
> +#define ASPEED_JTAG_ISR_INT_MASK GENMASK(19, 16)
> +
> +/* ASPEED_JTAG_SW : Software Mode and Status */
> +#define ASPEED_JTAG_SW_MODE_EN BIT(19)
> +#define ASPEED_JTAG_SW_MODE_TCK BIT(18)
> +#define ASPEED_JTAG_SW_MODE_TMS BIT(17)
> +#define ASPEED_JTAG_SW_MODE_TDIO BIT(16)
> +
> +/* ASPEED_JTAG_TCK : TCK Control */
> +#define ASPEED_JTAG_TCK_DIVISOR_MASK GENMASK(10, 0)
> +#define ASPEED_JTAG_TCK_GET_DIV(x) ((x) & ASPEED_JTAG_TCK_DIVISOR_MASK)
> +
> +/* ASPEED_JTAG_EC : Controller set for go to IDLE */
> +#define ASPEED_JTAG_EC_GO_IDLE BIT(0)
> +
> +#define ASPEED_JTAG_IOUT_LEN(len) (ASPEED_JTAG_CTL_ENG_EN |\
> + ASPEED_JTAG_CTL_ENG_OUT_EN |\
> + ASPEED_JTAG_CTL_INST_LEN(len))
> +
> +#define ASPEED_JTAG_DOUT_LEN(len) (ASPEED_JTAG_CTL_ENG_EN |\
> + ASPEED_JTAG_CTL_ENG_OUT_EN |\
> + ASPEED_JTAG_CTL_DATA_LEN(len))
> +
> +#define ASPEED_JTAG_TCK_WAIT 10
> +#define ASPEED_JTAG_RESET_CNTR 10
> +
> +#define ASPEED_JTAG_NAME "jtag-aspeed"
> +
> +static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq);
> +static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq);
> +static int aspeed_jtag_status_get(struct jtag *jtag,
> + enum jtag_endstate *status);
> +static int aspeed_jtag_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *runtest);
> +static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer);
> +
> +struct aspeed_jtag {
> + void __iomem *reg_base;
> + struct device *dev;
> + struct clk *pclk;
> + enum jtag_endstate status;
> + int irq;
> + u32 flag;
> + wait_queue_head_t jtag_wq;
> + bool is_open;
> +};
> +
> +static char *end_status_str[] = {"idle", "ir pause", "drpause"};
> +
> +static struct jtag_ops aspeed_jtag_ops = {
> + .freq_get = aspeed_jtag_freq_get,
> + .freq_set = aspeed_jtag_freq_set,
> + .status_get = aspeed_jtag_status_get,
> + .idle = aspeed_jtag_idle,
> + .xfer = aspeed_jtag_xfer
> +};
> +
> +static u32 aspeed_jtag_read(struct aspeed_jtag *aspeed_jtag, u32 reg)
> +{
> + return readl(aspeed_jtag->reg_base + reg);
> +}
> +
> +static void
> +aspeed_jtag_write(struct aspeed_jtag *aspeed_jtag, u32 val, u32 reg)
> +{
> + writel(val, aspeed_jtag->reg_base + reg);
> +}
Maybe readl_relaxed/writel_relaxed would be enough here.
> +
> +static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> + u16 div;
> + u32 tck_val;
> + unsigned long apb_frq;
> +
> + apb_frq = clk_get_rate(aspeed_jtag->pclk);
> + div = (apb_frq % freq == 0) ? (apb_frq / freq) - 1 : (apb_frq / freq);
> + tck_val = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK);
> + aspeed_jtag_write(aspeed_jtag,
> + (tck_val & ASPEED_JTAG_TCK_DIVISOR_MASK) | div,
> + ASPEED_JTAG_TCK);
> + return 0;
> +}
> +
> +static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> + u32 pclk;
> + u32 tck;
> +
> + pclk = clk_get_rate(aspeed_jtag->pclk);
> + tck = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK);
> + *frq = pclk / (ASPEED_JTAG_TCK_GET_DIV(tck) + 1);
> +
> + return 0;
> +}
> +
> +static void aspeed_jtag_sw_delay(struct aspeed_jtag *aspeed_jtag, int cnt)
> +{
> + int i;
> +
> + for (i = 0; i < cnt; i++)
> + aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW);
> +}
> +
> +static char aspeed_jtag_tck_cycle(struct aspeed_jtag *aspeed_jtag,
> + u8 tms, u8 tdi)
> +{
> + char tdo = 0;
> +
> + /* TCK = 0 */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + (tms * ASPEED_JTAG_SW_MODE_TMS) |
> + (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
> +
> + aspeed_jtag_sw_delay(aspeed_jtag, ASPEED_JTAG_TCK_WAIT);
> +
> + /* TCK = 1 */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TCK |
> + (tms * ASPEED_JTAG_SW_MODE_TMS) |
> + (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
> +
> + if (aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW) &
> + ASPEED_JTAG_SW_MODE_TDIO)
> + tdo = 1;
> +
> + aspeed_jtag_sw_delay(aspeed_jtag, ASPEED_JTAG_TCK_WAIT);
> +
> + /* TCK = 0 */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + (tms * ASPEED_JTAG_SW_MODE_TMS) |
> + (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW);
> + return tdo;
> +}
> +
> +static void aspeed_jtag_wait_instruction_pause(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_INST_PAUSE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_PAUSE;
> +}
> +
> +static void
> +aspeed_jtag_wait_instruction_complete(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_INST_COMPLETE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_COMPLETE;
> +}
> +
> +static void
> +aspeed_jtag_wait_data_pause_complete(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_DATA_PAUSE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_PAUSE;
> +}
> +
> +static void aspeed_jtag_wait_data_complete(struct aspeed_jtag *aspeed_jtag)
> +{
> + wait_event_interruptible(aspeed_jtag->jtag_wq, aspeed_jtag->flag &
> + ASPEED_JTAG_ISR_DATA_COMPLETE);
> + aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_COMPLETE;
> +}
> +
> +static void aspeed_jtag_sm_cycle(struct aspeed_jtag *aspeed_jtag, u8 *tms,
> + int len)
> +{
> + int i;
> +
> + for (i = 0; i < len; i++)
> + aspeed_jtag_tck_cycle(aspeed_jtag, tms[i], 0);
> +}
> +
> +static void aspeed_jtag_run_test_idle_sw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_run_test_idle *runtest)
> +{
> + char sm_pause_irpause[] = {1, 1, 1, 1, 0, 1, 0};
> + char sm_pause_drpause[] = {1, 1, 1, 0, 1, 0};
> + char sm_idle_irpause[] = {1, 1, 0, 1, 0};
> + char sm_idle_drpause[] = {1, 0, 1, 0};
> + char sm_pause_idle[] = {1, 1, 0};
> + int i;
> +
> + /* SW mode from idle/pause-> to pause/idle */
> + if (runtest->reset) {
> + for (i = 0; i < ASPEED_JTAG_RESET_CNTR; i++)
> + aspeed_jtag_tck_cycle(aspeed_jtag, 1, 0);
> + }
> +
> + switch (aspeed_jtag->status) {
> + case JTAG_STATE_IDLE:
> + switch (runtest->endstate) {
> + case JTAG_STATE_PAUSEIR:
> + /* ->DRSCan->IRSCan->IRCap->IRExit1->PauseIR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_idle_irpause,
> + sizeof(sm_idle_irpause));
> +
> + aspeed_jtag->status = JTAG_STATE_PAUSEIR;
> + break;
> + case JTAG_STATE_PAUSEDR:
> + /* ->DRSCan->DRCap->DRExit1->PauseDR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_idle_drpause,
> + sizeof(sm_idle_drpause));
> +
> + aspeed_jtag->status = JTAG_STATE_PAUSEDR;
> + break;
> + case JTAG_STATE_IDLE:
> + /* IDLE */
> + aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
> + aspeed_jtag->status = JTAG_STATE_IDLE;
> + break;
> + default:
> + break;
> + }
> + break;
> +
> + case JTAG_STATE_PAUSEIR:
> + /* Fall-through */
> + case JTAG_STATE_PAUSEDR:
> + /* From IR/DR Pause */
> + switch (runtest->endstate) {
> + case JTAG_STATE_PAUSEIR:
> + /*
> + * to Exit2 IR/DR->Updt IR/DR->DRSCan->IRSCan->IRCap->
> + * IRExit1->PauseIR
> + */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_irpause,
> + sizeof(sm_pause_irpause));
> +
> + aspeed_jtag->status = JTAG_STATE_PAUSEIR;
> + break;
> + case JTAG_STATE_PAUSEDR:
> + /*
> + * to Exit2 IR/DR->Updt IR/DR->DRSCan->DRCap->
> + * DRExit1->PauseDR
> + */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_drpause,
> + sizeof(sm_pause_drpause));
> + aspeed_jtag->status = JTAG_STATE_PAUSEDR;
> + break;
> + case JTAG_STATE_IDLE:
> + /* to Exit2 IR/DR->Updt IR/DR->IDLE */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_idle,
> + sizeof(sm_pause_idle));
> + aspeed_jtag->status = JTAG_STATE_IDLE;
> + break;
> + default:
> + break;
> + }
> + break;
> +
> + default:
> + dev_err(aspeed_jtag->dev, "aspeed_jtag_run_test_idle error\n");
> + break;
> + }
> +
> + /* Stay on IDLE for at least TCK cycle */
> + for (i = 0; i < runtest->tck; i++)
> + aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
> +}
> +
> +/**
> + * aspeed_jtag_run_test_idle:
> + * JTAG reset: generates at least 9 TMS high and 1 TMS low to force
> + * devices into Run-Test/Idle State.
> + */
> +static int aspeed_jtag_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *runtest)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> +
> + dev_dbg(aspeed_jtag->dev, "aspeed_jtag runtest, status:%d, mode:%s, state:%s, reset:%d, tck:%d\n",
> + aspeed_jtag->status, runtest->mode ? "SW" : "HW",
> + end_status_str[runtest->endstate], runtest->reset,
> + runtest->tck);
> +
> + if (runtest->mode) {
> + aspeed_jtag_run_test_idle_sw(aspeed_jtag, runtest);
> + return 0;
> + }
> +
> + /* Disable sw mode */
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW);
> + /* x TMS high + 1 TMS low */
> + if (runtest->reset)
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN |
> + ASPEED_JTAG_CTL_ENG_OUT_EN |
> + ASPEED_JTAG_CTL_FORCE_TMS, ASPEED_JTAG_CTRL);
> + else
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_EC_GO_IDLE,
> + ASPEED_JTAG_EC);
> +
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> +
> + aspeed_jtag->status = JTAG_STATE_IDLE;
> + return 0;
> +}
> +
> +static void aspeed_jtag_xfer_sw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_xfer *xfer, char *tdio_data)
> +{
> + unsigned long remain_xfer = xfer->length;
> + unsigned long shift_bits = 0;
> + unsigned long index = 0;
> + unsigned long tdi;
> + char tdo;
> + unsigned long *data = (unsigned long *)tdio_data;
> +
> + if (xfer->direction == JTAG_READ_XFER)
> + tdi = UINT_MAX;
> + else
> + tdi = data[index];
> +
> + while (remain_xfer > 1) {
> + tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 0,
> + tdi & ASPEED_JTAG_DATA_MSB);
> + data[index] |= tdo << (shift_bits %
> + ASPEED_JTAG_DATA_CHUNK_SIZE);
> +
> + tdi >>= 1;
> + shift_bits++;
> + remain_xfer--;
> +
> + if (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE == 0) {
> + dev_dbg(aspeed_jtag->dev, "R/W data[%lu]:%lx\n",
> + index, data[index]);
> +
> + tdo = 0;
> + index++;
> +
> + if (xfer->direction == JTAG_READ_XFER)
> + tdi = UINT_MAX;
> + else
> + tdi = data[index];
> + }
> + }
> +
> + tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 1, tdi & ASPEED_JTAG_DATA_MSB);
> + data[index] |= tdo << (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE);
> +}
> +
> +static void aspeed_jtag_xfer_push_data(struct aspeed_jtag *aspeed_jtag,
> + enum jtag_xfer_type type, u32 bits_len)
> +{
> + dev_dbg(aspeed_jtag->dev, "shift bits %d\n", bits_len);
> +
> + if (type == JTAG_SIR_XFER) {
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_IOUT_LEN(bits_len),
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) |
> + ASPEED_JTAG_CTL_INST_EN, ASPEED_JTAG_CTRL);
> + } else {
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len),
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) |
> + ASPEED_JTAG_CTL_DATA_EN, ASPEED_JTAG_CTRL);
> + }
> +}
> +
> +static void aspeed_jtag_xfer_push_data_last(struct aspeed_jtag *aspeed_jtag,
> + enum jtag_xfer_type type,
> + u32 shift_bits,
> + enum jtag_endstate endstate)
> +{
> + if (endstate != JTAG_STATE_IDLE) {
> + if (type == JTAG_SIR_XFER) {
> + dev_dbg(aspeed_jtag->dev, "IR Keep Pause\n");
> +
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits),
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_INST_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_instruction_pause(aspeed_jtag);
> + } else {
> + dev_dbg(aspeed_jtag->dev, "DR Keep Pause\n");
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_DR_UPDATE,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_DR_UPDATE |
> + ASPEED_JTAG_CTL_DATA_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_data_pause_complete(aspeed_jtag);
> + }
> + } else {
> + if (type == JTAG_SIR_XFER) {
> + dev_dbg(aspeed_jtag->dev, "IR go IDLE\n");
> +
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_INST,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_IOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_INST |
> + ASPEED_JTAG_CTL_INST_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_instruction_complete(aspeed_jtag);
> + } else {
> + dev_dbg(aspeed_jtag->dev, "DR go IDLE\n");
> +
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_DATA,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag,
> + ASPEED_JTAG_DOUT_LEN(shift_bits) |
> + ASPEED_JTAG_CTL_LASPEED_DATA |
> + ASPEED_JTAG_CTL_DATA_EN,
> + ASPEED_JTAG_CTRL);
> + aspeed_jtag_wait_data_complete(aspeed_jtag);
> + }
> + }
> +}
> +
> +static void aspeed_jtag_xfer_hw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_xfer *xfer, char *tdio_data)
> +{
> + unsigned long remain_xfer = xfer->length;
> + unsigned long *data = (unsigned long *)tdio_data;
> + unsigned long shift_bits;
> + unsigned long index = 0;
> + u32 data_reg;
> +
> + data_reg = xfer->type == JTAG_SIR_XFER ?
> + ASPEED_JTAG_INST : ASPEED_JTAG_DATA;
> + while (remain_xfer) {
> + if (xfer->direction == JTAG_WRITE_XFER) {
> + dev_dbg(aspeed_jtag->dev, "W dr->dr_data[%lu]:%lx\n",
> + index, data[index]);
> +
> + aspeed_jtag_write(aspeed_jtag, data[index], data_reg);
> + } else {
> + aspeed_jtag_write(aspeed_jtag, 0, data_reg);
> + }
> +
> + if (remain_xfer > ASPEED_JTAG_DATA_CHUNK_SIZE) {
> + shift_bits = ASPEED_JTAG_DATA_CHUNK_SIZE;
> +
> + /*
> + * Read bytes were not equals to column length
> + * and go to Pause-DR
> + */
> + aspeed_jtag_xfer_push_data(aspeed_jtag, xfer->type,
> + shift_bits);
> + } else {
> + /*
> + * Read bytes equals to column length =>
> + * Update-DR
> + */
> + shift_bits = remain_xfer;
> + aspeed_jtag_xfer_push_data_last(aspeed_jtag, xfer->type,
> + shift_bits,
> + xfer->endstate);
> + }
> +
> + if (xfer->direction == JTAG_READ_XFER) {
> + if (shift_bits < ASPEED_JTAG_DATA_CHUNK_SIZE) {
> + data[index] = aspeed_jtag_read(aspeed_jtag,
> + data_reg);
> +
> + data[index] >>= ASPEED_JTAG_DATA_CHUNK_SIZE -
> + shift_bits;
> + } else
> + data[index] = aspeed_jtag_read(aspeed_jtag,
> + data_reg);
> + dev_dbg(aspeed_jtag->dev, "R dr->dr_data[%lu]:%lx\n",
> + index, data[index]);
> + }
> +
> + remain_xfer = remain_xfer - shift_bits;
> + index++;
> + dev_dbg(aspeed_jtag->dev, "remain_xfer %lu\n", remain_xfer);
> + }
> +}
> +
> +static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer)
> +{
> + unsigned long remain_xfer = xfer->length;
> + unsigned long *data = (unsigned long *)xfer->tdio;
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> + char sm_update_shiftir[] = {1, 1, 0, 0};
> + char sm_update_shiftdr[] = {1, 0, 0};
> + char sm_pause_idle[] = {1, 1, 0};
> + char sm_pause_update[] = {1, 1};
> + unsigned long offset;
> + char dbg_str[256];
> + int pos = 0;
> + int i;
> +
> + for (offset = 0, i = 0; offset < xfer->length;
> + offset += ASPEED_JTAG_DATA_CHUNK_SIZE, i++) {
> + pos += snprintf(&dbg_str[pos], sizeof(dbg_str) - pos,
> + "0x%08lx ", data[i]);
> + }
> +
> + dev_dbg(aspeed_jtag->dev, "aspeed_jtag %s %s xfer, mode:%s, END:%d, len:%lu, TDI[%s]\n",
> + xfer->type == JTAG_SIR_XFER ? "SIR" : "SDR",
> + xfer->direction == JTAG_READ_XFER ? "READ" : "WRITE",
> + xfer->mode ? "SW" : "HW",
> + xfer->endstate, remain_xfer, dbg_str);
> +
> + if (xfer->mode == JTAG_XFER_SW_MODE) {
> + /* SW mode */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> +
> + if (aspeed_jtag->status != JTAG_STATE_IDLE) {
> + /*IR/DR Pause->Exit2 IR / DR->Update IR /DR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_update,
> + sizeof(sm_pause_update));
> + }
> +
> + if (xfer->type == JTAG_SIR_XFER)
> + /* ->IRSCan->CapIR->ShiftIR */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_update_shiftir,
> + sizeof(sm_update_shiftir));
> + else
> + /* ->DRScan->DRCap->DRShift */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_update_shiftdr,
> + sizeof(sm_update_shiftdr));
> +
> + aspeed_jtag_xfer_sw(aspeed_jtag, xfer, xfer->tdio);
> +
> + /* DIPause/DRPause */
> + aspeed_jtag_tck_cycle(aspeed_jtag, 0, 0);
> +
> + if (xfer->endstate == JTAG_STATE_IDLE) {
> + /* ->DRExit2->DRUpdate->IDLE */
> + aspeed_jtag_sm_cycle(aspeed_jtag, sm_pause_idle,
> + sizeof(sm_pause_idle));
> + }
> + } else {
> + /* hw mode */
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW);
> + aspeed_jtag_xfer_hw(aspeed_jtag, xfer, xfer->tdio);
> + }
> +
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> + aspeed_jtag->status = xfer->endstate;
> + return 0;
> +}
> +
> +static int aspeed_jtag_status_get(struct jtag *jtag, enum jtag_endstate *status)
> +{
> + struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag);
> +
> + *status = aspeed_jtag->status;
> + return 0;
> +}
> +
> +static irqreturn_t aspeed_jtag_interrupt(s32 this_irq, void *dev_id)
> +{
> + struct aspeed_jtag *aspeed_jtag = dev_id;
> + u32 status;
> + irqreturn_t ret;
> +
> + status = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_ISR);
> + dev_dbg(aspeed_jtag->dev, "status %x\n", status);
> +
> + if (status & ASPEED_JTAG_ISR_INT_MASK) {
> + aspeed_jtag_write(aspeed_jtag,
> + (status & ASPEED_JTAG_ISR_INT_MASK)
> + | (status & ASPEED_JTAG_ISR_INT_EN_MASK),
> + ASPEED_JTAG_ISR);
> + aspeed_jtag->flag |= status & ASPEED_JTAG_ISR_INT_MASK;
> + }
> +
> + if (aspeed_jtag->flag) {
> + wake_up_interruptible(&aspeed_jtag->jtag_wq);
> + ret = IRQ_HANDLED;
> + } else {
> + dev_err(aspeed_jtag->dev, "aspeed_jtag irq status:%x\n",
> + status);
> + ret = IRQ_NONE;
> + }
> + return ret;
> +}
> +
> +int aspeed_jtag_init(struct platform_device *pdev,
> + struct aspeed_jtag *aspeed_jtag)
> +{
> + struct resource *res;
> + int err;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + aspeed_jtag->reg_base = devm_ioremap_resource(aspeed_jtag->dev, res);
> + if (IS_ERR(aspeed_jtag->reg_base)) {
> + err = -ENOMEM;
> + goto out_region;
> + }
> +
> + aspeed_jtag->pclk = devm_clk_get(aspeed_jtag->dev, NULL);
> + if (IS_ERR(aspeed_jtag->pclk)) {
> + dev_err(aspeed_jtag->dev, "devm_clk_get failed\n");
> + return PTR_ERR(aspeed_jtag->pclk);
> + }
clk_prepare_enable ?
> +
> + aspeed_jtag->irq = platform_get_irq(pdev, 0);
> + if (aspeed_jtag->irq < 0) {
> + dev_err(aspeed_jtag->dev, "no irq specified\n");
> + err = -ENOENT;
> + goto out_region;
> + }
> +
> + /* Enable clock */
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN |
> + ASPEED_JTAG_CTL_ENG_OUT_EN, ASPEED_JTAG_CTRL);
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN |
> + ASPEED_JTAG_SW_MODE_TDIO, ASPEED_JTAG_SW);
> +
> + err = devm_request_irq(aspeed_jtag->dev, aspeed_jtag->irq,
> + aspeed_jtag_interrupt, 0,
> + "aspeed-jtag", aspeed_jtag);
> + if (err) {
> + dev_err(aspeed_jtag->dev, "aspeed_jtag unable to get IRQ");
> + goto out_region;
> + }
> + dev_dbg(&pdev->dev, "aspeed_jtag:IRQ %d.\n", aspeed_jtag->irq);
> +
> + aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_ISR_INST_PAUSE |
> + ASPEED_JTAG_ISR_INST_COMPLETE |
> + ASPEED_JTAG_ISR_DATA_PAUSE |
> + ASPEED_JTAG_ISR_DATA_COMPLETE |
> + ASPEED_JTAG_ISR_INST_PAUSE_EN |
> + ASPEED_JTAG_ISR_INST_COMPLETE_EN |
> + ASPEED_JTAG_ISR_DATA_PAUSE_EN |
> + ASPEED_JTAG_ISR_DATA_COMPLETE_EN,
> + ASPEED_JTAG_ISR);
> +
> + aspeed_jtag->flag = 0;
> + init_waitqueue_head(&aspeed_jtag->jtag_wq);
> + return 0;
> +
> +out_region:
> + release_mem_region(res->start, res->end - res->start + 1);
> + return err;
> +}
> +
> +int aspeed_jtag_deinit(struct platform_device *pdev,
> + struct aspeed_jtag *aspeed_jtag)
> +{
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_ISR);
> + devm_free_irq(aspeed_jtag->dev, aspeed_jtag->irq, aspeed_jtag);
> + /* Disabe clock */
> + aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_CTRL);
clk_prepare_disable ?
> + return 0;
> +}
> +
> +static int aspeed_jtag_probe(struct platform_device *pdev)
> +{
> + struct aspeed_jtag *aspeed_jtag;
> + struct jtag *jtag;
> + int err;
> +
> + if (!of_device_is_compatible(pdev->dev.of_node, "aspeed,aspeed-jtag"))
> + return -ENOMEM;
> +
> + jtag = jtag_alloc(sizeof(*aspeed_jtag), &aspeed_jtag_ops);
> + if (!jtag)
> + return -ENODEV;
> +
> + platform_set_drvdata(pdev, jtag);
> + aspeed_jtag = jtag_priv(jtag);
> + aspeed_jtag->dev = &pdev->dev;
> +
> + /* Initialize device*/
> + err = aspeed_jtag_init(pdev, aspeed_jtag);
> + if (err)
> + goto err_jtag_init;
> +
> + /* Initialize JTAG core structure*/
> + err = jtag_register(jtag);
> + if (err)
> + goto err_jtag_register;
> +
> + return 0;
> +
> +err_jtag_register:
> + aspeed_jtag_deinit(pdev, aspeed_jtag);
> +err_jtag_init:
> + jtag_free(jtag);
> + return err;
> +}
> +
> +static int aspeed_jtag_remove(struct platform_device *pdev)
> +{
> + struct jtag *jtag;
> +
> + jtag = platform_get_drvdata(pdev);
> + aspeed_jtag_deinit(pdev, jtag_priv(jtag));
> + jtag_unregister(jtag);
> + jtag_free(jtag);
> + return 0;
> +}
> +
> +static const struct of_device_id aspeed_jtag_of_match[] = {
> + { .compatible = "aspeed,aspeed-jtag", },
Please use soc-specific compatible name.
> + {}
> +};
> +
> +static struct platform_driver aspeed_jtag_driver = {
> + .probe = aspeed_jtag_probe,
> + .remove = aspeed_jtag_remove,
> + .driver = {
> + .name = ASPEED_JTAG_NAME,
> + .of_match_table = aspeed_jtag_of_match,
> + },
> +};
> +module_platform_driver(aspeed_jtag_driver);
> +
> +MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>");
> +MODULE_DESCRIPTION("ASPEED JTAG driver");
> +MODULE_LICENSE("Dual BSD/GPL");
>
Hi Oleksandr,
Great work, but you forgot to add proper dt-bindings for the driver.
Neil
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-02 14:54 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2017-08-02 14:54 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, Linux Kernel Mailing List, Linux ARM, devicetree,
OpenBMC Maillist, Joel Stanley, Jiří Pírko,
Tobias Klauser, linux-serial, mec, vadimp, system-sw-low-level,
Jiri Pirko
On Wed, Aug 2, 2017 at 3:18 PM, Oleksandr Shamray
<oleksandrs@mellanox.com> wrote:
> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>
> Driver implements the following jtag ops:
> - freq_get;
> - freq_set;
> - status_get;
> - idle;
> - xfer;
>
> It has been tested on Mellanox system with BMC equipped with
> Aspeed 2520 SoC for programming CPLD devices.
>
> Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Looking at this one before the subsystem. Overall looks really nice,
it seems you got a good abstraction between the subsystem and the
driver.
> +
> +static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq);
> +static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq);
> +static int aspeed_jtag_status_get(struct jtag *jtag,
> + enum jtag_endstate *status);
> +static int aspeed_jtag_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *runtest);
> +static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer);
Please try to reorder the functions definitions in a way that lets you
remove the forward declarations.
> +
> +static void aspeed_jtag_run_test_idle_sw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_run_test_idle *runtest)
> +{
> + char sm_pause_irpause[] = {1, 1, 1, 1, 0, 1, 0};
> + char sm_pause_drpause[] = {1, 1, 1, 0, 1, 0};
> + char sm_idle_irpause[] = {1, 1, 0, 1, 0};
> + char sm_idle_drpause[] = {1, 0, 1, 0};
> + char sm_pause_idle[] = {1, 1, 0};
These could be 'static const' if you adapt the aspeed_jtag_sm_cycle
prototype accordingly.
> +
> +static const struct of_device_id aspeed_jtag_of_match[] = {
> + { .compatible = "aspeed,aspeed-jtag", },
> + {}
> +};
The series should include a patch for the DT binding for this device.
You may want to be a little more specific here, to avoid problems if
aspeed ever makes an updated version of this device with a slightly
different register interface. Usually we include the full name of the
SoC in the "compatible" string for that.
Arnd
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-02 14:54 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2017-08-02 14:54 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, Linux Kernel Mailing List, Linux ARM,
devicetree-u79uwXL29TY76Z2rM5mHXA, OpenBMC Maillist,
Joel Stanley, Jiří Pírko, Tobias Klauser,
linux-serial-u79uwXL29TY76Z2rM5mHXA, mec-WqBc5aa1uDFeoWH0uzbU5w,
vadimp-45czdsxZ+A5DPfheJLI6IQ,
system-sw-low-level-VPRAkNaXOzVWk0Htik3J/w, Jiri Pirko
On Wed, Aug 2, 2017 at 3:18 PM, Oleksandr Shamray
<oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org> wrote:
> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>
> Driver implements the following jtag ops:
> - freq_get;
> - freq_set;
> - status_get;
> - idle;
> - xfer;
>
> It has been tested on Mellanox system with BMC equipped with
> Aspeed 2520 SoC for programming CPLD devices.
>
> Signed-off-by: Oleksandr Shamray <oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> Signed-off-by: Jiri Pirko <jiri-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
Looking at this one before the subsystem. Overall looks really nice,
it seems you got a good abstraction between the subsystem and the
driver.
> +
> +static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq);
> +static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq);
> +static int aspeed_jtag_status_get(struct jtag *jtag,
> + enum jtag_endstate *status);
> +static int aspeed_jtag_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *runtest);
> +static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer);
Please try to reorder the functions definitions in a way that lets you
remove the forward declarations.
> +
> +static void aspeed_jtag_run_test_idle_sw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_run_test_idle *runtest)
> +{
> + char sm_pause_irpause[] = {1, 1, 1, 1, 0, 1, 0};
> + char sm_pause_drpause[] = {1, 1, 1, 0, 1, 0};
> + char sm_idle_irpause[] = {1, 1, 0, 1, 0};
> + char sm_idle_drpause[] = {1, 0, 1, 0};
> + char sm_pause_idle[] = {1, 1, 0};
These could be 'static const' if you adapt the aspeed_jtag_sm_cycle
prototype accordingly.
> +
> +static const struct of_device_id aspeed_jtag_of_match[] = {
> + { .compatible = "aspeed,aspeed-jtag", },
> + {}
> +};
The series should include a patch for the DT binding for this device.
You may want to be a little more specific here, to avoid problems if
aspeed ever makes an updated version of this device with a slightly
different register interface. Usually we include the full name of the
SoC in the "compatible" string for that.
Arnd
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-02 14:54 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2017-08-02 14:54 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Aug 2, 2017 at 3:18 PM, Oleksandr Shamray
<oleksandrs@mellanox.com> wrote:
> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>
> Driver implements the following jtag ops:
> - freq_get;
> - freq_set;
> - status_get;
> - idle;
> - xfer;
>
> It has been tested on Mellanox system with BMC equipped with
> Aspeed 2520 SoC for programming CPLD devices.
>
> Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Looking at this one before the subsystem. Overall looks really nice,
it seems you got a good abstraction between the subsystem and the
driver.
> +
> +static int aspeed_jtag_freq_set(struct jtag *jtag, unsigned long freq);
> +static int aspeed_jtag_freq_get(struct jtag *jtag, unsigned long *frq);
> +static int aspeed_jtag_status_get(struct jtag *jtag,
> + enum jtag_endstate *status);
> +static int aspeed_jtag_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *runtest);
> +static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer);
Please try to reorder the functions definitions in a way that lets you
remove the forward declarations.
> +
> +static void aspeed_jtag_run_test_idle_sw(struct aspeed_jtag *aspeed_jtag,
> + struct jtag_run_test_idle *runtest)
> +{
> + char sm_pause_irpause[] = {1, 1, 1, 1, 0, 1, 0};
> + char sm_pause_drpause[] = {1, 1, 1, 0, 1, 0};
> + char sm_idle_irpause[] = {1, 1, 0, 1, 0};
> + char sm_idle_drpause[] = {1, 0, 1, 0};
> + char sm_pause_idle[] = {1, 1, 0};
These could be 'static const' if you adapt the aspeed_jtag_sm_cycle
prototype accordingly.
> +
> +static const struct of_device_id aspeed_jtag_of_match[] = {
> + { .compatible = "aspeed,aspeed-jtag", },
> + {}
> +};
The series should include a patch for the DT binding for this device.
You may want to be a little more specific here, to avoid problems if
aspeed ever makes an updated version of this device with a slightly
different register interface. Usually we include the full name of the
SoC in the "compatible" string for that.
Arnd
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-02 14:56 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2017-08-02 14:56 UTC (permalink / raw)
To: Neil Armstrong
Cc: Oleksandr Shamray, gregkh, devicetree, Jiří Pírko,
system-sw-low-level, OpenBMC Maillist, Linux Kernel Mailing List,
mec, Jiri Pirko, Joel Stanley, linux-serial, vadimp,
Tobias Klauser, Linux ARM
On Wed, Aug 2, 2017 at 4:30 PM, Neil Armstrong <narmstrong@baylibre.com> wrote:
> On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
>> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>> +static u32 aspeed_jtag_read(struct aspeed_jtag *aspeed_jtag, u32 reg)
>> +{
>> + return readl(aspeed_jtag->reg_base + reg);
>> +}
>> +
>> +static void
>> +aspeed_jtag_write(struct aspeed_jtag *aspeed_jtag, u32 val, u32 reg)
>> +{
>> + writel(val, aspeed_jtag->reg_base + reg);
>> +}
>
> Maybe readl_relaxed/writel_relaxed would be enough here.
I'd prefer keeping the regular accessors here, unless this is shown
to be a performance bottleneck, and there is a comment to explain
how the relaxed accessors are determined to be safe.
Arnd
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-02 14:56 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2017-08-02 14:56 UTC (permalink / raw)
To: Neil Armstrong
Cc: Oleksandr Shamray, gregkh, devicetree-u79uwXL29TY76Z2rM5mHXA,
Jiří Pírko,
system-sw-low-level-VPRAkNaXOzVWk0Htik3J/w, OpenBMC Maillist,
Linux Kernel Mailing List, mec-WqBc5aa1uDFeoWH0uzbU5w,
Jiri Pirko, Joel Stanley, linux-serial-u79uwXL29TY76Z2rM5mHXA,
vadimp-45czdsxZ+A5DPfheJLI6IQ, Tobias Klauser, Linux ARM
On Wed, Aug 2, 2017 at 4:30 PM, Neil Armstrong <narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> wrote:
> On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
>> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>> +static u32 aspeed_jtag_read(struct aspeed_jtag *aspeed_jtag, u32 reg)
>> +{
>> + return readl(aspeed_jtag->reg_base + reg);
>> +}
>> +
>> +static void
>> +aspeed_jtag_write(struct aspeed_jtag *aspeed_jtag, u32 val, u32 reg)
>> +{
>> + writel(val, aspeed_jtag->reg_base + reg);
>> +}
>
> Maybe readl_relaxed/writel_relaxed would be enough here.
I'd prefer keeping the regular accessors here, unless this is shown
to be a performance bottleneck, and there is a comment to explain
how the relaxed accessors are determined to be safe.
Arnd
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-02 14:56 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2017-08-02 14:56 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Aug 2, 2017 at 4:30 PM, Neil Armstrong <narmstrong@baylibre.com> wrote:
> On 08/02/2017 03:18 PM, Oleksandr Shamray wrote:
>> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>> +static u32 aspeed_jtag_read(struct aspeed_jtag *aspeed_jtag, u32 reg)
>> +{
>> + return readl(aspeed_jtag->reg_base + reg);
>> +}
>> +
>> +static void
>> +aspeed_jtag_write(struct aspeed_jtag *aspeed_jtag, u32 val, u32 reg)
>> +{
>> + writel(val, aspeed_jtag->reg_base + reg);
>> +}
>
> Maybe readl_relaxed/writel_relaxed would be enough here.
I'd prefer keeping the regular accessors here, unless this is shown
to be a performance bottleneck, and there is a comment to explain
how the relaxed accessors are determined to be safe.
Arnd
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
2017-08-02 13:18 ` Oleksandr Shamray
@ 2017-08-02 15:31 ` Randy Dunlap
-1 siblings, 0 replies; 55+ messages in thread
From: Randy Dunlap @ 2017-08-02 15:31 UTC (permalink / raw)
To: Oleksandr Shamray, gregkh, arnd
Cc: linux-kernel, linux-arm-kernel, devicetree, openbmc, joel, jiri,
tklauser, linux-serial, mec, vadimp, system-sw-low-level,
Jiri Pirko
On 08/02/2017 06:18 AM, Oleksandr Shamray wrote:
>
> diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
> index a8d0149..7bf709c 100644
> --- a/drivers/jtag/Kconfig
> +++ b/drivers/jtag/Kconfig
> @@ -16,3 +16,16 @@ menuconfig JTAG
> To compile this driver as a module, choose M here: the module will
> be called jtag.
>
> +menuconfig JTAG_ASPEED
> + tristate "Aspeed SoC JTAG controller support"
> + depends on JTAG
> + ---help---
> + This provides a support for Aspeed JTAG device, equipped on
> + Aspeed SoC 24xx and 25xx families. Drivers allows programming
> + of hardware devices, connected to SoC through the JTAG interface.
> +
> + If you want this support, you should say Y here.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called aspeed_jtag.
In the Makefile, it looks like it is called jtag-aspeed.
> +
> diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
> index e811330..e9fa7fa 100644
> --- a/drivers/jtag/Makefile
> +++ b/drivers/jtag/Makefile
> @@ -1,2 +1,3 @@
> obj-$(CONFIG_JTAG) += jtag.o
> +obj-$(CONFIG_JTAG_ASPEED) += jtag-aspeed.o
--
~Randy
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-02 15:31 ` Randy Dunlap
0 siblings, 0 replies; 55+ messages in thread
From: Randy Dunlap @ 2017-08-02 15:31 UTC (permalink / raw)
To: linux-arm-kernel
On 08/02/2017 06:18 AM, Oleksandr Shamray wrote:
>
> diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig
> index a8d0149..7bf709c 100644
> --- a/drivers/jtag/Kconfig
> +++ b/drivers/jtag/Kconfig
> @@ -16,3 +16,16 @@ menuconfig JTAG
> To compile this driver as a module, choose M here: the module will
> be called jtag.
>
> +menuconfig JTAG_ASPEED
> + tristate "Aspeed SoC JTAG controller support"
> + depends on JTAG
> + ---help---
> + This provides a support for Aspeed JTAG device, equipped on
> + Aspeed SoC 24xx and 25xx families. Drivers allows programming
> + of hardware devices, connected to SoC through the JTAG interface.
> +
> + If you want this support, you should say Y here.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called aspeed_jtag.
In the Makefile, it looks like it is called jtag-aspeed.
> +
> diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile
> index e811330..e9fa7fa 100644
> --- a/drivers/jtag/Makefile
> +++ b/drivers/jtag/Makefile
> @@ -1,2 +1,3 @@
> obj-$(CONFIG_JTAG) += jtag.o
> +obj-$(CONFIG_JTAG_ASPEED) += jtag-aspeed.o
--
~Randy
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
2017-08-02 13:18 ` Oleksandr Shamray
@ 2017-08-02 15:37 ` Arnd Bergmann
-1 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2017-08-02 15:37 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, Linux Kernel Mailing List, Linux ARM, devicetree,
OpenBMC Maillist, Joel Stanley, Jiří Pírko,
Tobias Klauser, linux-serial, mec, vadimp, system-sw-low-level,
Jiri Pirko
On Wed, Aug 2, 2017 at 3:18 PM, Oleksandr Shamray
<oleksandrs@mellanox.com> wrote:
> +
> +static void *jtag_copy_from_user(void __user *udata, unsigned long bit_size)
> +{
> + void *kdata;
> + unsigned long size;
> + unsigned long err;
> +
> + size = DIV_ROUND_UP(bit_size, BITS_PER_BYTE);
> + kdata = kzalloc(size, GFP_KERNEL);
> + if (!kdata)
> + return NULL;
> +
> + err = copy_from_user(kdata, udata, size);
> + if (!err)
> + return kdata;
> +
> + kfree(kdata);
> + return NULL;
> +}
You can use memdup_user() here to simplify this, or just change the callers
to use that directly.
> +static long jtag_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
> +{
> + struct jtag *jtag = file->private_data;
> + struct jtag_run_test_idle idle;
> + struct jtag_xfer xfer;
> + void *user_tdio_data;
> + unsigned long value;
> + int err;
> +
> + switch (cmd) {
> + case JTAG_GIOCFREQ:
> + if (jtag->ops->freq_get)
> + err = jtag->ops->freq_get(jtag, &value);
> + else
> + err = -EOPNOTSUPP;
> + if (err)
> + break;
> +
> + err = __put_user(value, (unsigned long __user *)arg);
> + break;
Use put_user() instead of __put_user() everywhere please.
To avoid using so many casts, just use a temporary variable
that holds the pointer.
Also, you should never use 'unsigned long' pointers in the arguments,
use either '__u32' or '__u64', whichever makes more sense here.
I see that your command definition has 'unsigned int', so it's already
broken on 64-bit architectures.
> + case JTAG_IOCXFER:
> + if (copy_from_user(&xfer, (void __user *)arg,
> + sizeof(struct jtag_xfer)))
> + return -EFAULT;
> +
> + user_tdio_data = xfer.tdio;
> + xfer.tdio = jtag_copy_from_user((void __user *)user_tdio_data,
> + xfer.length);
> + if (!xfer.tdio)
> + return -ENOMEM;
You should enforce an upper bound for the length here,
to prevent users from draining kernel memory with giant
buffers.
> +static struct jtag *jtag_get_dev(int id)
> +{
> + struct jtag *jtag;
> +
> + mutex_lock(&jtag_mutex);
> + list_for_each_entry(jtag, &jtag_list, list) {
> + if (jtag->id == id)
> + goto found;
> + }
> + jtag = NULL;
> +found:
> + mutex_unlock(&jtag_mutex);
> + return jtag;
> +}
I'm pretty sure there is a better way to look up the data from the
chardev inode,
though I now forget how that is best done.
> +static const struct file_operations jtag_fops = {
> + .owner = THIS_MODULE,
> + .llseek = no_llseek,
> + .unlocked_ioctl = jtag_ioctl,
> + .open = jtag_open,
> + .release = jtag_release,
> +};
add a compat_ioctl pointer here, after ensuring that all ioctl commands
are compatible between 32-bit and 64-bit user space.
In turn, no_llseek is the default, you can drop that.
> +struct jtag *jtag_alloc(size_t priv_size, const struct jtag_ops *ops)
> +{
> + struct jtag *jtag = kzalloc(sizeof(*jtag) + priv_size, GFP_KERNEL);
> +
> + if (!jtag)
> + return NULL;
> +
> + jtag->ops = ops;
> + return jtag;
> +}
> +EXPORT_SYMBOL_GPL(jtag_alloc);
Please add some padding behind 'struct jtag' to ensure
the private data is aligned to ARCH_DMA_MINALIGN,
Arnd
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 1/2] drivers: jtag: Add JTAG core driver
@ 2017-08-02 15:37 ` Arnd Bergmann
0 siblings, 0 replies; 55+ messages in thread
From: Arnd Bergmann @ 2017-08-02 15:37 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Aug 2, 2017 at 3:18 PM, Oleksandr Shamray
<oleksandrs@mellanox.com> wrote:
> +
> +static void *jtag_copy_from_user(void __user *udata, unsigned long bit_size)
> +{
> + void *kdata;
> + unsigned long size;
> + unsigned long err;
> +
> + size = DIV_ROUND_UP(bit_size, BITS_PER_BYTE);
> + kdata = kzalloc(size, GFP_KERNEL);
> + if (!kdata)
> + return NULL;
> +
> + err = copy_from_user(kdata, udata, size);
> + if (!err)
> + return kdata;
> +
> + kfree(kdata);
> + return NULL;
> +}
You can use memdup_user() here to simplify this, or just change the callers
to use that directly.
> +static long jtag_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
> +{
> + struct jtag *jtag = file->private_data;
> + struct jtag_run_test_idle idle;
> + struct jtag_xfer xfer;
> + void *user_tdio_data;
> + unsigned long value;
> + int err;
> +
> + switch (cmd) {
> + case JTAG_GIOCFREQ:
> + if (jtag->ops->freq_get)
> + err = jtag->ops->freq_get(jtag, &value);
> + else
> + err = -EOPNOTSUPP;
> + if (err)
> + break;
> +
> + err = __put_user(value, (unsigned long __user *)arg);
> + break;
Use put_user() instead of __put_user() everywhere please.
To avoid using so many casts, just use a temporary variable
that holds the pointer.
Also, you should never use 'unsigned long' pointers in the arguments,
use either '__u32' or '__u64', whichever makes more sense here.
I see that your command definition has 'unsigned int', so it's already
broken on 64-bit architectures.
> + case JTAG_IOCXFER:
> + if (copy_from_user(&xfer, (void __user *)arg,
> + sizeof(struct jtag_xfer)))
> + return -EFAULT;
> +
> + user_tdio_data = xfer.tdio;
> + xfer.tdio = jtag_copy_from_user((void __user *)user_tdio_data,
> + xfer.length);
> + if (!xfer.tdio)
> + return -ENOMEM;
You should enforce an upper bound for the length here,
to prevent users from draining kernel memory with giant
buffers.
> +static struct jtag *jtag_get_dev(int id)
> +{
> + struct jtag *jtag;
> +
> + mutex_lock(&jtag_mutex);
> + list_for_each_entry(jtag, &jtag_list, list) {
> + if (jtag->id == id)
> + goto found;
> + }
> + jtag = NULL;
> +found:
> + mutex_unlock(&jtag_mutex);
> + return jtag;
> +}
I'm pretty sure there is a better way to look up the data from the
chardev inode,
though I now forget how that is best done.
> +static const struct file_operations jtag_fops = {
> + .owner = THIS_MODULE,
> + .llseek = no_llseek,
> + .unlocked_ioctl = jtag_ioctl,
> + .open = jtag_open,
> + .release = jtag_release,
> +};
add a compat_ioctl pointer here, after ensuring that all ioctl commands
are compatible between 32-bit and 64-bit user space.
In turn, no_llseek is the default, you can drop that.
> +struct jtag *jtag_alloc(size_t priv_size, const struct jtag_ops *ops)
> +{
> + struct jtag *jtag = kzalloc(sizeof(*jtag) + priv_size, GFP_KERNEL);
> +
> + if (!jtag)
> + return NULL;
> +
> + jtag->ops = ops;
> + return jtag;
> +}
> +EXPORT_SYMBOL_GPL(jtag_alloc);
Please add some padding behind 'struct jtag' to ensure
the private data is aligned to ARCH_DMA_MINALIGN,
Arnd
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 1/2] drivers: jtag: Add JTAG core driver
2017-08-02 13:18 ` Oleksandr Shamray
@ 2017-08-03 9:28 ` Tobias Klauser
-1 siblings, 0 replies; 55+ messages in thread
From: Tobias Klauser @ 2017-08-03 9:28 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, arnd, linux-kernel, linux-arm-kernel, devicetree,
openbmc, joel, jiri, linux-serial, mec, vadimp,
system-sw-low-level, Jiri Pirko
Nice work!
On 2017-08-02 at 15:18:37 +0200, Oleksandr Shamray <oleksandrs@mellanox.com> wrote:
> --- /dev/null
> +++ b/drivers/jtag/jtag.c
[...]
> +static int jtag_run_test_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *idle)
Both the function and the struct it takes have the same name, which of
course is perfectly valid C. However, IMO it would be easier to grep for
the function/struct individually if they had different names.
> +{
> + if (jtag->ops->idle)
> + return jtag->ops->idle(jtag, idle);
> + else
> + return -EOPNOTSUPP;
> +}
[...]
> --- /dev/null
> +++ b/include/uapi/linux/jtag.h
> @@ -0,0 +1,133 @@
[...]
> +/**
> + * struct jtag_run_test_idle - forces JTAG sm to
> + * RUN_TEST/IDLE state *
I guess a newline is needed here to make this a valid kerneldoc comment
(the trailing '*' indicates that one was actually intended here ;)
Also, 'sm' should probably be spelled out as 'state machine'.
> + * @mode: access mode
> + * @reset: 0 - run IDEL/PAUSE from current state
> + * 1 - go trough TEST_LOGIC/RESET state before IDEL/PAUSE
Typos: s/trough/through/ and s/IDEL/IDLE/
> + * @end: completion flag
> + * @tck: clock counter
> + *
> + * Structure represents interface to JTAG device for jtag idle
> + * execution.
> + */
> +struct jtag_run_test_idle {
> + enum jtag_xfer_mode mode;
> + unsigned char reset;
> + enum jtag_endstate endstate;
> + unsigned char tck;
> +};
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 1/2] drivers: jtag: Add JTAG core driver
@ 2017-08-03 9:28 ` Tobias Klauser
0 siblings, 0 replies; 55+ messages in thread
From: Tobias Klauser @ 2017-08-03 9:28 UTC (permalink / raw)
To: linux-arm-kernel
Nice work!
On 2017-08-02 at 15:18:37 +0200, Oleksandr Shamray <oleksandrs@mellanox.com> wrote:
> --- /dev/null
> +++ b/drivers/jtag/jtag.c
[...]
> +static int jtag_run_test_idle(struct jtag *jtag,
> + struct jtag_run_test_idle *idle)
Both the function and the struct it takes have the same name, which of
course is perfectly valid C. However, IMO it would be easier to grep for
the function/struct individually if they had different names.
> +{
> + if (jtag->ops->idle)
> + return jtag->ops->idle(jtag, idle);
> + else
> + return -EOPNOTSUPP;
> +}
[...]
> --- /dev/null
> +++ b/include/uapi/linux/jtag.h
> @@ -0,0 +1,133 @@
[...]
> +/**
> + * struct jtag_run_test_idle - forces JTAG sm to
> + * RUN_TEST/IDLE state *
I guess a newline is needed here to make this a valid kerneldoc comment
(the trailing '*' indicates that one was actually intended here ;)
Also, 'sm' should probably be spelled out as 'state machine'.
> + * @mode: access mode
> + * @reset: 0 - run IDEL/PAUSE from current state
> + * 1 - go trough TEST_LOGIC/RESET state before IDEL/PAUSE
Typos: s/trough/through/ and s/IDEL/IDLE/
> + * @end: completion flag
> + * @tck: clock counter
> + *
> + * Structure represents interface to JTAG device for jtag idle
> + * execution.
> + */
> +struct jtag_run_test_idle {
> + enum jtag_xfer_mode mode;
> + unsigned char reset;
> + enum jtag_endstate endstate;
> + unsigned char tck;
> +};
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
2017-08-02 13:18 ` Oleksandr Shamray
(?)
@ 2017-08-03 12:12 ` kbuild test robot
-1 siblings, 0 replies; 55+ messages in thread
From: kbuild test robot @ 2017-08-03 12:12 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: kbuild-all, gregkh, arnd, linux-kernel, linux-arm-kernel,
devicetree, openbmc, joel, jiri, tklauser, linux-serial, mec,
vadimp, system-sw-low-level, Oleksandr Shamray, Jiri Pirko
[-- Attachment #1: Type: text/plain, Size: 1508 bytes --]
Hi Oleksandr,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.13-rc3 next-20170802]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Oleksandr-Shamray/JTAG-driver-introduction/20170803-110721
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64
All errors (new ones prefixed by >>):
>> drivers/jtag/jtag-aspeed.c:34:28: fatal error: asm/mach-types.h: No such file or directory
#include <asm/mach-types.h>
^
compilation terminated.
vim +34 drivers/jtag/jtag-aspeed.c
> 34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
36 #include <linux/clk.h>
37 #include <linux/device.h>
38 #include <linux/interrupt.h>
39 #include <linux/jtag.h>
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/of_address.h>
43 #include <linux/platform_device.h>
44 #include <linux/slab.h>
45 #include <uapi/linux/jtag.h>
46
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 56842 bytes --]
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-03 12:12 ` kbuild test robot
0 siblings, 0 replies; 55+ messages in thread
From: kbuild test robot @ 2017-08-03 12:12 UTC (permalink / raw)
Cc: devicetree, jiri, arnd, system-sw-low-level, gregkh, openbmc,
linux-kernel, mec, Jiri Pirko, kbuild-all, linux-serial, vadimp,
Oleksandr Shamray, tklauser, linux-arm-kernel, joel
[-- Attachment #1: Type: text/plain, Size: 1508 bytes --]
Hi Oleksandr,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.13-rc3 next-20170802]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Oleksandr-Shamray/JTAG-driver-introduction/20170803-110721
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64
All errors (new ones prefixed by >>):
>> drivers/jtag/jtag-aspeed.c:34:28: fatal error: asm/mach-types.h: No such file or directory
#include <asm/mach-types.h>
^
compilation terminated.
vim +34 drivers/jtag/jtag-aspeed.c
> 34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
36 #include <linux/clk.h>
37 #include <linux/device.h>
38 #include <linux/interrupt.h>
39 #include <linux/jtag.h>
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/of_address.h>
43 #include <linux/platform_device.h>
44 #include <linux/slab.h>
45 #include <uapi/linux/jtag.h>
46
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 56842 bytes --]
[-- Attachment #3: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-03 12:12 ` kbuild test robot
0 siblings, 0 replies; 55+ messages in thread
From: kbuild test robot @ 2017-08-03 12:12 UTC (permalink / raw)
To: linux-arm-kernel
Hi Oleksandr,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.13-rc3 next-20170802]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Oleksandr-Shamray/JTAG-driver-introduction/20170803-110721
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64
All errors (new ones prefixed by >>):
>> drivers/jtag/jtag-aspeed.c:34:28: fatal error: asm/mach-types.h: No such file or directory
#include <asm/mach-types.h>
^
compilation terminated.
vim +34 drivers/jtag/jtag-aspeed.c
> 34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
36 #include <linux/clk.h>
37 #include <linux/device.h>
38 #include <linux/interrupt.h>
39 #include <linux/jtag.h>
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/of_address.h>
43 #include <linux/platform_device.h>
44 #include <linux/slab.h>
45 #include <uapi/linux/jtag.h>
46
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
-------------- next part --------------
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URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170803/33b4b638/attachment-0001.gz>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH] drivers: jtag: fix resource_size.cocci warnings
2017-08-02 13:18 ` Oleksandr Shamray
(?)
@ 2017-08-03 14:35 ` kbuild test robot
-1 siblings, 0 replies; 55+ messages in thread
From: kbuild test robot @ 2017-08-03 14:35 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: kbuild-all, gregkh, arnd, linux-kernel, linux-arm-kernel,
devicetree, openbmc, joel, jiri, tklauser, linux-serial, mec,
vadimp, system-sw-low-level, Oleksandr Shamray, Jiri Pirko
drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
Use resource_size function on resource object
instead of explicit computation.
Generated by: scripts/coccinelle/api/resource_size.cocci
Fixes: acf0c42bb646 ("drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver")
CC: Oleksandr Shamray <oleksandrs@mellanox.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---
jtag-aspeed.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/jtag/jtag-aspeed.c
+++ b/drivers/jtag/jtag-aspeed.c
@@ -721,7 +721,7 @@ int aspeed_jtag_init(struct platform_dev
return 0;
out_region:
- release_mem_region(res->start, res->end - res->start + 1);
+ release_mem_region(res->start, resource_size(res));
return err;
}
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
2017-08-02 13:18 ` Oleksandr Shamray
(?)
@ 2017-08-03 14:35 ` kbuild test robot
-1 siblings, 0 replies; 55+ messages in thread
From: kbuild test robot @ 2017-08-03 14:35 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: kbuild-all, gregkh, arnd, linux-kernel, linux-arm-kernel,
devicetree, openbmc, joel, jiri, tklauser, linux-serial, mec,
vadimp, system-sw-low-level, Oleksandr Shamray, Jiri Pirko
Hi Oleksandr,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.13-rc3 next-20170803]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Oleksandr-Shamray/JTAG-driver-introduction/20170803-110721
coccinelle warnings: (new ones prefixed by >>)
>> drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
Please review and possibly fold the followup patch.
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH] drivers: jtag: fix resource_size.cocci warnings
@ 2017-08-03 14:35 ` kbuild test robot
0 siblings, 0 replies; 55+ messages in thread
From: kbuild test robot @ 2017-08-03 14:35 UTC (permalink / raw)
Cc: kbuild-all, gregkh, arnd, linux-kernel, linux-arm-kernel,
devicetree, openbmc, joel, jiri, tklauser, linux-serial, mec,
vadimp, system-sw-low-level, Oleksandr Shamray, Jiri Pirko
drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
Use resource_size function on resource object
instead of explicit computation.
Generated by: scripts/coccinelle/api/resource_size.cocci
Fixes: acf0c42bb646 ("drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver")
CC: Oleksandr Shamray <oleksandrs@mellanox.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---
jtag-aspeed.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/jtag/jtag-aspeed.c
+++ b/drivers/jtag/jtag-aspeed.c
@@ -721,7 +721,7 @@ int aspeed_jtag_init(struct platform_dev
return 0;
out_region:
- release_mem_region(res->start, res->end - res->start + 1);
+ release_mem_region(res->start, resource_size(res));
return err;
}
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-03 14:35 ` kbuild test robot
0 siblings, 0 replies; 55+ messages in thread
From: kbuild test robot @ 2017-08-03 14:35 UTC (permalink / raw)
Cc: kbuild-all, gregkh, arnd, linux-kernel, linux-arm-kernel,
devicetree, openbmc, joel, jiri, tklauser, linux-serial, mec,
vadimp, system-sw-low-level, Oleksandr Shamray, Jiri Pirko
Hi Oleksandr,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.13-rc3 next-20170803]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Oleksandr-Shamray/JTAG-driver-introduction/20170803-110721
coccinelle warnings: (new ones prefixed by >>)
>> drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
Please review and possibly fold the followup patch.
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH] drivers: jtag: fix resource_size.cocci warnings
@ 2017-08-03 14:35 ` kbuild test robot
0 siblings, 0 replies; 55+ messages in thread
From: kbuild test robot @ 2017-08-03 14:35 UTC (permalink / raw)
To: linux-arm-kernel
drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
Use resource_size function on resource object
instead of explicit computation.
Generated by: scripts/coccinelle/api/resource_size.cocci
Fixes: acf0c42bb646 ("drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver")
CC: Oleksandr Shamray <oleksandrs@mellanox.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---
jtag-aspeed.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/jtag/jtag-aspeed.c
+++ b/drivers/jtag/jtag-aspeed.c
@@ -721,7 +721,7 @@ int aspeed_jtag_init(struct platform_dev
return 0;
out_region:
- release_mem_region(res->start, res->end - res->start + 1);
+ release_mem_region(res->start, resource_size(res));
return err;
}
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver
@ 2017-08-03 14:35 ` kbuild test robot
0 siblings, 0 replies; 55+ messages in thread
From: kbuild test robot @ 2017-08-03 14:35 UTC (permalink / raw)
To: linux-arm-kernel
Hi Oleksandr,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.13-rc3 next-20170803]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Oleksandr-Shamray/JTAG-driver-introduction/20170803-110721
coccinelle warnings: (new ones prefixed by >>)
>> drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
Please review and possibly fold the followup patch.
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
^ permalink raw reply [flat|nested] 55+ messages in thread
* RE: [PATCH] drivers: jtag: fix resource_size.cocci warnings
2017-08-03 14:35 ` kbuild test robot
(?)
@ 2017-08-03 14:48 ` Oleksandr Shamray
-1 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-03 14:48 UTC (permalink / raw)
To: kbuild test robot
Cc: kbuild-all, gregkh, arnd, linux-kernel, linux-arm-kernel,
devicetree, openbmc, joel, jiri, tklauser, linux-serial, mec,
vadimp, system-sw-low-level, Jiri Pirko
> -----Original Message-----
> From: kbuild test robot [mailto:lkp@intel.com]
> Sent: Thursday, August 3, 2017 5:36 PM
> To: Oleksandr Shamray <oleksandrs@mellanox.com>
> Cc: kbuild-all@01.org; gregkh@linuxfoundation.org; arnd@arndb.de; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; openbmc@lists.ozlabs.org; joel@jms.id.au;
> jiri@resnulli.us; tklauser@distanz.ch; linux-serial@vger.kernel.org;
> mec@shout.net; vadimp@maellanox.com; system-sw-low-level <system-sw-
> low-level@mellanox.com>; Oleksandr Shamray <oleksandrs@mellanox.com>;
> Jiri Pirko <jiri@mellanox.com>
> Subject: [PATCH] drivers: jtag: fix resource_size.cocci warnings
>
> drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
>
>
> Use resource_size function on resource object instead of explicit computation.
>
> Generated by: scripts/coccinelle/api/resource_size.cocci
>
> Fixes: acf0c42bb646 ("drivers: jtag: Add Aspeed SoC 24xx and 25xx families
> JTAG master driver")
> CC: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Acked-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> ---
>
> jtag-aspeed.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> --- a/drivers/jtag/jtag-aspeed.c
> +++ b/drivers/jtag/jtag-aspeed.c
> @@ -721,7 +721,7 @@ int aspeed_jtag_init(struct platform_dev
> return 0;
>
> out_region:
> - release_mem_region(res->start, res->end - res->start + 1);
> + release_mem_region(res->start, resource_size(res));
> return err;
> }
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* RE: [PATCH] drivers: jtag: fix resource_size.cocci warnings
@ 2017-08-03 14:48 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-03 14:48 UTC (permalink / raw)
To: kbuild test robot
Cc: kbuild-all, gregkh, arnd, linux-kernel, linux-arm-kernel,
devicetree, openbmc, joel, jiri, tklauser, linux-serial, mec,
vadimp, system-sw-low-level, Jiri Pirko
> -----Original Message-----
> From: kbuild test robot [mailto:lkp@intel.com]
> Sent: Thursday, August 3, 2017 5:36 PM
> To: Oleksandr Shamray <oleksandrs@mellanox.com>
> Cc: kbuild-all@01.org; gregkh@linuxfoundation.org; arnd@arndb.de; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; openbmc@lists.ozlabs.org; joel@jms.id.au;
> jiri@resnulli.us; tklauser@distanz.ch; linux-serial@vger.kernel.org;
> mec@shout.net; vadimp@maellanox.com; system-sw-low-level <system-sw-
> low-level@mellanox.com>; Oleksandr Shamray <oleksandrs@mellanox.com>;
> Jiri Pirko <jiri@mellanox.com>
> Subject: [PATCH] drivers: jtag: fix resource_size.cocci warnings
>
> drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
>
>
> Use resource_size function on resource object instead of explicit computation.
>
> Generated by: scripts/coccinelle/api/resource_size.cocci
>
> Fixes: acf0c42bb646 ("drivers: jtag: Add Aspeed SoC 24xx and 25xx families
> JTAG master driver")
> CC: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Acked-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> ---
>
> jtag-aspeed.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> --- a/drivers/jtag/jtag-aspeed.c
> +++ b/drivers/jtag/jtag-aspeed.c
> @@ -721,7 +721,7 @@ int aspeed_jtag_init(struct platform_dev
> return 0;
>
> out_region:
> - release_mem_region(res->start, res->end - res->start + 1);
> + release_mem_region(res->start, resource_size(res));
> return err;
> }
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH] drivers: jtag: fix resource_size.cocci warnings
@ 2017-08-03 14:48 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-03 14:48 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: kbuild test robot [mailto:lkp at intel.com]
> Sent: Thursday, August 3, 2017 5:36 PM
> To: Oleksandr Shamray <oleksandrs@mellanox.com>
> Cc: kbuild-all at 01.org; gregkh at linuxfoundation.org; arnd at arndb.de; linux-
> kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> devicetree at vger.kernel.org; openbmc at lists.ozlabs.org; joel at jms.id.au;
> jiri at resnulli.us; tklauser at distanz.ch; linux-serial at vger.kernel.org;
> mec at shout.net; vadimp at maellanox.com; system-sw-low-level <system-sw-
> low-level at mellanox.com>; Oleksandr Shamray <oleksandrs@mellanox.com>;
> Jiri Pirko <jiri@mellanox.com>
> Subject: [PATCH] drivers: jtag: fix resource_size.cocci warnings
>
> drivers/jtag/jtag-aspeed.c:724:37-40: ERROR: Missing resource_size with res
>
>
> Use resource_size function on resource object instead of explicit computation.
>
> Generated by: scripts/coccinelle/api/resource_size.cocci
>
> Fixes: acf0c42bb646 ("drivers: jtag: Add Aspeed SoC 24xx and 25xx families
> JTAG master driver")
> CC: Oleksandr Shamray <oleksandrs@mellanox.com>
> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Acked-by: Oleksandr Shamray <oleksandrs@mellanox.com>
> ---
>
> jtag-aspeed.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> --- a/drivers/jtag/jtag-aspeed.c
> +++ b/drivers/jtag/jtag-aspeed.c
> @@ -721,7 +721,7 @@ int aspeed_jtag_init(struct platform_dev
> return 0;
>
> out_region:
> - release_mem_region(res->start, res->end - res->start + 1);
> + release_mem_region(res->start, resource_size(res));
> return err;
> }
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* RE: [patch v1 0/2] JTAG driver introduction
@ 2017-08-03 15:26 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-03 15:26 UTC (permalink / raw)
To: Andrew Lunn
Cc: gregkh, arnd, devicetree, jiri, system-sw-low-level, openbmc,
linux-kernel, mec, joel, linux-serial, vadimp, tklauser,
linux-arm-kernel
> -----Original Message-----
> From: Andrew Lunn [mailto:andrew@lunn.ch]
> Sent: Wednesday, August 2, 2017 5:12 PM
> To: Oleksandr Shamray <oleksandrs@mellanox.com>
> Cc: gregkh@linuxfoundation.org; arnd@arndb.de; devicetree@vger.kernel.org;
> jiri@resnulli.us; system-sw-low-level <system-sw-low-level@mellanox.com>;
> openbmc@lists.ozlabs.org; linux-kernel@vger.kernel.org; mec@shout.net;
> joel@jms.id.au; linux-serial@vger.kernel.org; vadimp@maellanox.com;
> tklauser@distanz.ch; linux-arm-kernel@lists.infradead.org
> Subject: Re: [patch v1 0/2] JTAG driver introduction
>
> On Wed, Aug 02, 2017 at 04:18:36PM +0300, Oleksandr Shamray wrote:
> > When a need raise up to use JTAG interface for system's devices
> > programming or CPU debugging, it could be done from the external JTAG
> > master controller.
> >
> > For such purpose, usually the user layer application implements jtag
> > protocol or using a proprietary connection to vendor hardware.
> > This method is slow and not generic.
> >
> > We propose to implement general JTAG interface and infrastructure to
> > communicate with user layer application. In such way, we can have the
> > standard JTAG interface core part and separation from specific HW
> > implementation.
> > This allow new capability to debug the CPU or program system's device
> > via BMC without additional devices nor cost.
>
> Hi Oleksandr
>
> Do you have patches for OpenOCD? Or maybe i should ask it another way, what
> user space tools are you using?
>
> Thanks
> Andrew
Hi Andrew
Thanks a lot for review.
We used user space tool for that, which is an adaptation of some Lattice tools, which allows programming of SVF files. We are using it for Lattice CPLD burning, since we have for such devices on our system, but this tool could be used for programming other devices from other vendors as well.
https://github.com/mellanoxbmc/mellanox-bmc-tools
Thanks
Oleksandr
^ permalink raw reply [flat|nested] 55+ messages in thread
* RE: [patch v1 0/2] JTAG driver introduction
@ 2017-08-03 15:26 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-03 15:26 UTC (permalink / raw)
To: Andrew Lunn
Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r, arnd-r2nGTMty4D4,
devicetree-u79uwXL29TY76Z2rM5mHXA, jiri-rHqAuBHg3fBzbRFIqnYvSA,
system-sw-low-level, openbmc-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, mec-WqBc5aa1uDFeoWH0uzbU5w,
joel-U3u1mxZcP9KHXe+LvDLADg, linux-serial-u79uwXL29TY76Z2rM5mHXA,
vadimp-45czdsxZ+A5DPfheJLI6IQ, tklauser-93Khv+1bN0NyDzI6CaY1VQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
> -----Original Message-----
> From: Andrew Lunn [mailto:andrew-g2DYL2Zd6BY@public.gmane.org]
> Sent: Wednesday, August 2, 2017 5:12 PM
> To: Oleksandr Shamray <oleksandrs-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
> Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org; arnd-r2nGTMty4D4@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org;
> jiri-rHqAuBHg3fBzbRFIqnYvSA@public.gmane.org; system-sw-low-level <system-sw-low-level-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>;
> openbmc-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org; linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; mec-WqBc5aa1uDFeoWH0uzbU5w@public.gmane.org;
> joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org; linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; vadimp-45czdsxZ+A5DPfheJLI6IQ@public.gmane.org;
> tklauser-93Khv+1bN0NyDzI6CaY1VQ@public.gmane.org; linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> Subject: Re: [patch v1 0/2] JTAG driver introduction
>
> On Wed, Aug 02, 2017 at 04:18:36PM +0300, Oleksandr Shamray wrote:
> > When a need raise up to use JTAG interface for system's devices
> > programming or CPU debugging, it could be done from the external JTAG
> > master controller.
> >
> > For such purpose, usually the user layer application implements jtag
> > protocol or using a proprietary connection to vendor hardware.
> > This method is slow and not generic.
> >
> > We propose to implement general JTAG interface and infrastructure to
> > communicate with user layer application. In such way, we can have the
> > standard JTAG interface core part and separation from specific HW
> > implementation.
> > This allow new capability to debug the CPU or program system's device
> > via BMC without additional devices nor cost.
>
> Hi Oleksandr
>
> Do you have patches for OpenOCD? Or maybe i should ask it another way, what
> user space tools are you using?
>
> Thanks
> Andrew
Hi Andrew
Thanks a lot for review.
We used user space tool for that, which is an adaptation of some Lattice tools, which allows programming of SVF files. We are using it for Lattice CPLD burning, since we have for such devices on our system, but this tool could be used for programming other devices from other vendors as well.
https://github.com/mellanoxbmc/mellanox-bmc-tools
Thanks
Oleksandr
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 55+ messages in thread
* RE: [patch v1 0/2] JTAG driver introduction
@ 2017-08-03 15:26 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-03 15:26 UTC (permalink / raw)
To: Andrew Lunn
Cc: gregkh, arnd, devicetree, jiri, system-sw-low-level, openbmc,
linux-kernel, mec, joel, linux-serial, vadimp, tklauser,
linux-arm-kernel
> -----Original Message-----
> From: Andrew Lunn [mailto:andrew@lunn.ch]
> Sent: Wednesday, August 2, 2017 5:12 PM
> To: Oleksandr Shamray <oleksandrs@mellanox.com>
> Cc: gregkh@linuxfoundation.org; arnd@arndb.de; devicetree@vger.kernel.org;
> jiri@resnulli.us; system-sw-low-level <system-sw-low-level@mellanox.com>;
> openbmc@lists.ozlabs.org; linux-kernel@vger.kernel.org; mec@shout.net;
> joel@jms.id.au; linux-serial@vger.kernel.org; vadimp@maellanox.com;
> tklauser@distanz.ch; linux-arm-kernel@lists.infradead.org
> Subject: Re: [patch v1 0/2] JTAG driver introduction
>
> On Wed, Aug 02, 2017 at 04:18:36PM +0300, Oleksandr Shamray wrote:
> > When a need raise up to use JTAG interface for system's devices
> > programming or CPU debugging, it could be done from the external JTAG
> > master controller.
> >
> > For such purpose, usually the user layer application implements jtag
> > protocol or using a proprietary connection to vendor hardware.
> > This method is slow and not generic.
> >
> > We propose to implement general JTAG interface and infrastructure to
> > communicate with user layer application. In such way, we can have the
> > standard JTAG interface core part and separation from specific HW
> > implementation.
> > This allow new capability to debug the CPU or program system's device
> > via BMC without additional devices nor cost.
>
> Hi Oleksandr
>
> Do you have patches for OpenOCD? Or maybe i should ask it another way, what
> user space tools are you using?
>
> Thanks
> Andrew
Hi Andrew
Thanks a lot for review.
We used user space tool for that, which is an adaptation of some Lattice tools, which allows programming of SVF files. We are using it for Lattice CPLD burning, since we have for such devices on our system, but this tool could be used for programming other devices from other vendors as well.
https://github.com/mellanoxbmc/mellanox-bmc-tools
Thanks
Oleksandr
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 0/2] JTAG driver introduction
@ 2017-08-03 15:26 ` Oleksandr Shamray
0 siblings, 0 replies; 55+ messages in thread
From: Oleksandr Shamray @ 2017-08-03 15:26 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Andrew Lunn [mailto:andrew at lunn.ch]
> Sent: Wednesday, August 2, 2017 5:12 PM
> To: Oleksandr Shamray <oleksandrs@mellanox.com>
> Cc: gregkh at linuxfoundation.org; arnd at arndb.de; devicetree at vger.kernel.org;
> jiri at resnulli.us; system-sw-low-level <system-sw-low-level@mellanox.com>;
> openbmc at lists.ozlabs.org; linux-kernel at vger.kernel.org; mec at shout.net;
> joel at jms.id.au; linux-serial at vger.kernel.org; vadimp at maellanox.com;
> tklauser at distanz.ch; linux-arm-kernel at lists.infradead.org
> Subject: Re: [patch v1 0/2] JTAG driver introduction
>
> On Wed, Aug 02, 2017 at 04:18:36PM +0300, Oleksandr Shamray wrote:
> > When a need raise up to use JTAG interface for system's devices
> > programming or CPU debugging, it could be done from the external JTAG
> > master controller.
> >
> > For such purpose, usually the user layer application implements jtag
> > protocol or using a proprietary connection to vendor hardware.
> > This method is slow and not generic.
> >
> > We propose to implement general JTAG interface and infrastructure to
> > communicate with user layer application. In such way, we can have the
> > standard JTAG interface core part and separation from specific HW
> > implementation.
> > This allow new capability to debug the CPU or program system's device
> > via BMC without additional devices nor cost.
>
> Hi Oleksandr
>
> Do you have patches for OpenOCD? Or maybe i should ask it another way, what
> user space tools are you using?
>
> Thanks
> Andrew
Hi Andrew
Thanks a lot for review.
We used user space tool for that, which is an adaptation of some Lattice tools, which allows programming of SVF files. We are using it for Lattice CPLD burning, since we have for such devices on our system, but this tool could be used for programming other devices from other vendors as well.
https://github.com/mellanoxbmc/mellanox-bmc-tools
Thanks
Oleksandr
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 0/2] JTAG driver introduction
2017-08-03 15:26 ` Oleksandr Shamray
(?)
@ 2017-08-03 17:48 ` Andrew Lunn
-1 siblings, 0 replies; 55+ messages in thread
From: Andrew Lunn @ 2017-08-03 17:48 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, arnd, devicetree, jiri, system-sw-low-level, openbmc,
linux-kernel, mec, joel, linux-serial, vadimp, tklauser,
linux-arm-kernel
> Hi Andrew
>
> Thanks a lot for review.
>
> We used user space tool for that, which is an adaptation of some
> Lattice tools, which allows programming of SVF files. We are using
> it for Lattice CPLD burning, since we have for such devices on our
> system, but this tool could be used for programming other devices
> from other vendors as well.
> https://github.com/mellanoxbmc/mellanox-bmc-tools
Since you are defining a new Kernel ABI here, it would be good to get
some buy-in from potential users for the ABI. Maybe for the next
version of the patchset you can cross post to the OpenOCD-devel list?
Andrew
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 0/2] JTAG driver introduction
@ 2017-08-03 17:48 ` Andrew Lunn
0 siblings, 0 replies; 55+ messages in thread
From: Andrew Lunn @ 2017-08-03 17:48 UTC (permalink / raw)
To: Oleksandr Shamray
Cc: gregkh, arnd, devicetree, jiri, system-sw-low-level, openbmc,
linux-kernel, mec, joel, linux-serial, vadimp, tklauser,
linux-arm-kernel
> Hi Andrew
>
> Thanks a lot for review.
>
> We used user space tool for that, which is an adaptation of some
> Lattice tools, which allows programming of SVF files. We are using
> it for Lattice CPLD burning, since we have for such devices on our
> system, but this tool could be used for programming other devices
> from other vendors as well.
> https://github.com/mellanoxbmc/mellanox-bmc-tools
Since you are defining a new Kernel ABI here, it would be good to get
some buy-in from potential users for the ABI. Maybe for the next
version of the patchset you can cross post to the OpenOCD-devel list?
Andrew
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 0/2] JTAG driver introduction
@ 2017-08-03 17:48 ` Andrew Lunn
0 siblings, 0 replies; 55+ messages in thread
From: Andrew Lunn @ 2017-08-03 17:48 UTC (permalink / raw)
To: linux-arm-kernel
> Hi Andrew
>
> Thanks a lot for review.
>
> We used user space tool for that, which is an adaptation of some
> Lattice tools, which allows programming of SVF files. We are using
> it for Lattice CPLD burning, since we have for such devices on our
> system, but this tool could be used for programming other devices
> from other vendors as well.
> https://github.com/mellanoxbmc/mellanox-bmc-tools
Since you are defining a new Kernel ABI here, it would be good to get
some buy-in from potential users for the ABI. Maybe for the next
version of the patchset you can cross post to the OpenOCD-devel list?
Andrew
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 0/2] JTAG driver introduction
@ 2017-08-28 20:03 ` Pavel Machek
0 siblings, 0 replies; 55+ messages in thread
From: Pavel Machek @ 2017-08-28 20:03 UTC (permalink / raw)
To: Andrew Lunn
Cc: Oleksandr Shamray, gregkh, arnd, devicetree, jiri,
system-sw-low-level, openbmc, linux-kernel, mec, joel,
linux-serial, vadimp, tklauser, linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 1106 bytes --]
Hi!
> > Thanks a lot for review.
> >
>
> > We used user space tool for that, which is an adaptation of some
> > Lattice tools, which allows programming of SVF files. We are using
> > it for Lattice CPLD burning, since we have for such devices on our
> > system, but this tool could be used for programming other devices
> > from other vendors as well.
>
> > https://github.com/mellanoxbmc/mellanox-bmc-tools
>
> Since you are defining a new Kernel ABI here, it would be good to get
> some buy-in from potential users for the ABI. Maybe for the next
> version of the patchset you can cross post to the OpenOCD-devel list?
Actually, since you are defining a new ABI, it would be nice to have a
Documentation/ file with the ABI description, so that people can
review it...
Otherwise... yes, this looks like a step in right direction from 60000
feet above. I guess it is still a lot of work to get gdb running...
Thanks,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
[-- Attachment #2: Digital signature --]
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^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 0/2] JTAG driver introduction
@ 2017-08-28 20:03 ` Pavel Machek
0 siblings, 0 replies; 55+ messages in thread
From: Pavel Machek @ 2017-08-28 20:03 UTC (permalink / raw)
To: Andrew Lunn
Cc: Oleksandr Shamray, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
arnd-r2nGTMty4D4, devicetree-u79uwXL29TY76Z2rM5mHXA,
jiri-rHqAuBHg3fBzbRFIqnYvSA, system-sw-low-level,
openbmc-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, mec-WqBc5aa1uDFeoWH0uzbU5w,
joel-U3u1mxZcP9KHXe+LvDLADg, linux-serial-u79uwXL29TY76Z2rM5mHXA,
vadimp-45czdsxZ+A5DPfheJLI6IQ, tklauser-93Khv+1bN0NyDzI6CaY1VQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
[-- Attachment #1: Type: text/plain, Size: 1106 bytes --]
Hi!
> > Thanks a lot for review.
> >
>
> > We used user space tool for that, which is an adaptation of some
> > Lattice tools, which allows programming of SVF files. We are using
> > it for Lattice CPLD burning, since we have for such devices on our
> > system, but this tool could be used for programming other devices
> > from other vendors as well.
>
> > https://github.com/mellanoxbmc/mellanox-bmc-tools
>
> Since you are defining a new Kernel ABI here, it would be good to get
> some buy-in from potential users for the ABI. Maybe for the next
> version of the patchset you can cross post to the OpenOCD-devel list?
Actually, since you are defining a new ABI, it would be nice to have a
Documentation/ file with the ABI description, so that people can
review it...
Otherwise... yes, this looks like a step in right direction from 60000
feet above. I guess it is still a lot of work to get gdb running...
Thanks,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 181 bytes --]
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [patch v1 0/2] JTAG driver introduction
@ 2017-08-28 20:03 ` Pavel Machek
0 siblings, 0 replies; 55+ messages in thread
From: Pavel Machek @ 2017-08-28 20:03 UTC (permalink / raw)
To: Andrew Lunn
Cc: Oleksandr Shamray, gregkh, arnd, devicetree, jiri,
system-sw-low-level, openbmc, linux-kernel, mec, joel,
linux-serial, vadimp, tklauser, linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 1106 bytes --]
Hi!
> > Thanks a lot for review.
> >
>
> > We used user space tool for that, which is an adaptation of some
> > Lattice tools, which allows programming of SVF files. We are using
> > it for Lattice CPLD burning, since we have for such devices on our
> > system, but this tool could be used for programming other devices
> > from other vendors as well.
>
> > https://github.com/mellanoxbmc/mellanox-bmc-tools
>
> Since you are defining a new Kernel ABI here, it would be good to get
> some buy-in from potential users for the ABI. Maybe for the next
> version of the patchset you can cross post to the OpenOCD-devel list?
Actually, since you are defining a new ABI, it would be nice to have a
Documentation/ file with the ABI description, so that people can
review it...
Otherwise... yes, this looks like a step in right direction from 60000
feet above. I guess it is still a lot of work to get gdb running...
Thanks,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 181 bytes --]
^ permalink raw reply [flat|nested] 55+ messages in thread
* [patch v1 0/2] JTAG driver introduction
@ 2017-08-28 20:03 ` Pavel Machek
0 siblings, 0 replies; 55+ messages in thread
From: Pavel Machek @ 2017-08-28 20:03 UTC (permalink / raw)
To: linux-arm-kernel
Hi!
> > Thanks a lot for review.
> >
>
> > We used user space tool for that, which is an adaptation of some
> > Lattice tools, which allows programming of SVF files. We are using
> > it for Lattice CPLD burning, since we have for such devices on our
> > system, but this tool could be used for programming other devices
> > from other vendors as well.
>
> > https://github.com/mellanoxbmc/mellanox-bmc-tools
>
> Since you are defining a new Kernel ABI here, it would be good to get
> some buy-in from potential users for the ABI. Maybe for the next
> version of the patchset you can cross post to the OpenOCD-devel list?
Actually, since you are defining a new ABI, it would be nice to have a
Documentation/ file with the ABI description, so that people can
review it...
Otherwise... yes, this looks like a step in right direction from 60000
feet above. I guess it is still a lot of work to get gdb running...
Thanks,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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^ permalink raw reply [flat|nested] 55+ messages in thread
end of thread, other threads:[~2017-08-28 20:03 UTC | newest]
Thread overview: 55+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-08-02 13:18 [patch v1 0/2] JTAG driver introduction Oleksandr Shamray
2017-08-02 13:18 ` Oleksandr Shamray
2017-08-02 13:18 ` Oleksandr Shamray
2017-08-02 13:18 ` [patch v1 1/2] drivers: jtag: Add JTAG core driver Oleksandr Shamray
2017-08-02 13:18 ` Oleksandr Shamray
2017-08-02 13:44 ` Greg KH
2017-08-02 13:44 ` Greg KH
2017-08-02 13:44 ` Greg KH
2017-08-02 13:44 ` Greg KH
2017-08-02 14:16 ` Andrew Lunn
2017-08-02 14:16 ` Andrew Lunn
2017-08-02 14:24 ` Neil Armstrong
2017-08-02 14:24 ` Neil Armstrong
2017-08-02 14:24 ` Neil Armstrong
2017-08-02 15:37 ` Arnd Bergmann
2017-08-02 15:37 ` Arnd Bergmann
2017-08-03 9:28 ` Tobias Klauser
2017-08-03 9:28 ` Tobias Klauser
2017-08-02 13:18 ` [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver Oleksandr Shamray
2017-08-02 13:18 ` Oleksandr Shamray
2017-08-02 14:30 ` Neil Armstrong
2017-08-02 14:30 ` Neil Armstrong
2017-08-02 14:56 ` Arnd Bergmann
2017-08-02 14:56 ` Arnd Bergmann
2017-08-02 14:56 ` Arnd Bergmann
2017-08-02 14:54 ` Arnd Bergmann
2017-08-02 14:54 ` Arnd Bergmann
2017-08-02 14:54 ` Arnd Bergmann
2017-08-02 15:31 ` Randy Dunlap
2017-08-02 15:31 ` Randy Dunlap
2017-08-03 12:12 ` kbuild test robot
2017-08-03 12:12 ` kbuild test robot
2017-08-03 12:12 ` kbuild test robot
2017-08-03 14:35 ` [PATCH] drivers: jtag: fix resource_size.cocci warnings kbuild test robot
2017-08-03 14:35 ` kbuild test robot
2017-08-03 14:35 ` kbuild test robot
2017-08-03 14:48 ` Oleksandr Shamray
2017-08-03 14:48 ` Oleksandr Shamray
2017-08-03 14:48 ` Oleksandr Shamray
2017-08-03 14:35 ` [patch v1 2/2] drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver kbuild test robot
2017-08-03 14:35 ` kbuild test robot
2017-08-03 14:35 ` kbuild test robot
2017-08-02 14:12 ` [patch v1 0/2] JTAG driver introduction Andrew Lunn
2017-08-02 14:12 ` Andrew Lunn
2017-08-03 15:26 ` Oleksandr Shamray
2017-08-03 15:26 ` Oleksandr Shamray
2017-08-03 15:26 ` Oleksandr Shamray
2017-08-03 15:26 ` Oleksandr Shamray
2017-08-03 17:48 ` Andrew Lunn
2017-08-03 17:48 ` Andrew Lunn
2017-08-03 17:48 ` Andrew Lunn
2017-08-28 20:03 ` Pavel Machek
2017-08-28 20:03 ` Pavel Machek
2017-08-28 20:03 ` Pavel Machek
2017-08-28 20:03 ` Pavel Machek
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