All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 0/8] drm/i915: CNL DVFS thing
Date: Wed, 18 Oct 2017 23:48:17 +0300	[thread overview]
Message-ID: <20171018204825.2500-1-ville.syrjala@linux.intel.com> (raw)

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Here's my idea on how the CNL DVFS thing ought to be implemented.
Not sure I gleaned the details of the port clock limits correctly, but
other than that I think this should work.

Entire series available here:
git://github.com/vsyrjala/linux.git dvfs_voltage_4

Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

Ville Syrjälä (8):
  drm/i915: Clean up some cdclk switch statements
  drm/i915: Start tracking voltage level in the cdclk state
  drm/i915: USe cdclk_state->voltage on VLV/CHV
  drm/i915: Use cdclk_state->voltage on BDW
  drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL
  drm/i915: Use cdclk_state->voltage on BXT/GLK
  drm/i915: Use cdclk_state->voltage on CNL
  drm/i915: Adjust system agent voltage on CNL if required by DDI ports

 drivers/gpu/drm/i915/i915_drv.h         |   3 +
 drivers/gpu/drm/i915/intel_cdclk.c      | 318 +++++++++++++++++++++++---------
 drivers/gpu/drm/i915/intel_ddi.c        |  13 ++
 drivers/gpu/drm/i915/intel_display.c    |  14 +-
 drivers/gpu/drm/i915/intel_dp_mst.c     |   5 +
 drivers/gpu/drm/i915/intel_drv.h        |  10 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c |   3 +-
 7 files changed, 276 insertions(+), 90 deletions(-)

-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

             reply	other threads:[~2017-10-18 20:48 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-18 20:48 Ville Syrjala [this message]
2017-10-18 20:48 ` [PATCH 1/8] drm/i915: Clean up some cdclk switch statements Ville Syrjala
2017-10-19  7:20   ` Mika Kahola
2017-10-18 20:48 ` [PATCH 2/8] drm/i915: Start tracking voltage level in the cdclk state Ville Syrjala
2017-10-19 23:32   ` Rodrigo Vivi
2017-10-20 14:01   ` Ville Syrjälä
2017-10-20 20:43     ` Rodrigo Vivi
2017-10-23 12:13       ` Ville Syrjälä
2017-10-23 17:14         ` Rodrigo Vivi
2017-10-18 20:48 ` [PATCH 3/8] drm/i915: USe cdclk_state->voltage on VLV/CHV Ville Syrjala
2017-10-19 17:43   ` [PATCH v2 3/8] drm/i915: Use " Ville Syrjala
2017-10-19 23:42     ` Rodrigo Vivi
2017-10-20 16:20       ` Ville Syrjälä
2017-10-20 17:03   ` [PATCH v3 " Ville Syrjala
2017-10-18 20:48 ` [PATCH 4/8] drm/i915: Use cdclk_state->voltage on BDW Ville Syrjala
2017-10-19 23:44   ` Rodrigo Vivi
2017-10-20 16:14     ` Ville Syrjälä
2017-10-20 17:03   ` [PATCH v2 " Ville Syrjala
2017-10-20 20:47     ` Rodrigo Vivi
2017-10-18 20:48 ` [PATCH 5/8] drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL Ville Syrjala
2017-10-19 23:47   ` Rodrigo Vivi
2017-10-20 11:18     ` Ville Syrjälä
2017-10-20 20:45       ` Rodrigo Vivi
2017-10-18 20:48 ` [PATCH 6/8] drm/i915: Use cdclk_state->voltage on BXT/GLK Ville Syrjala
2017-10-20 20:51   ` Rodrigo Vivi
2017-10-18 20:48 ` [PATCH 7/8] drm/i915: Use cdclk_state->voltage on CNL Ville Syrjala
2017-10-18 21:50   ` Rodrigo Vivi
2017-10-18 22:43     ` Rodrigo Vivi
2017-10-19 10:48     ` Ville Syrjälä
2017-10-19 10:56       ` Mika Kahola
2017-10-19 12:19         ` Ville Syrjälä
2017-10-19 23:52       ` Rodrigo Vivi
2017-10-23 18:29   ` Rodrigo Vivi
2017-10-18 20:48 ` [PATCH 8/8] drm/i915: Adjust system agent voltage on CNL if required by DDI ports Ville Syrjala
2017-10-19 23:54   ` Rodrigo Vivi
2017-10-20 11:11     ` Ville Syrjälä
2017-10-20 17:48       ` Runyan, Arthur J
2017-10-20 20:07         ` Ville Syrjälä
2017-10-20 20:36           ` Rodrigo Vivi
2017-10-20 21:44             ` Runyan, Arthur J
2017-10-23 12:03               ` Ville Syrjälä
2017-10-23 11:48             ` Ville Syrjälä
2017-10-20 14:18     ` Ville Syrjälä
2017-10-20 16:11       ` Ville Syrjälä
2017-10-20 16:09   ` [PATCH v2 " Ville Syrjala
2017-10-20 16:52     ` Ville Syrjälä
2017-10-20 17:05   ` [PATCH v3 " Ville Syrjala
2017-10-23 18:39     ` Rodrigo Vivi
2017-10-18 21:07 ` ✗ Fi.CI.BAT: warning for drm/i915: CNL DVFS thing Patchwork
2017-10-19 17:31   ` Ville Syrjälä
2017-10-19 18:17 ` ✗ Fi.CI.BAT: failure for drm/i915: CNL DVFS thing (rev2) Patchwork
2017-10-19 18:52 ` Patchwork
2017-10-19 20:07 ` ✗ Fi.CI.BAT: warning " Patchwork
2017-10-19 23:27 ` ✓ Fi.CI.BAT: success " Patchwork
2017-10-20  0:22 ` ✓ Fi.CI.IGT: " Patchwork
2017-10-20 16:28 ` ✓ Fi.CI.BAT: success for drm/i915: CNL DVFS thing (rev3) Patchwork
2017-10-20 17:48 ` ✓ Fi.CI.BAT: success for drm/i915: CNL DVFS thing (rev6) Patchwork
2017-10-20 19:19 ` ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171018204825.2500-1-ville.syrjala@linux.intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.