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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Mika Kahola <mika.kahola@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 7/8] drm/i915: Use cdclk_state->voltage on CNL
Date: Thu, 19 Oct 2017 15:19:12 +0300	[thread overview]
Message-ID: <20171019121912.GT10981@intel.com> (raw)
In-Reply-To: <1508410598.3274.124.camel@intel.com>

On Thu, Oct 19, 2017 at 01:56:38PM +0300, Mika Kahola wrote:
> On Thu, 2017-10-19 at 13:48 +0300, Ville Syrjälä wrote:
> > On Wed, Oct 18, 2017 at 02:50:59PM -0700, Rodrigo Vivi wrote:
> > > 
> > > On Wed, Oct 18, 2017 at 08:48:24PM +0000, Ville Syrjala wrote:
> > > > 
> > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > 
> > > > Track the system agent voltage we request from pcode in the cdclk
> > > > state
> > > > on CNL. Annoyingly we can't actually read out the current value
> > > > since
> > > > there's no pcode command to do that, so we'll have to just assume
> > > > that
> > > > it worked.
> > > +static u32 cnl_cur_voltage(struct drm_i915_private *dev_priv)
> > > +{
> > > +       u32 voltage;
> > > +       sandybridge_pcode_read(dev_priv, SKL_PCODE_CDCLK_CONTROL,
> > > &voltage);
> > I don't think that'll work. _pcode_read() and _pcode_write() are
> > actually
> > the same thing, the only difference is whether we return the
> > resulting value
> > or not. Thus if we actually tried to do this we'd end up setting the
> > voltage instead of reading it. 
> > 
> > The only way to actually read anything is for pcode to specify a
> > specific read command. It's a rather unfortunate design of the
> > mailbox interface :(
> > 
> > We should perhaps put some WARNS into the pcode read/write functions
> > so
> > that people don't accidentally use them in the wrong way.
> +1 for this. I was under the assumption that *read* means just reading
> out the value.

Do you want to volunteer for that?

Looking at the current _read() uses, the only one that looks a bit
suspicious is the DUTY_CYCLE_CONTROL. Not sure that's actually
working as expected... Hmm, looks like it's fine actually. Some HSW
PM doc I have says that data0=0x0 means "read dynamic RPe", and
data0=0x1 means "send PCU interrupt when we can go back to RPe".
We might want to add some defines for those magic values to make
the code look less suspicious.

Another thing we could do is deduplicate the code in the 
pcode_read/write functions. Eg. write() could just call read()
maybe, or pull the code into a common _rw() helper (like we
have for the VLV/CHV sideband stuff). Oh, and looks like
intel_sbi_read/write could use the same treatment as well.

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-10-19 12:19 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-18 20:48 [PATCH 0/8] drm/i915: CNL DVFS thing Ville Syrjala
2017-10-18 20:48 ` [PATCH 1/8] drm/i915: Clean up some cdclk switch statements Ville Syrjala
2017-10-19  7:20   ` Mika Kahola
2017-10-18 20:48 ` [PATCH 2/8] drm/i915: Start tracking voltage level in the cdclk state Ville Syrjala
2017-10-19 23:32   ` Rodrigo Vivi
2017-10-20 14:01   ` Ville Syrjälä
2017-10-20 20:43     ` Rodrigo Vivi
2017-10-23 12:13       ` Ville Syrjälä
2017-10-23 17:14         ` Rodrigo Vivi
2017-10-18 20:48 ` [PATCH 3/8] drm/i915: USe cdclk_state->voltage on VLV/CHV Ville Syrjala
2017-10-19 17:43   ` [PATCH v2 3/8] drm/i915: Use " Ville Syrjala
2017-10-19 23:42     ` Rodrigo Vivi
2017-10-20 16:20       ` Ville Syrjälä
2017-10-20 17:03   ` [PATCH v3 " Ville Syrjala
2017-10-18 20:48 ` [PATCH 4/8] drm/i915: Use cdclk_state->voltage on BDW Ville Syrjala
2017-10-19 23:44   ` Rodrigo Vivi
2017-10-20 16:14     ` Ville Syrjälä
2017-10-20 17:03   ` [PATCH v2 " Ville Syrjala
2017-10-20 20:47     ` Rodrigo Vivi
2017-10-18 20:48 ` [PATCH 5/8] drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL Ville Syrjala
2017-10-19 23:47   ` Rodrigo Vivi
2017-10-20 11:18     ` Ville Syrjälä
2017-10-20 20:45       ` Rodrigo Vivi
2017-10-18 20:48 ` [PATCH 6/8] drm/i915: Use cdclk_state->voltage on BXT/GLK Ville Syrjala
2017-10-20 20:51   ` Rodrigo Vivi
2017-10-18 20:48 ` [PATCH 7/8] drm/i915: Use cdclk_state->voltage on CNL Ville Syrjala
2017-10-18 21:50   ` Rodrigo Vivi
2017-10-18 22:43     ` Rodrigo Vivi
2017-10-19 10:48     ` Ville Syrjälä
2017-10-19 10:56       ` Mika Kahola
2017-10-19 12:19         ` Ville Syrjälä [this message]
2017-10-19 23:52       ` Rodrigo Vivi
2017-10-23 18:29   ` Rodrigo Vivi
2017-10-18 20:48 ` [PATCH 8/8] drm/i915: Adjust system agent voltage on CNL if required by DDI ports Ville Syrjala
2017-10-19 23:54   ` Rodrigo Vivi
2017-10-20 11:11     ` Ville Syrjälä
2017-10-20 17:48       ` Runyan, Arthur J
2017-10-20 20:07         ` Ville Syrjälä
2017-10-20 20:36           ` Rodrigo Vivi
2017-10-20 21:44             ` Runyan, Arthur J
2017-10-23 12:03               ` Ville Syrjälä
2017-10-23 11:48             ` Ville Syrjälä
2017-10-20 14:18     ` Ville Syrjälä
2017-10-20 16:11       ` Ville Syrjälä
2017-10-20 16:09   ` [PATCH v2 " Ville Syrjala
2017-10-20 16:52     ` Ville Syrjälä
2017-10-20 17:05   ` [PATCH v3 " Ville Syrjala
2017-10-23 18:39     ` Rodrigo Vivi
2017-10-18 21:07 ` ✗ Fi.CI.BAT: warning for drm/i915: CNL DVFS thing Patchwork
2017-10-19 17:31   ` Ville Syrjälä
2017-10-19 18:17 ` ✗ Fi.CI.BAT: failure for drm/i915: CNL DVFS thing (rev2) Patchwork
2017-10-19 18:52 ` Patchwork
2017-10-19 20:07 ` ✗ Fi.CI.BAT: warning " Patchwork
2017-10-19 23:27 ` ✓ Fi.CI.BAT: success " Patchwork
2017-10-20  0:22 ` ✓ Fi.CI.IGT: " Patchwork
2017-10-20 16:28 ` ✓ Fi.CI.BAT: success for drm/i915: CNL DVFS thing (rev3) Patchwork
2017-10-20 17:48 ` ✓ Fi.CI.BAT: success for drm/i915: CNL DVFS thing (rev6) Patchwork
2017-10-20 19:19 ` ✓ Fi.CI.IGT: " Patchwork

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