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* [PATCH igt] lib: Ask the kernel to quiesce the GPU
@ 2017-10-19 15:26 Chris Wilson
  2017-10-19 17:08 ` ✗ Fi.CI.BAT: failure for lib: Ask the kernel to quiesce the GPU (rev2) Patchwork
  0 siblings, 1 reply; 5+ messages in thread
From: Chris Wilson @ 2017-10-19 15:26 UTC (permalink / raw)
  To: intel-gfx

Since the introduction of debugfs/i915_drop_caches, we have offered the
ability to wait upon all outstanding batches. This is more efficient and
less error prone (one example is the use of context priorities, we have
to idle at the lowest in order not to jump over any low priority tasks
we want to wait upon) than trying to do it all in userspace. Though we
could if we wanted to, it's just easier to use the existing facility
designed for the purpose -- that we were already partially using!

Note that debugfs/i915_drop_caches has only existed since v4.2.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
---
Another week, another poke.
---
 lib/drmtest.c | 29 ++---------------------------
 1 file changed, 2 insertions(+), 27 deletions(-)

diff --git a/lib/drmtest.c b/lib/drmtest.c
index 15a46477..7ac3591e 100644
--- a/lib/drmtest.c
+++ b/lib/drmtest.c
@@ -159,35 +159,10 @@ static bool has_known_intel_chipset(int fd)
  */
 void gem_quiescent_gpu(int fd)
 {
-	uint32_t bbe = MI_BATCH_BUFFER_END;
-	struct drm_i915_gem_execbuffer2 execbuf;
-	struct drm_i915_gem_exec_object2 obj;
-	unsigned ring;
-
 	igt_terminate_spin_batches();
 
-	memset(&obj, 0, sizeof(obj));
-	obj.handle = gem_create(fd, 4096);
-	gem_write(fd, obj.handle, 0, &bbe, sizeof(&bbe));
-
-	memset(&execbuf, 0, sizeof(execbuf));
-	execbuf.buffers_ptr = to_user_pointer(&obj);
-	execbuf.buffer_count = 1;
-
-	for (ring = 0; ring < 1<<6; ring++) {
-		execbuf.flags = ring;
-		__gem_execbuf(fd, &execbuf);
-	}
-
-	if (gem_has_bsd2(fd)) {
-		execbuf.flags = I915_EXEC_BSD | (2 << 13);
-		__gem_execbuf(fd, &execbuf);
-	}
-
-	gem_sync(fd, obj.handle);
-	gem_close(fd, obj.handle);
-
-	igt_drop_caches_set(fd, DROP_RETIRE | DROP_IDLE | DROP_FREED);
+	igt_drop_caches_set(fd,
+			    DROP_ACTIVE | DROP_RETIRE | DROP_IDLE | DROP_FREED);
 }
 
 /**
-- 
2.15.0.rc1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [igt CI] lib: Ask the kernel to quiesce the GPU
@ 2017-12-08 19:26 Chris Wilson
  2017-12-11 11:38 ` [PATCH igt] " Chris Wilson
  0 siblings, 1 reply; 5+ messages in thread
From: Chris Wilson @ 2017-12-08 19:26 UTC (permalink / raw)
  To: intel-gfx

Since the introduction of debugfs/i915_drop_caches, we have offered the
ability to wait upon all outstanding batches. This is more efficient and
less error prone (one example is the use of context priorities, we have
to idle at the lowest in order not to jump over any low priority tasks
we want to wait upon) than trying to do it all in userspace. Though we
could if we wanted to, it's just easier to use the existing facility
designed for the purpose -- that we were already partially using!

Note that debugfs/i915_drop_caches has only existed since v4.2.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
---
 lib/drmtest.c | 29 ++---------------------------
 1 file changed, 2 insertions(+), 27 deletions(-)

diff --git a/lib/drmtest.c b/lib/drmtest.c
index b2d8150f4..fd11f5f58 100644
--- a/lib/drmtest.c
+++ b/lib/drmtest.c
@@ -161,35 +161,10 @@ static bool has_known_intel_chipset(int fd)
  */
 void gem_quiescent_gpu(int fd)
 {
-	uint32_t bbe = MI_BATCH_BUFFER_END;
-	struct drm_i915_gem_execbuffer2 execbuf;
-	struct drm_i915_gem_exec_object2 obj;
-	unsigned ring;
-
 	igt_terminate_spin_batches();
 
-	memset(&obj, 0, sizeof(obj));
-	obj.handle = gem_create(fd, 4096);
-	gem_write(fd, obj.handle, 0, &bbe, sizeof(&bbe));
-
-	memset(&execbuf, 0, sizeof(execbuf));
-	execbuf.buffers_ptr = to_user_pointer(&obj);
-	execbuf.buffer_count = 1;
-
-	for (ring = 0; ring < 1<<6; ring++) {
-		execbuf.flags = ring;
-		__gem_execbuf(fd, &execbuf);
-	}
-
-	if (gem_has_bsd2(fd)) {
-		execbuf.flags = I915_EXEC_BSD | (2 << 13);
-		__gem_execbuf(fd, &execbuf);
-	}
-
-	gem_sync(fd, obj.handle);
-	gem_close(fd, obj.handle);
-
-	igt_drop_caches_set(fd, DROP_RETIRE | DROP_IDLE | DROP_FREED);
+	igt_drop_caches_set(fd,
+			    DROP_ACTIVE | DROP_RETIRE | DROP_IDLE | DROP_FREED);
 }
 
 /**
-- 
2.15.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [PATCH igt] lib: Ask the kernel to quiesce the GPU
@ 2017-11-14 21:54 Chris Wilson
  0 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2017-11-14 21:54 UTC (permalink / raw)
  To: intel-gfx

Since the introduction of debugfs/i915_drop_caches, we have offered the
ability to wait upon all outstanding batches. This is more efficient and
less error prone (one example is the use of context priorities, we have
to idle at the lowest in order not to jump over any low priority tasks
we want to wait upon) than trying to do it all in userspace. Though we
could if we wanted to, it's just easier to use the existing facility
designed for the purpose -- that we were already partially using!

Note that debugfs/i915_drop_caches has only existed since v4.2.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
---
 lib/drmtest.c | 29 ++---------------------------
 1 file changed, 2 insertions(+), 27 deletions(-)

diff --git a/lib/drmtest.c b/lib/drmtest.c
index 37cabd58..9fcbbcc9 100644
--- a/lib/drmtest.c
+++ b/lib/drmtest.c
@@ -160,35 +160,10 @@ static bool has_known_intel_chipset(int fd)
  */
 void gem_quiescent_gpu(int fd)
 {
-	uint32_t bbe = MI_BATCH_BUFFER_END;
-	struct drm_i915_gem_execbuffer2 execbuf;
-	struct drm_i915_gem_exec_object2 obj;
-	unsigned ring;
-
 	igt_terminate_spin_batches();
 
-	memset(&obj, 0, sizeof(obj));
-	obj.handle = gem_create(fd, 4096);
-	gem_write(fd, obj.handle, 0, &bbe, sizeof(&bbe));
-
-	memset(&execbuf, 0, sizeof(execbuf));
-	execbuf.buffers_ptr = to_user_pointer(&obj);
-	execbuf.buffer_count = 1;
-
-	for (ring = 0; ring < 1<<6; ring++) {
-		execbuf.flags = ring;
-		__gem_execbuf(fd, &execbuf);
-	}
-
-	if (gem_has_bsd2(fd)) {
-		execbuf.flags = I915_EXEC_BSD | (2 << 13);
-		__gem_execbuf(fd, &execbuf);
-	}
-
-	gem_sync(fd, obj.handle);
-	gem_close(fd, obj.handle);
-
-	igt_drop_caches_set(fd, DROP_RETIRE | DROP_IDLE | DROP_FREED);
+	igt_drop_caches_set(fd,
+			    DROP_ACTIVE | DROP_RETIRE | DROP_IDLE | DROP_FREED);
 }
 
 /**
-- 
2.15.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [PATCH igt] lib: Ask the kernel to quiesce the GPU
@ 2017-10-12 20:54 Chris Wilson
  0 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2017-10-12 20:54 UTC (permalink / raw)
  To: intel-gfx

Since the introduction of debugfs/i915_drop_caches, we have offered the
ability to wait upon all outstanding batches. This is more efficient and
less error prone (one example is the use of context priorities, we have
to idle at the lowest in order not to jump over any low priority tasks
we want to wait upon) than trying to do it all in userspace. Though we
could if we wanted to, it's just easier to use the existing facility
designed for the purpose -- that we were already partially using!

Note that debugfs/i915_drop_caches has only existed since v4.2.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
---

Just another ping to see if we can work whats going on with pnv-d510.
-Chris

--
 lib/drmtest.c | 28 +---------------------------
 1 file changed, 1 insertion(+), 27 deletions(-)

diff --git a/lib/drmtest.c b/lib/drmtest.c
index 8a07152c..4ae023d7 100644
--- a/lib/drmtest.c
+++ b/lib/drmtest.c
@@ -159,35 +159,9 @@ static bool has_known_intel_chipset(int fd)
  */
 void gem_quiescent_gpu(int fd)
 {
-	uint32_t bbe = MI_BATCH_BUFFER_END;
-	struct drm_i915_gem_execbuffer2 execbuf;
-	struct drm_i915_gem_exec_object2 obj;
-	unsigned ring;
-
 	igt_terminate_spin_batches();
 
-	memset(&obj, 0, sizeof(obj));
-	obj.handle = gem_create(fd, 4096);
-	gem_write(fd, obj.handle, 0, &bbe, sizeof(&bbe));
-
-	memset(&execbuf, 0, sizeof(execbuf));
-	execbuf.buffers_ptr = to_user_pointer(&obj);
-	execbuf.buffer_count = 1;
-
-	for (ring = 0; ring < 1<<6; ring++) {
-		execbuf.flags = ring;
-		__gem_execbuf(fd, &execbuf);
-	}
-
-	if (gem_has_bsd2(fd)) {
-		execbuf.flags = I915_EXEC_BSD | (2 << 13);
-		__gem_execbuf(fd, &execbuf);
-	}
-
-	gem_sync(fd, obj.handle);
-	gem_close(fd, obj.handle);
-
-	igt_drop_caches_set(fd, DROP_RETIRE | DROP_FREED);
+	igt_drop_caches_set(fd, DROP_ACTIVE | DROP_RETIRE | DROP_FREED);
 }
 
 /**
-- 
2.15.0.rc0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2017-12-11 11:38 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-10-19 15:26 [PATCH igt] lib: Ask the kernel to quiesce the GPU Chris Wilson
2017-10-19 17:08 ` ✗ Fi.CI.BAT: failure for lib: Ask the kernel to quiesce the GPU (rev2) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2017-12-08 19:26 [igt CI] lib: Ask the kernel to quiesce the GPU Chris Wilson
2017-12-11 11:38 ` [PATCH igt] " Chris Wilson
2017-11-14 21:54 Chris Wilson
2017-10-12 20:54 Chris Wilson

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