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From: Stafford Horne <shorne@gmail.com>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Openrisc <openrisc@lists.librecores.org>,
	Stafford Horne <shorne@gmail.com>,
	Jonas Bonn <jonas@southpole.se>,
	Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>,
	Jan Henrik Weinstock <jan.weinstock@ice.rwth-aachen.de>
Subject: [PATCH v3 07/13] openrisc: fix initial preempt state for secondary cpu tasks
Date: Sun, 22 Oct 2017 12:15:54 +0900	[thread overview]
Message-ID: <20171022031600.29612-8-shorne@gmail.com> (raw)
In-Reply-To: <20171022031600.29612-1-shorne@gmail.com>

During SMP testing we were getting the below warning after booting the
secondary cpu:

[    0.060000] BUG: scheduling while atomic: swapper/1/0/0x00000000

This change follows similar patterns from other architectures to start
the schduler with preempt disabled.

Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 arch/openrisc/include/asm/thread_info.h | 2 +-
 arch/openrisc/kernel/smp.c              | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/openrisc/include/asm/thread_info.h b/arch/openrisc/include/asm/thread_info.h
index 6e619a79a401..c229aa6bb502 100644
--- a/arch/openrisc/include/asm/thread_info.h
+++ b/arch/openrisc/include/asm/thread_info.h
@@ -74,7 +74,7 @@ struct thread_info {
 	.task		= &tsk,				\
 	.flags		= 0,				\
 	.cpu		= 0,				\
-	.preempt_count	= 1,				\
+	.preempt_count	= INIT_PREEMPT_COUNT,		\
 	.addr_limit	= KERNEL_DS,			\
 	.ksp            = 0,                            \
 }
diff --git a/arch/openrisc/kernel/smp.c b/arch/openrisc/kernel/smp.c
index fd724123229a..154c94a0cfbc 100644
--- a/arch/openrisc/kernel/smp.c
+++ b/arch/openrisc/kernel/smp.c
@@ -128,6 +128,7 @@ asmlinkage __init void secondary_start_kernel(void)
 
 	local_irq_enable();
 
+	preempt_disable();
 	/*
 	 * OK, it's off to the idle thread for us
 	 */
-- 
2.13.6

WARNING: multiple messages have this Message-ID (diff)
From: Stafford Horne <shorne@gmail.com>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH v3 07/13] openrisc: fix initial preempt state for secondary cpu tasks
Date: Sun, 22 Oct 2017 12:15:54 +0900	[thread overview]
Message-ID: <20171022031600.29612-8-shorne@gmail.com> (raw)
In-Reply-To: <20171022031600.29612-1-shorne@gmail.com>

During SMP testing we were getting the below warning after booting the
secondary cpu:

[    0.060000] BUG: scheduling while atomic: swapper/1/0/0x00000000

This change follows similar patterns from other architectures to start
the schduler with preempt disabled.

Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 arch/openrisc/include/asm/thread_info.h | 2 +-
 arch/openrisc/kernel/smp.c              | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/openrisc/include/asm/thread_info.h b/arch/openrisc/include/asm/thread_info.h
index 6e619a79a401..c229aa6bb502 100644
--- a/arch/openrisc/include/asm/thread_info.h
+++ b/arch/openrisc/include/asm/thread_info.h
@@ -74,7 +74,7 @@ struct thread_info {
 	.task		= &tsk,				\
 	.flags		= 0,				\
 	.cpu		= 0,				\
-	.preempt_count	= 1,				\
+	.preempt_count	= INIT_PREEMPT_COUNT,		\
 	.addr_limit	= KERNEL_DS,			\
 	.ksp            = 0,                            \
 }
diff --git a/arch/openrisc/kernel/smp.c b/arch/openrisc/kernel/smp.c
index fd724123229a..154c94a0cfbc 100644
--- a/arch/openrisc/kernel/smp.c
+++ b/arch/openrisc/kernel/smp.c
@@ -128,6 +128,7 @@ asmlinkage __init void secondary_start_kernel(void)
 
 	local_irq_enable();
 
+	preempt_disable();
 	/*
 	 * OK, it's off to the idle thread for us
 	 */
-- 
2.13.6


  parent reply	other threads:[~2017-10-22  3:17 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-22  3:15 [PATCH v3 00/13] OpenRISC SMP Support Stafford Horne
2017-10-22  3:15 ` [OpenRISC] " Stafford Horne
2017-10-22  3:15 ` [PATCH v3 01/13] openrisc: use shadow registers to save regs on exception Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-22  3:15 ` [PATCH v3 02/13] openrisc: add 1 and 2 byte cmpxchg support Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-22  3:15 ` [PATCH v3 03/13] openrisc: use qspinlocks and qrwlocks Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-22  3:15 ` [PATCH v3 04/13] dt-bindings: add openrisc to vendor prefixes list Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-22  3:15 ` [PATCH v3 05/13] irqchip: add initial support for ompic Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-23  8:00   ` Marc Zyngier
2017-10-23  8:00     ` [OpenRISC] " Marc Zyngier
2017-10-23  8:00     ` Marc Zyngier
2017-10-23 12:57     ` Stafford Horne
2017-10-23 12:57       ` [OpenRISC] " Stafford Horne
2017-10-27  3:19   ` Rob Herring
2017-10-27  3:19     ` [OpenRISC] " Rob Herring
2017-10-27  3:19     ` Rob Herring
2017-10-22  3:15 ` [PATCH v3 06/13] openrisc: initial SMP support Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-22  3:15 ` Stafford Horne [this message]
2017-10-22  3:15   ` [OpenRISC] [PATCH v3 07/13] openrisc: fix initial preempt state for secondary cpu tasks Stafford Horne
2017-10-22  3:15 ` [PATCH v3 08/13] openrisc: sleep instead of spin on secondary wait Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-22  3:15 ` [PATCH v3 09/13] openrisc: add cacheflush support to fix icache aliasing Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-22  3:15 ` [PATCH v3 10/13] openrisc: add simple_smp dts and defconfig for simulators Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-22  3:15 ` [PATCH v3 11/13] openrisc: support framepointers and STACKTRACE_SUPPORT Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-22  3:15 ` [PATCH v3 12/13] openrisc: enable LOCKDEP_SUPPORT and irqflags tracing Stafford Horne
2017-10-22  3:15   ` [OpenRISC] " Stafford Horne
2017-10-22  3:16 ` [PATCH v3 13/13] openrisc: add tick timer multi-core sync logic Stafford Horne
2017-10-22  3:16   ` [OpenRISC] " Stafford Horne

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