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From: kbuild test robot <lkp@intel.com>
To: Rick Chen <rickchen36@gmail.com>
Cc: kbuild-all@01.org, daniel.lezcano@linaro.org, tglx@linutronix.de,
	robh@kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, rick@andestech.com,
	Rick Chen <rickchen36@gmail.com>,
	Greentime Hu <green.hu@gmail.com>
Subject: Re: [PATCH v2 2/3] clocksource/drivers/Kconfig: Support andestech atcpit100 timer
Date: Thu, 2 Nov 2017 04:40:41 +0800	[thread overview]
Message-ID: <201711020414.zdZAaXZn%fengguang.wu@intel.com> (raw)
In-Reply-To: <1509340737-10225-2-git-send-email-rickchen36@gmail.com>

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Hi Rick,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on tip/timers/core]
[also build test WARNING on v4.14-rc7 next-20171018]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Rick-Chen/clocksource-drivers-atcpit100-Add-andestech-atcpit100-timer/20171101-224330
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All warnings (new ones prefixed by >>):

   include/linux/compiler.h:286:8: sparse: attribute 'no_sanitize_address': unknown attribute
   In file included from include/linux/kernel.h:13:0,
                    from include/linux/list.h:8,
                    from include/linux/smp.h:11,
                    from include/linux/irq.h:12,
                    from drivers/clocksource/timer-atcpit100.c:18:
   drivers/clocksource/timer-atcpit100.c: In function 'atcpit100_init':
>> drivers/clocksource/timer-atcpit100.c:189:19: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
       irq, freq, HZ, (u32)base);
                      ^
   include/linux/printk.h:308:34: note: in definition of macro 'pr_info'
     printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__)
                                     ^~~~~~~~~~~

vim +189 drivers/clocksource/timer-atcpit100.c

28914401 Rick Chen 2017-10-30  @18  #include <linux/irq.h>
28914401 Rick Chen 2017-10-30   19  #include <linux/clocksource.h>
28914401 Rick Chen 2017-10-30   20  #include <linux/clockchips.h>
28914401 Rick Chen 2017-10-30   21  #include <linux/interrupt.h>
28914401 Rick Chen 2017-10-30   22  #include <linux/ioport.h>
28914401 Rick Chen 2017-10-30   23  #include <linux/cpufreq.h>
28914401 Rick Chen 2017-10-30   24  #include <linux/sched.h>
28914401 Rick Chen 2017-10-30   25  #include <linux/sched_clock.h>
28914401 Rick Chen 2017-10-30   26  #include <linux/of_address.h>
28914401 Rick Chen 2017-10-30   27  #include <linux/of_irq.h>
28914401 Rick Chen 2017-10-30   28  #include <linux/of_platform.h>
28914401 Rick Chen 2017-10-30   29  
28914401 Rick Chen 2017-10-30   30  void __iomem *base;
28914401 Rick Chen 2017-10-30   31  static u32 freq;
28914401 Rick Chen 2017-10-30   32  
28914401 Rick Chen 2017-10-30   33  /*
28914401 Rick Chen 2017-10-30   34   * Definition of register offsets
28914401 Rick Chen 2017-10-30   35   */
28914401 Rick Chen 2017-10-30   36  
28914401 Rick Chen 2017-10-30   37  /* ID and Revision Register */
28914401 Rick Chen 2017-10-30   38  #define ID_REV		0x0
28914401 Rick Chen 2017-10-30   39  
28914401 Rick Chen 2017-10-30   40  /* Configuration Register */
28914401 Rick Chen 2017-10-30   41  #define CFG		0x10
28914401 Rick Chen 2017-10-30   42  
28914401 Rick Chen 2017-10-30   43  /* Interrupt Enable Register */
28914401 Rick Chen 2017-10-30   44  #define INT_EN		0x14
28914401 Rick Chen 2017-10-30   45  #define CH_INT_EN(c, i)	((1<<i)<<(4*c))
28914401 Rick Chen 2017-10-30   46  
28914401 Rick Chen 2017-10-30   47  /* Interrupt Status Register */
28914401 Rick Chen 2017-10-30   48  #define INT_STA		0x18
28914401 Rick Chen 2017-10-30   49  #define CH_INT_STA(c, i)	((1<<i)<<(4*c))
28914401 Rick Chen 2017-10-30   50  
28914401 Rick Chen 2017-10-30   51  /* Channel Enable Register */
28914401 Rick Chen 2017-10-30   52  #define CH_EN		0x1C
28914401 Rick Chen 2017-10-30   53  #define CH_TMR_EN(c, t)	((1<<t)<<(4*c))
28914401 Rick Chen 2017-10-30   54  
28914401 Rick Chen 2017-10-30   55  /* Ch n Control REgister */
28914401 Rick Chen 2017-10-30   56  #define CH_CTL(n)	(0x20+0x10*n)
28914401 Rick Chen 2017-10-30   57  /* Channel clock source , bit 3 , 0:External clock , 1:APB clock */
28914401 Rick Chen 2017-10-30   58  #define APB_CLK		(1<<3)
28914401 Rick Chen 2017-10-30   59  /* Channel mode , bit 0~2 */
28914401 Rick Chen 2017-10-30   60  #define TMR_32		1
28914401 Rick Chen 2017-10-30   61  #define TMR_16		2
28914401 Rick Chen 2017-10-30   62  #define TMR_8		3
28914401 Rick Chen 2017-10-30   63  #define PWM		4
28914401 Rick Chen 2017-10-30   64  
28914401 Rick Chen 2017-10-30   65  #define CH_REL(n)	(0x24+0x10*n)
28914401 Rick Chen 2017-10-30   66  #define CH_CNT(n)	(0x28+0x10*n)
28914401 Rick Chen 2017-10-30   67  
28914401 Rick Chen 2017-10-30   68  static unsigned long atcpit100_read_current_timer_down(void)
28914401 Rick Chen 2017-10-30   69  {
28914401 Rick Chen 2017-10-30   70  	return ~readl(base + CH_CNT(1));
28914401 Rick Chen 2017-10-30   71  }
28914401 Rick Chen 2017-10-30   72  
28914401 Rick Chen 2017-10-30   73  static u64 notrace atcpit100_read_sched_clock_down(void)
28914401 Rick Chen 2017-10-30   74  {
28914401 Rick Chen 2017-10-30   75  	return atcpit100_read_current_timer_down();
28914401 Rick Chen 2017-10-30   76  }
28914401 Rick Chen 2017-10-30   77  
28914401 Rick Chen 2017-10-30   78  static void atcpit100_clocksource_init(void)
28914401 Rick Chen 2017-10-30   79  {
28914401 Rick Chen 2017-10-30   80  	writel(0xffffffff, base + CH_REL(1));
28914401 Rick Chen 2017-10-30   81  	writel(APB_CLK|TMR_32, base + CH_CTL(1));
28914401 Rick Chen 2017-10-30   82  	writel(readl(base + CH_EN) | CH_TMR_EN(1, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30   83  	clocksource_mmio_init(base + CH_CNT(1),
28914401 Rick Chen 2017-10-30   84  			      "atcpit100_tm1",
28914401 Rick Chen 2017-10-30   85  			      freq,
28914401 Rick Chen 2017-10-30   86  			      300, 32, clocksource_mmio_readl_down);
28914401 Rick Chen 2017-10-30   87  	sched_clock_register(atcpit100_read_sched_clock_down, 32, freq);
28914401 Rick Chen 2017-10-30   88  }
28914401 Rick Chen 2017-10-30   89  
28914401 Rick Chen 2017-10-30   90  static int atcpit100_set_next_event(unsigned long cycles,
28914401 Rick Chen 2017-10-30   91  		struct clock_event_device *evt)
28914401 Rick Chen 2017-10-30   92  {
28914401 Rick Chen 2017-10-30   93  	writel(cycles, base + CH_REL(0));
28914401 Rick Chen 2017-10-30   94  
28914401 Rick Chen 2017-10-30   95  	return 0;
28914401 Rick Chen 2017-10-30   96  }
28914401 Rick Chen 2017-10-30   97  
28914401 Rick Chen 2017-10-30   98  static int atcpit100_set_state_shutdown(struct clock_event_device *evt)
28914401 Rick Chen 2017-10-30   99  {
28914401 Rick Chen 2017-10-30  100  	writel(readl(base + CH_EN) & ~CH_TMR_EN(0, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30  101  
28914401 Rick Chen 2017-10-30  102  	return 0;
28914401 Rick Chen 2017-10-30  103  }
28914401 Rick Chen 2017-10-30  104  static int atcpit100_set_state_periodic(struct clock_event_device *evt)
28914401 Rick Chen 2017-10-30  105  {
28914401 Rick Chen 2017-10-30  106  	writel(freq / HZ - 1, base + CH_CNT(0));
28914401 Rick Chen 2017-10-30  107  	writel(freq / HZ - 1, base + CH_REL(0));
28914401 Rick Chen 2017-10-30  108  	writel(readl(base + CH_EN) | CH_TMR_EN(0, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30  109  
28914401 Rick Chen 2017-10-30  110  	return 0;
28914401 Rick Chen 2017-10-30  111  }
28914401 Rick Chen 2017-10-30  112  static int atcpit100_tick_resume(struct clock_event_device *evt)
28914401 Rick Chen 2017-10-30  113  {
28914401 Rick Chen 2017-10-30  114  	writel(readl(base + INT_STA) | CH_INT_STA(0, 0), base + INT_STA);
28914401 Rick Chen 2017-10-30  115  	writel(readl(base + CH_EN) | CH_TMR_EN(0, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30  116  
28914401 Rick Chen 2017-10-30  117  	return 0;
28914401 Rick Chen 2017-10-30  118  }
28914401 Rick Chen 2017-10-30  119  static int atcpit100_set_state_oneshot(struct clock_event_device *evt)
28914401 Rick Chen 2017-10-30  120  {
28914401 Rick Chen 2017-10-30  121  	writel(0xffffffff, base + CH_REL(0));
28914401 Rick Chen 2017-10-30  122  	writel(readl(base + CH_EN) | CH_TMR_EN(0, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30  123  
28914401 Rick Chen 2017-10-30  124  	return 0;
28914401 Rick Chen 2017-10-30  125  }
28914401 Rick Chen 2017-10-30  126  
28914401 Rick Chen 2017-10-30  127  static struct clock_event_device clockevent_atcpit100 = {
28914401 Rick Chen 2017-10-30  128  	.name		= "atcpit100_tm0",
28914401 Rick Chen 2017-10-30  129  	.features       = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
28914401 Rick Chen 2017-10-30  130  	.shift		= 32,
28914401 Rick Chen 2017-10-30  131  	.cpumask	= cpu_all_mask,
28914401 Rick Chen 2017-10-30  132  	.set_next_event	= atcpit100_set_next_event,
28914401 Rick Chen 2017-10-30  133  	.set_state_shutdown = atcpit100_set_state_shutdown,
28914401 Rick Chen 2017-10-30  134  	.set_state_periodic = atcpit100_set_state_periodic,
28914401 Rick Chen 2017-10-30  135  	.set_state_oneshot = atcpit100_set_state_oneshot,
28914401 Rick Chen 2017-10-30  136  	.tick_resume = atcpit100_tick_resume,
28914401 Rick Chen 2017-10-30  137  };
28914401 Rick Chen 2017-10-30  138  
28914401 Rick Chen 2017-10-30  139  static irqreturn_t timer1_interrupt(int irq, void *dev_id)
28914401 Rick Chen 2017-10-30  140  {
28914401 Rick Chen 2017-10-30  141  	struct clock_event_device *evt = dev_id;
28914401 Rick Chen 2017-10-30  142  
28914401 Rick Chen 2017-10-30  143  	writel(readl(base + INT_STA) | CH_INT_STA(0, 0), base + INT_STA);
28914401 Rick Chen 2017-10-30  144  
28914401 Rick Chen 2017-10-30  145  	evt->event_handler(evt);
28914401 Rick Chen 2017-10-30  146  
28914401 Rick Chen 2017-10-30  147  	return IRQ_HANDLED;
28914401 Rick Chen 2017-10-30  148  }
28914401 Rick Chen 2017-10-30  149  
28914401 Rick Chen 2017-10-30  150  static struct irqaction timer1_irq = {
28914401 Rick Chen 2017-10-30  151  	.name		= "Timer Tick",
28914401 Rick Chen 2017-10-30  152  	.flags		= IRQF_TIMER | IRQF_IRQPOLL,
28914401 Rick Chen 2017-10-30  153  	.handler	= timer1_interrupt,
28914401 Rick Chen 2017-10-30  154  	.dev_id		= &clockevent_atcpit100
28914401 Rick Chen 2017-10-30  155  };
28914401 Rick Chen 2017-10-30  156  
28914401 Rick Chen 2017-10-30  157  static void __init atcpit100_clockevent_init(int irq)
28914401 Rick Chen 2017-10-30  158  {
28914401 Rick Chen 2017-10-30  159  	struct clock_event_device *evt = &clockevent_atcpit100;
28914401 Rick Chen 2017-10-30  160  
28914401 Rick Chen 2017-10-30  161  	evt->mult = div_sc(freq, NSEC_PER_SEC, evt->shift);
28914401 Rick Chen 2017-10-30  162  	evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
28914401 Rick Chen 2017-10-30  163  	evt->min_delta_ns = clockevent_delta2ns(3, evt);
28914401 Rick Chen 2017-10-30  164  	clockevents_register_device(evt);
28914401 Rick Chen 2017-10-30  165  	setup_irq(irq, &timer1_irq);
28914401 Rick Chen 2017-10-30  166  }
28914401 Rick Chen 2017-10-30  167  
28914401 Rick Chen 2017-10-30  168  static int __init atcpit100_init(struct device_node *dev)
28914401 Rick Chen 2017-10-30  169  {
28914401 Rick Chen 2017-10-30  170  	int irq;
28914401 Rick Chen 2017-10-30  171  
28914401 Rick Chen 2017-10-30  172  	base = of_iomap(dev, 0);
28914401 Rick Chen 2017-10-30  173  	if (!base) {
28914401 Rick Chen 2017-10-30  174  		pr_warn("Can't remap registers");
28914401 Rick Chen 2017-10-30  175  		return -ENXIO;
28914401 Rick Chen 2017-10-30  176  	}
28914401 Rick Chen 2017-10-30  177  
28914401 Rick Chen 2017-10-30  178  	if (of_property_read_u32(dev, "clock-frequency", &freq)) {
28914401 Rick Chen 2017-10-30  179  		pr_warn("Can't read clock-frequency");
28914401 Rick Chen 2017-10-30  180  		return -EINVAL;
28914401 Rick Chen 2017-10-30  181  	}
28914401 Rick Chen 2017-10-30  182  	irq = irq_of_parse_and_map(dev, 0);
28914401 Rick Chen 2017-10-30  183  
28914401 Rick Chen 2017-10-30  184  	if (irq <= 0) {
28914401 Rick Chen 2017-10-30  185  		pr_warn("Failed to map timer IRQ\n");
28914401 Rick Chen 2017-10-30  186  		return -EINVAL;
28914401 Rick Chen 2017-10-30  187  	}
28914401 Rick Chen 2017-10-30  188  	pr_info("ATCPIT100 timer 1 installed on IRQ %d, with clock %d at %d HZ. in 0x%08x\r\n",
28914401 Rick Chen 2017-10-30 @189  			irq, freq, HZ, (u32)base);
28914401 Rick Chen 2017-10-30  190  	writel(APB_CLK|TMR_32, base + CH_CTL(0));
28914401 Rick Chen 2017-10-30  191  	writel(readl(base + INT_EN) | CH_INT_EN(0, 0), base + INT_EN);
28914401 Rick Chen 2017-10-30  192  	writel(readl(base + CH_EN) | CH_TMR_EN(0, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30  193  	atcpit100_clocksource_init();
28914401 Rick Chen 2017-10-30  194  	atcpit100_clockevent_init(irq);
28914401 Rick Chen 2017-10-30  195  
28914401 Rick Chen 2017-10-30  196  	return 0;
28914401 Rick Chen 2017-10-30  197  }
28914401 Rick Chen 2017-10-30  198  

:::::: The code at line 189 was first introduced by commit
:::::: 289144019bcc6168c2135488589d11720ef3428e clocksource/drivers/atcpit100: Add andestech atcpit100 timer

:::::: TO: Rick Chen <rickchen36@gmail.com>
:::::: CC: 0day robot <fengguang.wu@intel.com>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 61748 bytes --]

WARNING: multiple messages have this Message-ID (diff)
From: kbuild test robot <lkp-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Cc: kbuild-all-JC7UmRfGjtg@public.gmane.org,
	daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org,
	robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	rick-MUIXKm3Oiri1Z/+hSey0Gg@public.gmane.org,
	Rick Chen <rickchen36-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Greentime Hu <green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: Re: [PATCH v2 2/3] clocksource/drivers/Kconfig: Support andestech atcpit100 timer
Date: Thu, 2 Nov 2017 04:40:41 +0800	[thread overview]
Message-ID: <201711020414.zdZAaXZn%fengguang.wu@intel.com> (raw)
In-Reply-To: <1509340737-10225-2-git-send-email-rickchen36-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 13032 bytes --]

Hi Rick,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on tip/timers/core]
[also build test WARNING on v4.14-rc7 next-20171018]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Rick-Chen/clocksource-drivers-atcpit100-Add-andestech-atcpit100-timer/20171101-224330
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All warnings (new ones prefixed by >>):

   include/linux/compiler.h:286:8: sparse: attribute 'no_sanitize_address': unknown attribute
   In file included from include/linux/kernel.h:13:0,
                    from include/linux/list.h:8,
                    from include/linux/smp.h:11,
                    from include/linux/irq.h:12,
                    from drivers/clocksource/timer-atcpit100.c:18:
   drivers/clocksource/timer-atcpit100.c: In function 'atcpit100_init':
>> drivers/clocksource/timer-atcpit100.c:189:19: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
       irq, freq, HZ, (u32)base);
                      ^
   include/linux/printk.h:308:34: note: in definition of macro 'pr_info'
     printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__)
                                     ^~~~~~~~~~~

vim +189 drivers/clocksource/timer-atcpit100.c

28914401 Rick Chen 2017-10-30  @18  #include <linux/irq.h>
28914401 Rick Chen 2017-10-30   19  #include <linux/clocksource.h>
28914401 Rick Chen 2017-10-30   20  #include <linux/clockchips.h>
28914401 Rick Chen 2017-10-30   21  #include <linux/interrupt.h>
28914401 Rick Chen 2017-10-30   22  #include <linux/ioport.h>
28914401 Rick Chen 2017-10-30   23  #include <linux/cpufreq.h>
28914401 Rick Chen 2017-10-30   24  #include <linux/sched.h>
28914401 Rick Chen 2017-10-30   25  #include <linux/sched_clock.h>
28914401 Rick Chen 2017-10-30   26  #include <linux/of_address.h>
28914401 Rick Chen 2017-10-30   27  #include <linux/of_irq.h>
28914401 Rick Chen 2017-10-30   28  #include <linux/of_platform.h>
28914401 Rick Chen 2017-10-30   29  
28914401 Rick Chen 2017-10-30   30  void __iomem *base;
28914401 Rick Chen 2017-10-30   31  static u32 freq;
28914401 Rick Chen 2017-10-30   32  
28914401 Rick Chen 2017-10-30   33  /*
28914401 Rick Chen 2017-10-30   34   * Definition of register offsets
28914401 Rick Chen 2017-10-30   35   */
28914401 Rick Chen 2017-10-30   36  
28914401 Rick Chen 2017-10-30   37  /* ID and Revision Register */
28914401 Rick Chen 2017-10-30   38  #define ID_REV		0x0
28914401 Rick Chen 2017-10-30   39  
28914401 Rick Chen 2017-10-30   40  /* Configuration Register */
28914401 Rick Chen 2017-10-30   41  #define CFG		0x10
28914401 Rick Chen 2017-10-30   42  
28914401 Rick Chen 2017-10-30   43  /* Interrupt Enable Register */
28914401 Rick Chen 2017-10-30   44  #define INT_EN		0x14
28914401 Rick Chen 2017-10-30   45  #define CH_INT_EN(c, i)	((1<<i)<<(4*c))
28914401 Rick Chen 2017-10-30   46  
28914401 Rick Chen 2017-10-30   47  /* Interrupt Status Register */
28914401 Rick Chen 2017-10-30   48  #define INT_STA		0x18
28914401 Rick Chen 2017-10-30   49  #define CH_INT_STA(c, i)	((1<<i)<<(4*c))
28914401 Rick Chen 2017-10-30   50  
28914401 Rick Chen 2017-10-30   51  /* Channel Enable Register */
28914401 Rick Chen 2017-10-30   52  #define CH_EN		0x1C
28914401 Rick Chen 2017-10-30   53  #define CH_TMR_EN(c, t)	((1<<t)<<(4*c))
28914401 Rick Chen 2017-10-30   54  
28914401 Rick Chen 2017-10-30   55  /* Ch n Control REgister */
28914401 Rick Chen 2017-10-30   56  #define CH_CTL(n)	(0x20+0x10*n)
28914401 Rick Chen 2017-10-30   57  /* Channel clock source , bit 3 , 0:External clock , 1:APB clock */
28914401 Rick Chen 2017-10-30   58  #define APB_CLK		(1<<3)
28914401 Rick Chen 2017-10-30   59  /* Channel mode , bit 0~2 */
28914401 Rick Chen 2017-10-30   60  #define TMR_32		1
28914401 Rick Chen 2017-10-30   61  #define TMR_16		2
28914401 Rick Chen 2017-10-30   62  #define TMR_8		3
28914401 Rick Chen 2017-10-30   63  #define PWM		4
28914401 Rick Chen 2017-10-30   64  
28914401 Rick Chen 2017-10-30   65  #define CH_REL(n)	(0x24+0x10*n)
28914401 Rick Chen 2017-10-30   66  #define CH_CNT(n)	(0x28+0x10*n)
28914401 Rick Chen 2017-10-30   67  
28914401 Rick Chen 2017-10-30   68  static unsigned long atcpit100_read_current_timer_down(void)
28914401 Rick Chen 2017-10-30   69  {
28914401 Rick Chen 2017-10-30   70  	return ~readl(base + CH_CNT(1));
28914401 Rick Chen 2017-10-30   71  }
28914401 Rick Chen 2017-10-30   72  
28914401 Rick Chen 2017-10-30   73  static u64 notrace atcpit100_read_sched_clock_down(void)
28914401 Rick Chen 2017-10-30   74  {
28914401 Rick Chen 2017-10-30   75  	return atcpit100_read_current_timer_down();
28914401 Rick Chen 2017-10-30   76  }
28914401 Rick Chen 2017-10-30   77  
28914401 Rick Chen 2017-10-30   78  static void atcpit100_clocksource_init(void)
28914401 Rick Chen 2017-10-30   79  {
28914401 Rick Chen 2017-10-30   80  	writel(0xffffffff, base + CH_REL(1));
28914401 Rick Chen 2017-10-30   81  	writel(APB_CLK|TMR_32, base + CH_CTL(1));
28914401 Rick Chen 2017-10-30   82  	writel(readl(base + CH_EN) | CH_TMR_EN(1, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30   83  	clocksource_mmio_init(base + CH_CNT(1),
28914401 Rick Chen 2017-10-30   84  			      "atcpit100_tm1",
28914401 Rick Chen 2017-10-30   85  			      freq,
28914401 Rick Chen 2017-10-30   86  			      300, 32, clocksource_mmio_readl_down);
28914401 Rick Chen 2017-10-30   87  	sched_clock_register(atcpit100_read_sched_clock_down, 32, freq);
28914401 Rick Chen 2017-10-30   88  }
28914401 Rick Chen 2017-10-30   89  
28914401 Rick Chen 2017-10-30   90  static int atcpit100_set_next_event(unsigned long cycles,
28914401 Rick Chen 2017-10-30   91  		struct clock_event_device *evt)
28914401 Rick Chen 2017-10-30   92  {
28914401 Rick Chen 2017-10-30   93  	writel(cycles, base + CH_REL(0));
28914401 Rick Chen 2017-10-30   94  
28914401 Rick Chen 2017-10-30   95  	return 0;
28914401 Rick Chen 2017-10-30   96  }
28914401 Rick Chen 2017-10-30   97  
28914401 Rick Chen 2017-10-30   98  static int atcpit100_set_state_shutdown(struct clock_event_device *evt)
28914401 Rick Chen 2017-10-30   99  {
28914401 Rick Chen 2017-10-30  100  	writel(readl(base + CH_EN) & ~CH_TMR_EN(0, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30  101  
28914401 Rick Chen 2017-10-30  102  	return 0;
28914401 Rick Chen 2017-10-30  103  }
28914401 Rick Chen 2017-10-30  104  static int atcpit100_set_state_periodic(struct clock_event_device *evt)
28914401 Rick Chen 2017-10-30  105  {
28914401 Rick Chen 2017-10-30  106  	writel(freq / HZ - 1, base + CH_CNT(0));
28914401 Rick Chen 2017-10-30  107  	writel(freq / HZ - 1, base + CH_REL(0));
28914401 Rick Chen 2017-10-30  108  	writel(readl(base + CH_EN) | CH_TMR_EN(0, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30  109  
28914401 Rick Chen 2017-10-30  110  	return 0;
28914401 Rick Chen 2017-10-30  111  }
28914401 Rick Chen 2017-10-30  112  static int atcpit100_tick_resume(struct clock_event_device *evt)
28914401 Rick Chen 2017-10-30  113  {
28914401 Rick Chen 2017-10-30  114  	writel(readl(base + INT_STA) | CH_INT_STA(0, 0), base + INT_STA);
28914401 Rick Chen 2017-10-30  115  	writel(readl(base + CH_EN) | CH_TMR_EN(0, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30  116  
28914401 Rick Chen 2017-10-30  117  	return 0;
28914401 Rick Chen 2017-10-30  118  }
28914401 Rick Chen 2017-10-30  119  static int atcpit100_set_state_oneshot(struct clock_event_device *evt)
28914401 Rick Chen 2017-10-30  120  {
28914401 Rick Chen 2017-10-30  121  	writel(0xffffffff, base + CH_REL(0));
28914401 Rick Chen 2017-10-30  122  	writel(readl(base + CH_EN) | CH_TMR_EN(0, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30  123  
28914401 Rick Chen 2017-10-30  124  	return 0;
28914401 Rick Chen 2017-10-30  125  }
28914401 Rick Chen 2017-10-30  126  
28914401 Rick Chen 2017-10-30  127  static struct clock_event_device clockevent_atcpit100 = {
28914401 Rick Chen 2017-10-30  128  	.name		= "atcpit100_tm0",
28914401 Rick Chen 2017-10-30  129  	.features       = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
28914401 Rick Chen 2017-10-30  130  	.shift		= 32,
28914401 Rick Chen 2017-10-30  131  	.cpumask	= cpu_all_mask,
28914401 Rick Chen 2017-10-30  132  	.set_next_event	= atcpit100_set_next_event,
28914401 Rick Chen 2017-10-30  133  	.set_state_shutdown = atcpit100_set_state_shutdown,
28914401 Rick Chen 2017-10-30  134  	.set_state_periodic = atcpit100_set_state_periodic,
28914401 Rick Chen 2017-10-30  135  	.set_state_oneshot = atcpit100_set_state_oneshot,
28914401 Rick Chen 2017-10-30  136  	.tick_resume = atcpit100_tick_resume,
28914401 Rick Chen 2017-10-30  137  };
28914401 Rick Chen 2017-10-30  138  
28914401 Rick Chen 2017-10-30  139  static irqreturn_t timer1_interrupt(int irq, void *dev_id)
28914401 Rick Chen 2017-10-30  140  {
28914401 Rick Chen 2017-10-30  141  	struct clock_event_device *evt = dev_id;
28914401 Rick Chen 2017-10-30  142  
28914401 Rick Chen 2017-10-30  143  	writel(readl(base + INT_STA) | CH_INT_STA(0, 0), base + INT_STA);
28914401 Rick Chen 2017-10-30  144  
28914401 Rick Chen 2017-10-30  145  	evt->event_handler(evt);
28914401 Rick Chen 2017-10-30  146  
28914401 Rick Chen 2017-10-30  147  	return IRQ_HANDLED;
28914401 Rick Chen 2017-10-30  148  }
28914401 Rick Chen 2017-10-30  149  
28914401 Rick Chen 2017-10-30  150  static struct irqaction timer1_irq = {
28914401 Rick Chen 2017-10-30  151  	.name		= "Timer Tick",
28914401 Rick Chen 2017-10-30  152  	.flags		= IRQF_TIMER | IRQF_IRQPOLL,
28914401 Rick Chen 2017-10-30  153  	.handler	= timer1_interrupt,
28914401 Rick Chen 2017-10-30  154  	.dev_id		= &clockevent_atcpit100
28914401 Rick Chen 2017-10-30  155  };
28914401 Rick Chen 2017-10-30  156  
28914401 Rick Chen 2017-10-30  157  static void __init atcpit100_clockevent_init(int irq)
28914401 Rick Chen 2017-10-30  158  {
28914401 Rick Chen 2017-10-30  159  	struct clock_event_device *evt = &clockevent_atcpit100;
28914401 Rick Chen 2017-10-30  160  
28914401 Rick Chen 2017-10-30  161  	evt->mult = div_sc(freq, NSEC_PER_SEC, evt->shift);
28914401 Rick Chen 2017-10-30  162  	evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
28914401 Rick Chen 2017-10-30  163  	evt->min_delta_ns = clockevent_delta2ns(3, evt);
28914401 Rick Chen 2017-10-30  164  	clockevents_register_device(evt);
28914401 Rick Chen 2017-10-30  165  	setup_irq(irq, &timer1_irq);
28914401 Rick Chen 2017-10-30  166  }
28914401 Rick Chen 2017-10-30  167  
28914401 Rick Chen 2017-10-30  168  static int __init atcpit100_init(struct device_node *dev)
28914401 Rick Chen 2017-10-30  169  {
28914401 Rick Chen 2017-10-30  170  	int irq;
28914401 Rick Chen 2017-10-30  171  
28914401 Rick Chen 2017-10-30  172  	base = of_iomap(dev, 0);
28914401 Rick Chen 2017-10-30  173  	if (!base) {
28914401 Rick Chen 2017-10-30  174  		pr_warn("Can't remap registers");
28914401 Rick Chen 2017-10-30  175  		return -ENXIO;
28914401 Rick Chen 2017-10-30  176  	}
28914401 Rick Chen 2017-10-30  177  
28914401 Rick Chen 2017-10-30  178  	if (of_property_read_u32(dev, "clock-frequency", &freq)) {
28914401 Rick Chen 2017-10-30  179  		pr_warn("Can't read clock-frequency");
28914401 Rick Chen 2017-10-30  180  		return -EINVAL;
28914401 Rick Chen 2017-10-30  181  	}
28914401 Rick Chen 2017-10-30  182  	irq = irq_of_parse_and_map(dev, 0);
28914401 Rick Chen 2017-10-30  183  
28914401 Rick Chen 2017-10-30  184  	if (irq <= 0) {
28914401 Rick Chen 2017-10-30  185  		pr_warn("Failed to map timer IRQ\n");
28914401 Rick Chen 2017-10-30  186  		return -EINVAL;
28914401 Rick Chen 2017-10-30  187  	}
28914401 Rick Chen 2017-10-30  188  	pr_info("ATCPIT100 timer 1 installed on IRQ %d, with clock %d at %d HZ. in 0x%08x\r\n",
28914401 Rick Chen 2017-10-30 @189  			irq, freq, HZ, (u32)base);
28914401 Rick Chen 2017-10-30  190  	writel(APB_CLK|TMR_32, base + CH_CTL(0));
28914401 Rick Chen 2017-10-30  191  	writel(readl(base + INT_EN) | CH_INT_EN(0, 0), base + INT_EN);
28914401 Rick Chen 2017-10-30  192  	writel(readl(base + CH_EN) | CH_TMR_EN(0, 0), base + CH_EN);
28914401 Rick Chen 2017-10-30  193  	atcpit100_clocksource_init();
28914401 Rick Chen 2017-10-30  194  	atcpit100_clockevent_init(irq);
28914401 Rick Chen 2017-10-30  195  
28914401 Rick Chen 2017-10-30  196  	return 0;
28914401 Rick Chen 2017-10-30  197  }
28914401 Rick Chen 2017-10-30  198  

:::::: The code at line 189 was first introduced by commit
:::::: 289144019bcc6168c2135488589d11720ef3428e clocksource/drivers/atcpit100: Add andestech atcpit100 timer

:::::: TO: Rick Chen <rickchen36-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
:::::: CC: 0day robot <fengguang.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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  reply	other threads:[~2017-11-01 20:41 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-30  5:18 [PATCH v2 1/3] clocksource/drivers/atcpit100: Add andestech atcpit100 timer Rick Chen
2017-10-30  5:18 ` Rick Chen
2017-10-30  5:18 ` [PATCH v2 2/3] clocksource/drivers/Kconfig: Support " Rick Chen
2017-11-01 20:40   ` kbuild test robot [this message]
2017-11-01 20:40     ` kbuild test robot
2017-10-30  5:18 ` [PATCH v2 3/3] dt-bindings: timer: Add andestech atcpit100 timer binding doc Rick Chen
2017-11-01 21:41   ` Rob Herring
2017-11-01 21:41     ` Rob Herring

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