From: Ladislav Michl <ladis@linux-mips.org> To: linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org Cc: Boris Brezillon <boris.brezillon@free-electrons.com>, Aaro Koskinen <aaro.koskinen@iki.fi>, Tony Lindgren <tony@atomide.com>, Peter Ujfalusi <peter.ujfalusi@ti.com>, Kyungmin Park <kyungmin.park@samsung.com>, Roger Quadros <rogerq@ti.com> Subject: [PATCH v5 13/16] memory: omap-gpmc: Refactor OneNAND support Date: Wed, 15 Nov 2017 17:36:10 +0100 [thread overview] Message-ID: <20171115163610.n7gsbeoqukqovqm4@lenoch> (raw) In-Reply-To: <20171115162306.2o2w2yrf7wucroxd@lenoch> Use generic probe function to deal with OneNAND node and remove now useless gpmc_probe_onenand_child function. Import sync mode timing calculation function from mach-omap2/gpmc-onenand.c and prepare for MTD driver DTfication. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> --- Changes in v5: - make gpmc_omap_onenand_set_timings decsription more descriptive Changes in v4: None Changes in v3: None Changes in v2: - add gpmc_omap_onenand_set_timings description drivers/memory/omap-gpmc.c | 158 +++++++++++++++++++++++++++++++++------------ include/linux/omap-gpmc.h | 28 ++++++++ 2 files changed, 145 insertions(+), 41 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index 0e30ee1c8677..90a66b3f7ae1 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -32,7 +32,6 @@ #include <linux/pm_runtime.h> #include <linux/platform_data/mtd-nand-omap2.h> -#include <linux/platform_data/mtd-onenand-omap2.h> #include <asm/mach-types.h> @@ -1138,6 +1137,112 @@ struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *reg, int cs) } EXPORT_SYMBOL_GPL(gpmc_omap_get_nand_ops); +static void gpmc_omap_onenand_calc_sync_timings(struct gpmc_timings *t, + struct gpmc_settings *s, + int freq, int latency) +{ + struct gpmc_device_timings dev_t; + const int t_cer = 15; + const int t_avdp = 12; + const int t_cez = 20; /* max of t_cez, t_oez */ + const int t_wpl = 40; + const int t_wph = 30; + int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo; + + switch (freq) { + case 104: + min_gpmc_clk_period = 9600; /* 104 MHz */ + t_ces = 3; + t_avds = 4; + t_avdh = 2; + t_ach = 3; + t_aavdh = 6; + t_rdyo = 6; + break; + case 83: + min_gpmc_clk_period = 12000; /* 83 MHz */ + t_ces = 5; + t_avds = 4; + t_avdh = 2; + t_ach = 6; + t_aavdh = 6; + t_rdyo = 9; + break; + case 66: + min_gpmc_clk_period = 15000; /* 66 MHz */ + t_ces = 6; + t_avds = 5; + t_avdh = 2; + t_ach = 6; + t_aavdh = 6; + t_rdyo = 11; + break; + default: + min_gpmc_clk_period = 18500; /* 54 MHz */ + t_ces = 7; + t_avds = 7; + t_avdh = 7; + t_ach = 9; + t_aavdh = 7; + t_rdyo = 15; + break; + } + + /* Set synchronous read timings */ + memset(&dev_t, 0, sizeof(dev_t)); + + if (!s->sync_write) { + dev_t.t_avdp_w = max(t_avdp, t_cer) * 1000; + dev_t.t_wpl = t_wpl * 1000; + dev_t.t_wph = t_wph * 1000; + dev_t.t_aavdh = t_aavdh * 1000; + } + dev_t.ce_xdelay = true; + dev_t.avd_xdelay = true; + dev_t.oe_xdelay = true; + dev_t.we_xdelay = true; + dev_t.clk = min_gpmc_clk_period; + dev_t.t_bacc = dev_t.clk; + dev_t.t_ces = t_ces * 1000; + dev_t.t_avds = t_avds * 1000; + dev_t.t_avdh = t_avdh * 1000; + dev_t.t_ach = t_ach * 1000; + dev_t.cyc_iaa = (latency + 1); + dev_t.t_cez_r = t_cez * 1000; + dev_t.t_cez_w = dev_t.t_cez_r; + dev_t.cyc_aavdh_oe = 1; + dev_t.t_rdyo = t_rdyo * 1000 + min_gpmc_clk_period; + + gpmc_calc_timings(t, s, &dev_t); +} + +int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, + int latency, + struct gpmc_onenand_info *info) +{ + int ret; + struct gpmc_timings gpmc_t; + struct gpmc_settings gpmc_s; + + gpmc_read_settings_dt(dev->of_node, &gpmc_s); + + info->sync_read = gpmc_s.sync_read; + info->sync_write = gpmc_s.sync_write; + info->burst_len = gpmc_s.burst_len; + + if (!gpmc_s.sync_read && !gpmc_s.sync_write) + return 0; + + gpmc_omap_onenand_calc_sync_timings(&gpmc_t, &gpmc_s, freq, latency); + + ret = gpmc_cs_program_settings(cs, &gpmc_s); + if (ret < 0) + return ret; + + return gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s); +} +EXPORT_SYMBOL_GPL(gpmc_omap_onenand_set_timings); + int gpmc_get_client_irq(unsigned irq_config) { if (!gpmc_irq_domain) { @@ -1916,41 +2021,6 @@ static void __maybe_unused gpmc_read_timings_dt(struct device_node *np, of_property_read_bool(np, "gpmc,time-para-granularity"); } -#if IS_ENABLED(CONFIG_MTD_ONENAND) -static int gpmc_probe_onenand_child(struct platform_device *pdev, - struct device_node *child) -{ - u32 val; - struct omap_onenand_platform_data *gpmc_onenand_data; - - if (of_property_read_u32(child, "reg", &val) < 0) { - dev_err(&pdev->dev, "%pOF has no 'reg' property\n", - child); - return -ENODEV; - } - - gpmc_onenand_data = devm_kzalloc(&pdev->dev, sizeof(*gpmc_onenand_data), - GFP_KERNEL); - if (!gpmc_onenand_data) - return -ENOMEM; - - gpmc_onenand_data->cs = val; - gpmc_onenand_data->of_node = child; - gpmc_onenand_data->dma_channel = -1; - - if (!of_property_read_u32(child, "dma-channel", &val)) - gpmc_onenand_data->dma_channel = val; - - return gpmc_onenand_init(gpmc_onenand_data); -} -#else -static int gpmc_probe_onenand_child(struct platform_device *pdev, - struct device_node *child) -{ - return 0; -} -#endif - /** * gpmc_probe_generic_child - configures the gpmc for a child device * @pdev: pointer to gpmc platform device @@ -2053,6 +2123,16 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, } } + if (of_node_cmp(child->name, "onenand") == 0) { + /* Warn about older DT blobs with no compatible property */ + if (!of_property_read_bool(child, "compatible")) { + dev_warn(&pdev->dev, + "Incompatible OneNAND node: missing compatible"); + ret = -EINVAL; + goto err; + } + } + if (of_device_is_compatible(child, "ti,omap2-nand")) { /* NAND specific setup */ val = 8; @@ -2189,11 +2269,7 @@ static void gpmc_probe_dt_children(struct platform_device *pdev) if (!child->name) continue; - if (of_node_cmp(child->name, "onenand") == 0) - ret = gpmc_probe_onenand_child(pdev, child); - else - ret = gpmc_probe_generic_child(pdev, child); - + ret = gpmc_probe_generic_child(pdev, child); if (ret) { dev_err(&pdev->dev, "failed to probe DT child '%s': %d\n", child->name, ret); diff --git a/include/linux/omap-gpmc.h b/include/linux/omap-gpmc.h index edfa280c3d56..053feb41510a 100644 --- a/include/linux/omap-gpmc.h +++ b/include/linux/omap-gpmc.h @@ -25,15 +25,43 @@ struct gpmc_nand_ops { struct gpmc_nand_regs; +struct gpmc_onenand_info { + bool sync_read; + bool sync_write; + int burst_len; +}; + #if IS_ENABLED(CONFIG_OMAP_GPMC) struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs, int cs); +/** + * gpmc_omap_onenand_set_timings - set optimized sync timings. + * @cs: Chip Select Region + * @freq: Chip frequency + * @latency: Burst latency cycle count + * @info: Structure describing parameters used + * + * Sets optimized timings for the @cs region based on @freq and @latency. + * Updates the @info structure based on the GPMC settings. + */ +int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, + int latency, + struct gpmc_onenand_info *info); + #else static inline struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs, int cs) { return NULL; } + +static inline +int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, + int latency, + struct gpmc_onenand_info *info) +{ + return -EINVAL; +} #endif /* CONFIG_OMAP_GPMC */ extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t, -- 2.11.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Ladislav Michl <ladis@linux-mips.org> To: linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org Cc: Roger Quadros <rogerq@ti.com>, Peter Ujfalusi <peter.ujfalusi@ti.com>, Boris Brezillon <boris.brezillon@free-electrons.com>, Kyungmin Park <kyungmin.park@samsung.com>, Aaro Koskinen <aaro.koskinen@iki.fi>, Tony Lindgren <tony@atomide.com> Subject: [PATCH v5 13/16] memory: omap-gpmc: Refactor OneNAND support Date: Wed, 15 Nov 2017 17:36:10 +0100 [thread overview] Message-ID: <20171115163610.n7gsbeoqukqovqm4@lenoch> (raw) In-Reply-To: <20171115162306.2o2w2yrf7wucroxd@lenoch> Use generic probe function to deal with OneNAND node and remove now useless gpmc_probe_onenand_child function. Import sync mode timing calculation function from mach-omap2/gpmc-onenand.c and prepare for MTD driver DTfication. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> --- Changes in v5: - make gpmc_omap_onenand_set_timings decsription more descriptive Changes in v4: None Changes in v3: None Changes in v2: - add gpmc_omap_onenand_set_timings description drivers/memory/omap-gpmc.c | 158 +++++++++++++++++++++++++++++++++------------ include/linux/omap-gpmc.h | 28 ++++++++ 2 files changed, 145 insertions(+), 41 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index 0e30ee1c8677..90a66b3f7ae1 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -32,7 +32,6 @@ #include <linux/pm_runtime.h> #include <linux/platform_data/mtd-nand-omap2.h> -#include <linux/platform_data/mtd-onenand-omap2.h> #include <asm/mach-types.h> @@ -1138,6 +1137,112 @@ struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *reg, int cs) } EXPORT_SYMBOL_GPL(gpmc_omap_get_nand_ops); +static void gpmc_omap_onenand_calc_sync_timings(struct gpmc_timings *t, + struct gpmc_settings *s, + int freq, int latency) +{ + struct gpmc_device_timings dev_t; + const int t_cer = 15; + const int t_avdp = 12; + const int t_cez = 20; /* max of t_cez, t_oez */ + const int t_wpl = 40; + const int t_wph = 30; + int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo; + + switch (freq) { + case 104: + min_gpmc_clk_period = 9600; /* 104 MHz */ + t_ces = 3; + t_avds = 4; + t_avdh = 2; + t_ach = 3; + t_aavdh = 6; + t_rdyo = 6; + break; + case 83: + min_gpmc_clk_period = 12000; /* 83 MHz */ + t_ces = 5; + t_avds = 4; + t_avdh = 2; + t_ach = 6; + t_aavdh = 6; + t_rdyo = 9; + break; + case 66: + min_gpmc_clk_period = 15000; /* 66 MHz */ + t_ces = 6; + t_avds = 5; + t_avdh = 2; + t_ach = 6; + t_aavdh = 6; + t_rdyo = 11; + break; + default: + min_gpmc_clk_period = 18500; /* 54 MHz */ + t_ces = 7; + t_avds = 7; + t_avdh = 7; + t_ach = 9; + t_aavdh = 7; + t_rdyo = 15; + break; + } + + /* Set synchronous read timings */ + memset(&dev_t, 0, sizeof(dev_t)); + + if (!s->sync_write) { + dev_t.t_avdp_w = max(t_avdp, t_cer) * 1000; + dev_t.t_wpl = t_wpl * 1000; + dev_t.t_wph = t_wph * 1000; + dev_t.t_aavdh = t_aavdh * 1000; + } + dev_t.ce_xdelay = true; + dev_t.avd_xdelay = true; + dev_t.oe_xdelay = true; + dev_t.we_xdelay = true; + dev_t.clk = min_gpmc_clk_period; + dev_t.t_bacc = dev_t.clk; + dev_t.t_ces = t_ces * 1000; + dev_t.t_avds = t_avds * 1000; + dev_t.t_avdh = t_avdh * 1000; + dev_t.t_ach = t_ach * 1000; + dev_t.cyc_iaa = (latency + 1); + dev_t.t_cez_r = t_cez * 1000; + dev_t.t_cez_w = dev_t.t_cez_r; + dev_t.cyc_aavdh_oe = 1; + dev_t.t_rdyo = t_rdyo * 1000 + min_gpmc_clk_period; + + gpmc_calc_timings(t, s, &dev_t); +} + +int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, + int latency, + struct gpmc_onenand_info *info) +{ + int ret; + struct gpmc_timings gpmc_t; + struct gpmc_settings gpmc_s; + + gpmc_read_settings_dt(dev->of_node, &gpmc_s); + + info->sync_read = gpmc_s.sync_read; + info->sync_write = gpmc_s.sync_write; + info->burst_len = gpmc_s.burst_len; + + if (!gpmc_s.sync_read && !gpmc_s.sync_write) + return 0; + + gpmc_omap_onenand_calc_sync_timings(&gpmc_t, &gpmc_s, freq, latency); + + ret = gpmc_cs_program_settings(cs, &gpmc_s); + if (ret < 0) + return ret; + + return gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s); +} +EXPORT_SYMBOL_GPL(gpmc_omap_onenand_set_timings); + int gpmc_get_client_irq(unsigned irq_config) { if (!gpmc_irq_domain) { @@ -1916,41 +2021,6 @@ static void __maybe_unused gpmc_read_timings_dt(struct device_node *np, of_property_read_bool(np, "gpmc,time-para-granularity"); } -#if IS_ENABLED(CONFIG_MTD_ONENAND) -static int gpmc_probe_onenand_child(struct platform_device *pdev, - struct device_node *child) -{ - u32 val; - struct omap_onenand_platform_data *gpmc_onenand_data; - - if (of_property_read_u32(child, "reg", &val) < 0) { - dev_err(&pdev->dev, "%pOF has no 'reg' property\n", - child); - return -ENODEV; - } - - gpmc_onenand_data = devm_kzalloc(&pdev->dev, sizeof(*gpmc_onenand_data), - GFP_KERNEL); - if (!gpmc_onenand_data) - return -ENOMEM; - - gpmc_onenand_data->cs = val; - gpmc_onenand_data->of_node = child; - gpmc_onenand_data->dma_channel = -1; - - if (!of_property_read_u32(child, "dma-channel", &val)) - gpmc_onenand_data->dma_channel = val; - - return gpmc_onenand_init(gpmc_onenand_data); -} -#else -static int gpmc_probe_onenand_child(struct platform_device *pdev, - struct device_node *child) -{ - return 0; -} -#endif - /** * gpmc_probe_generic_child - configures the gpmc for a child device * @pdev: pointer to gpmc platform device @@ -2053,6 +2123,16 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, } } + if (of_node_cmp(child->name, "onenand") == 0) { + /* Warn about older DT blobs with no compatible property */ + if (!of_property_read_bool(child, "compatible")) { + dev_warn(&pdev->dev, + "Incompatible OneNAND node: missing compatible"); + ret = -EINVAL; + goto err; + } + } + if (of_device_is_compatible(child, "ti,omap2-nand")) { /* NAND specific setup */ val = 8; @@ -2189,11 +2269,7 @@ static void gpmc_probe_dt_children(struct platform_device *pdev) if (!child->name) continue; - if (of_node_cmp(child->name, "onenand") == 0) - ret = gpmc_probe_onenand_child(pdev, child); - else - ret = gpmc_probe_generic_child(pdev, child); - + ret = gpmc_probe_generic_child(pdev, child); if (ret) { dev_err(&pdev->dev, "failed to probe DT child '%s': %d\n", child->name, ret); diff --git a/include/linux/omap-gpmc.h b/include/linux/omap-gpmc.h index edfa280c3d56..053feb41510a 100644 --- a/include/linux/omap-gpmc.h +++ b/include/linux/omap-gpmc.h @@ -25,15 +25,43 @@ struct gpmc_nand_ops { struct gpmc_nand_regs; +struct gpmc_onenand_info { + bool sync_read; + bool sync_write; + int burst_len; +}; + #if IS_ENABLED(CONFIG_OMAP_GPMC) struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs, int cs); +/** + * gpmc_omap_onenand_set_timings - set optimized sync timings. + * @cs: Chip Select Region + * @freq: Chip frequency + * @latency: Burst latency cycle count + * @info: Structure describing parameters used + * + * Sets optimized timings for the @cs region based on @freq and @latency. + * Updates the @info structure based on the GPMC settings. + */ +int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, + int latency, + struct gpmc_onenand_info *info); + #else static inline struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs, int cs) { return NULL; } + +static inline +int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, + int latency, + struct gpmc_onenand_info *info) +{ + return -EINVAL; +} #endif /* CONFIG_OMAP_GPMC */ extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t, -- 2.11.0
next prev parent reply other threads:[~2017-11-15 16:36 UTC|newest] Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-11-15 16:23 [PATCH v5 00/16] OMAP2+ OneNAND driver update Ladislav Michl 2017-11-15 16:23 ` Ladislav Michl 2017-11-15 16:24 ` [PATCH v5 01/16] dt-bindings: mtd: gpmc-onenand: Update properties description Ladislav Michl 2017-11-15 16:24 ` Ladislav Michl 2017-11-30 10:25 ` Boris Brezillon 2017-11-30 10:25 ` Boris Brezillon 2017-11-30 13:09 ` Ladislav Michl 2017-11-30 13:09 ` Ladislav Michl 2017-12-15 10:18 ` Roger Quadros 2017-12-15 10:18 ` Roger Quadros [not found] ` <23d7ad3c-e6cd-3ba6-269a-1788371d13c3-l0cyMroinI0@public.gmane.org> 2017-12-15 12:24 ` Ladislav Michl 2017-12-15 12:24 ` Ladislav Michl 2017-11-15 16:26 ` [PATCH v5 02/16] ARM: dts: OMAP2+: Add compatible property to onenand node Ladislav Michl 2017-11-15 16:26 ` Ladislav Michl 2017-11-15 16:26 ` [PATCH v5 03/16] ARM: dts: omap3-igep: Update onenand node timings Ladislav Michl 2017-11-15 16:26 ` Ladislav Michl 2017-11-15 16:27 ` [PATCH v5 04/16] mtd: onenand: omap2: Remove regulator support Ladislav Michl 2017-11-15 16:27 ` Ladislav Michl 2017-11-15 16:28 ` [PATCH v5 05/16] mtd: onenand: omap2: Remove skip initial unlocking support Ladislav Michl 2017-11-15 16:28 ` Ladislav Michl 2017-11-15 16:29 ` [PATCH v5 06/16] mtd: onenand: omap2: Remove partitioning support from platform data Ladislav Michl 2017-11-15 16:29 ` Ladislav Michl 2017-11-15 16:30 ` [PATCH v5 07/16] mtd: onenand: omap2: Account waiting time as waiting on IO Ladislav Michl 2017-11-15 16:30 ` Ladislav Michl 2017-11-15 16:31 ` [PATCH v5 08/16] mtd: onenand: omap2: Simplify the DMA setup for various paths Ladislav Michl 2017-11-15 16:31 ` Ladislav Michl 2017-11-15 16:32 ` [PATCH v5 09/16] mtd: onenand: omap2: Unify OMAP2 and OMAP3 DMA implementation Ladislav Michl 2017-11-15 16:32 ` Ladislav Michl 2017-11-15 16:33 ` [PATCH v5 10/16] mtd: onenand: omap2: Convert to use dmaengine for memcpy Ladislav Michl 2017-11-15 16:33 ` Ladislav Michl 2017-11-15 16:34 ` [PATCH v5 11/16] mtd: onenand: omap2: Do not make delay for GPIO OMAP3 specific Ladislav Michl 2017-11-15 16:34 ` Ladislav Michl 2017-11-15 16:35 ` [PATCH v5 12/16] mtd: onenand: omap2: Decouple DMA enabling from INT pin availability Ladislav Michl 2017-11-15 16:35 ` Ladislav Michl 2017-11-15 16:36 ` Ladislav Michl [this message] 2017-11-15 16:36 ` [PATCH v5 13/16] memory: omap-gpmc: Refactor OneNAND support Ladislav Michl 2017-11-15 16:37 ` [PATCH v5 14/16] mtd: onenand: omap2: Configure driver from DT Ladislav Michl 2017-11-15 16:37 ` Ladislav Michl 2017-11-15 16:38 ` [PATCH v5 15/16] ARM: OMAP2+: Remove gpmc-onenand Ladislav Michl 2017-11-15 16:38 ` Ladislav Michl 2017-11-15 16:38 ` [PATCH v5 16/16] ARM: dts: Nokia: Use OneNAND INT pin Ladislav Michl 2017-11-15 16:38 ` Ladislav Michl 2017-11-30 10:18 ` [PATCH v5 00/16] OMAP2+ OneNAND driver update Boris Brezillon 2017-11-30 10:18 ` Boris Brezillon 2017-11-30 13:13 ` Ladislav Michl 2017-11-30 13:13 ` Ladislav Michl 2017-11-30 16:09 ` Tony Lindgren 2017-11-30 16:09 ` Tony Lindgren 2017-12-01 13:43 ` Roger Quadros 2017-12-01 13:43 ` Roger Quadros 2018-01-09 13:08 ` Ladislav Michl 2018-01-09 13:08 ` Ladislav Michl 2018-01-09 21:01 ` Aaro Koskinen 2018-01-09 21:01 ` Aaro Koskinen 2018-01-10 9:20 ` Ladislav Michl 2018-01-10 9:20 ` Ladislav Michl 2018-01-10 17:35 ` Aaro Koskinen 2018-01-10 17:35 ` Aaro Koskinen [not found] ` <20180110173519.xyug4egltni4f3qi-4/PLUo9XfK9owWHViPbQSXlKr5M7+etX9Sl0XMgJPXI@public.gmane.org> 2018-01-10 21:13 ` Ladislav Michl 2018-01-10 21:13 ` Ladislav Michl 2018-01-11 19:29 ` Aaro Koskinen 2018-01-11 19:29 ` Aaro Koskinen [not found] ` <20180111192931.vwnpvj2wtgrvkhbe-4/PLUo9XfK9owWHViPbQSXlKr5M7+etX9Sl0XMgJPXI@public.gmane.org> 2018-01-11 19:38 ` Ladislav Michl 2018-01-11 19:38 ` Ladislav Michl 2018-01-10 21:27 ` Aaro Koskinen 2018-01-10 21:27 ` Aaro Koskinen 2018-01-11 8:08 ` Roger Quadros 2018-01-11 8:08 ` Roger Quadros
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