From: Miquel Raynal <miquel.raynal@free-electrons.com> To: Zhang Rui <rui.zhang@intel.com>, Eduardo Valentin <edubezval@gmail.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>, Gregory Clement <gregory.clement@free-electrons.com>, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will.deacon@arm.com> Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Petazzoni <thomas.petazzoni@free-electrons.com>, Antoine Tenart <antoine.tenart@free-electrons.com>, Nadav Haklai <nadavh@marvell.com>, Miquel Raynal <miquel.raynal@free-electrons.com>, Baruch Siach <baruch@tkos.co.il>, David Sniatkiwicz <davidsn@marvell.com> Subject: [PATCH v4 01/12] dt-bindings: thermal: Describe Armada AP806 and CP110 Date: Mon, 18 Dec 2017 15:36:32 +0100 [thread overview] Message-ID: <20171218143643.7714-2-miquel.raynal@free-electrons.com> (raw) In-Reply-To: <20171218143643.7714-1-miquel.raynal@free-electrons.com> From: Baruch Siach <baruch@tkos.co.il> Add compatible strings for AP806 and CP110 that are part of the Armada 8k/7k line of SoCs. Add a note on the differences in the size of the control area in different bindings. This is an existing difference between the Armada 375 binding and the other boards already supported. The new AP806 and CP110 bindings are similar to the existing Armada 375 in this regard. Signed-off-by: Baruch Siach <baruch@tkos.co.il> [<miquel.raynal@free-electrons.com>: reword, additional details] Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> --- .../devicetree/bindings/thermal/armada-thermal.txt | 24 +++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/armada-thermal.txt b/Documentation/devicetree/bindings/thermal/armada-thermal.txt index 24aacf8948c5..9b7b2c03cc6f 100644 --- a/Documentation/devicetree/bindings/thermal/armada-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/armada-thermal.txt @@ -7,17 +7,31 @@ Required properties: marvell,armada375-thermal marvell,armada380-thermal marvell,armadaxp-thermal + marvell,armada-ap806-thermal + marvell,armada-cp110-thermal - reg: Device's register space. Two entries are expected, see the examples below. - The first one is required for the sensor register; - the second one is required for the control register - to be used for sensor initialization (a.k.a. calibration). + The first one points to the status register (4B). + The second one points to the control registers (8B). + Note: with legacy bindings, the second entry pointed + only to the so called "control MSB" ("control 1"), was + 4B wide and did not let the possibility to reach the + "control LSB" ("control 0") register. This is only + allowed for compatibility reasons in Armada + 370/375/38x/XP DT nodes. -Example: +Examples: + /* Legacy bindings */ thermal@d0018300 { compatible = "marvell,armada370-thermal"; - reg = <0xd0018300 0x4 + reg = <0xd0018300 0x4 0xd0018304 0x4>; }; + + ap_thermal: thermal@6f8084 { + compatible = "marvell,armada-ap806-thermal"; + reg = <0x6f808C 0x4>, + <0x6f8084 0x8>; + }; -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: miquel.raynal@free-electrons.com (Miquel Raynal) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 01/12] dt-bindings: thermal: Describe Armada AP806 and CP110 Date: Mon, 18 Dec 2017 15:36:32 +0100 [thread overview] Message-ID: <20171218143643.7714-2-miquel.raynal@free-electrons.com> (raw) In-Reply-To: <20171218143643.7714-1-miquel.raynal@free-electrons.com> From: Baruch Siach <baruch@tkos.co.il> Add compatible strings for AP806 and CP110 that are part of the Armada 8k/7k line of SoCs. Add a note on the differences in the size of the control area in different bindings. This is an existing difference between the Armada 375 binding and the other boards already supported. The new AP806 and CP110 bindings are similar to the existing Armada 375 in this regard. Signed-off-by: Baruch Siach <baruch@tkos.co.il> [<miquel.raynal@free-electrons.com>: reword, additional details] Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> --- .../devicetree/bindings/thermal/armada-thermal.txt | 24 +++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/armada-thermal.txt b/Documentation/devicetree/bindings/thermal/armada-thermal.txt index 24aacf8948c5..9b7b2c03cc6f 100644 --- a/Documentation/devicetree/bindings/thermal/armada-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/armada-thermal.txt @@ -7,17 +7,31 @@ Required properties: marvell,armada375-thermal marvell,armada380-thermal marvell,armadaxp-thermal + marvell,armada-ap806-thermal + marvell,armada-cp110-thermal - reg: Device's register space. Two entries are expected, see the examples below. - The first one is required for the sensor register; - the second one is required for the control register - to be used for sensor initialization (a.k.a. calibration). + The first one points to the status register (4B). + The second one points to the control registers (8B). + Note: with legacy bindings, the second entry pointed + only to the so called "control MSB" ("control 1"), was + 4B wide and did not let the possibility to reach the + "control LSB" ("control 0") register. This is only + allowed for compatibility reasons in Armada + 370/375/38x/XP DT nodes. -Example: +Examples: + /* Legacy bindings */ thermal at d0018300 { compatible = "marvell,armada370-thermal"; - reg = <0xd0018300 0x4 + reg = <0xd0018300 0x4 0xd0018304 0x4>; }; + + ap_thermal: thermal at 6f8084 { + compatible = "marvell,armada-ap806-thermal"; + reg = <0x6f808C 0x4>, + <0x6f8084 0x8>; + }; -- 2.11.0
next prev parent reply other threads:[~2017-12-18 14:36 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-12-18 14:36 [PATCH v4 00/12] Armada thermal: improvements and A7K/A8K SoCs support Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [this message] 2017-12-18 14:36 ` [PATCH v4 01/12] dt-bindings: thermal: Describe Armada AP806 and CP110 Miquel Raynal [not found] ` <20171218143643.7714-2-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 20:33 ` Baruch Siach 2017-12-18 20:33 ` Baruch Siach 2017-12-19 0:43 ` Miquel RAYNAL 2017-12-19 0:43 ` Miquel RAYNAL 2017-12-19 6:09 ` Baruch Siach 2017-12-19 6:09 ` Baruch Siach [not found] ` <20171219060918.nr4ojwpmqf6ju6od-MwjkAAnuF3khR1HGirfZ1z4kX+cae0hd@public.gmane.org> 2017-12-19 7:44 ` Miquel RAYNAL 2017-12-19 7:44 ` Miquel RAYNAL 2017-12-18 14:36 ` [PATCH v4 02/12] thermal: armada: Use msleep for long delays Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 14:36 ` [PATCH v4 04/12] thermal: armada: Clarify control registers accesses Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-5-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 20:35 ` Baruch Siach 2017-12-18 20:35 ` Baruch Siach 2017-12-19 0:32 ` Miquel RAYNAL 2017-12-19 0:32 ` Miquel RAYNAL 2017-12-19 5:51 ` Baruch Siach 2017-12-19 5:51 ` Baruch Siach [not found] ` <20171219055154.f23leaob3zndmmqo-MwjkAAnuF3khR1HGirfZ1z4kX+cae0hd@public.gmane.org> 2017-12-19 8:08 ` Miquel RAYNAL 2017-12-19 8:08 ` Miquel RAYNAL 2017-12-19 8:19 ` Baruch Siach 2017-12-19 8:19 ` Baruch Siach 2017-12-19 8:23 ` Miquel RAYNAL 2017-12-19 8:23 ` Miquel RAYNAL [not found] ` <20171218143643.7714-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 14:36 ` [PATCH v4 03/12] thermal: armada: Simplify the check of the validity bit Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 14:36 ` [PATCH v4 05/12] thermal: armada: Use real status register name Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-6-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 15:58 ` Gregory CLEMENT 2017-12-18 15:58 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 06/12] thermal: armada: Add support for Armada AP806 Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-7-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 16:05 ` Gregory CLEMENT 2017-12-18 16:05 ` Gregory CLEMENT [not found] ` <87y3m0hvik.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-19 0:27 ` Miquel RAYNAL 2017-12-19 0:27 ` Miquel RAYNAL 2017-12-18 14:36 ` [PATCH v4 07/12] thermal: armada: Add support for Armada CP110 Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-8-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 16:07 ` Gregory CLEMENT 2017-12-18 16:07 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 08/12] thermal: armada: Update Kconfig and module description Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-9-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 16:07 ` Gregory CLEMENT 2017-12-18 16:07 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 10/12] thermal: armada: Wait sensors validity before exiting the init callback Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 16:12 ` Gregory CLEMENT 2017-12-18 16:12 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 11/12] thermal: armada: Give meaningful names to the thermal zones Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 16:12 ` Gregory CLEMENT 2017-12-18 16:12 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 12/12] ARM64: dts: marvell: Add thermal support for A7K/A8K Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 16:13 ` Gregory CLEMENT 2017-12-18 16:13 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 09/12] thermal: armada: Change sensors trim default value Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-10-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 16:08 ` Gregory CLEMENT 2017-12-18 16:08 ` Gregory CLEMENT
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