From: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> To: Zhang Rui <rui.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>, Eduardo Valentin <edubezval-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>, Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>, Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>, Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>, Gregory Clement <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>, Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>, Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> Cc: linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Thomas Petazzoni <thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>, Antoine Tenart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>, Nadav Haklai <nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>, Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>, Baruch Siach <baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org>, David Sniatkiwicz <davidsn-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org> Subject: [PATCH v4 03/12] thermal: armada: Simplify the check of the validity bit Date: Mon, 18 Dec 2017 15:36:34 +0100 [thread overview] Message-ID: <20171218143643.7714-4-miquel.raynal@free-electrons.com> (raw) In-Reply-To: <20171218143643.7714-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> All Armada SoCs use one bit to declare if the sensor values are valid. This bit moves across the versions of the IP. The method until then was to do both a shift and compare with an useless flag of "0x1". It is clearer and quicker to directly save the value that must be ANDed instead of the bit position and do a single bitwise AND operation. Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> Reviewed-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> --- drivers/thermal/armada_thermal.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/thermal/armada_thermal.c b/drivers/thermal/armada_thermal.c index 6c4af2622d4f..f350d7efd35a 100644 --- a/drivers/thermal/armada_thermal.c +++ b/drivers/thermal/armada_thermal.c @@ -24,8 +24,6 @@ #include <linux/of_device.h> #include <linux/thermal.h> -#define THERMAL_VALID_MASK 0x1 - /* Thermal Manager Control and Status Register */ #define PMU_TDC0_SW_RST_MASK (0x1 << 1) #define PMU_TM_DISABLE_OFFS 0 @@ -67,7 +65,7 @@ struct armada_thermal_data { /* Register shift and mask to access the sensor temperature */ unsigned int temp_shift; unsigned int temp_mask; - unsigned int is_valid_shift; + u32 is_valid_bit; }; static void armadaxp_init_sensor(struct platform_device *pdev, @@ -149,9 +147,9 @@ static void armada380_init_sensor(struct platform_device *pdev, static bool armada_is_valid(struct armada_thermal_priv *priv) { - unsigned long reg = readl_relaxed(priv->sensor); + u32 reg = readl_relaxed(priv->sensor); - return (reg >> priv->data->is_valid_shift) & THERMAL_VALID_MASK; + return reg & priv->data->is_valid_bit; } static int armada_get_temp(struct thermal_zone_device *thermal, @@ -199,7 +197,7 @@ static const struct armada_thermal_data armadaxp_data = { static const struct armada_thermal_data armada370_data = { .is_valid = armada_is_valid, .init_sensor = armada370_init_sensor, - .is_valid_shift = 9, + .is_valid_bit = BIT(9), .temp_shift = 10, .temp_mask = 0x1ff, .coef_b = 3153000000UL, @@ -210,7 +208,7 @@ static const struct armada_thermal_data armada370_data = { static const struct armada_thermal_data armada375_data = { .is_valid = armada_is_valid, .init_sensor = armada375_init_sensor, - .is_valid_shift = 10, + .is_valid_bit = BIT(10), .temp_shift = 0, .temp_mask = 0x1ff, .coef_b = 3171900000UL, @@ -221,7 +219,7 @@ static const struct armada_thermal_data armada375_data = { static const struct armada_thermal_data armada380_data = { .is_valid = armada_is_valid, .init_sensor = armada380_init_sensor, - .is_valid_shift = 10, + .is_valid_bit = BIT(10), .temp_shift = 0, .temp_mask = 0x3ff, .coef_b = 1172499100UL, -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: miquel.raynal@free-electrons.com (Miquel Raynal) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 03/12] thermal: armada: Simplify the check of the validity bit Date: Mon, 18 Dec 2017 15:36:34 +0100 [thread overview] Message-ID: <20171218143643.7714-4-miquel.raynal@free-electrons.com> (raw) In-Reply-To: <20171218143643.7714-1-miquel.raynal@free-electrons.com> All Armada SoCs use one bit to declare if the sensor values are valid. This bit moves across the versions of the IP. The method until then was to do both a shift and compare with an useless flag of "0x1". It is clearer and quicker to directly save the value that must be ANDed instead of the bit position and do a single bitwise AND operation. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> --- drivers/thermal/armada_thermal.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/thermal/armada_thermal.c b/drivers/thermal/armada_thermal.c index 6c4af2622d4f..f350d7efd35a 100644 --- a/drivers/thermal/armada_thermal.c +++ b/drivers/thermal/armada_thermal.c @@ -24,8 +24,6 @@ #include <linux/of_device.h> #include <linux/thermal.h> -#define THERMAL_VALID_MASK 0x1 - /* Thermal Manager Control and Status Register */ #define PMU_TDC0_SW_RST_MASK (0x1 << 1) #define PMU_TM_DISABLE_OFFS 0 @@ -67,7 +65,7 @@ struct armada_thermal_data { /* Register shift and mask to access the sensor temperature */ unsigned int temp_shift; unsigned int temp_mask; - unsigned int is_valid_shift; + u32 is_valid_bit; }; static void armadaxp_init_sensor(struct platform_device *pdev, @@ -149,9 +147,9 @@ static void armada380_init_sensor(struct platform_device *pdev, static bool armada_is_valid(struct armada_thermal_priv *priv) { - unsigned long reg = readl_relaxed(priv->sensor); + u32 reg = readl_relaxed(priv->sensor); - return (reg >> priv->data->is_valid_shift) & THERMAL_VALID_MASK; + return reg & priv->data->is_valid_bit; } static int armada_get_temp(struct thermal_zone_device *thermal, @@ -199,7 +197,7 @@ static const struct armada_thermal_data armadaxp_data = { static const struct armada_thermal_data armada370_data = { .is_valid = armada_is_valid, .init_sensor = armada370_init_sensor, - .is_valid_shift = 9, + .is_valid_bit = BIT(9), .temp_shift = 10, .temp_mask = 0x1ff, .coef_b = 3153000000UL, @@ -210,7 +208,7 @@ static const struct armada_thermal_data armada370_data = { static const struct armada_thermal_data armada375_data = { .is_valid = armada_is_valid, .init_sensor = armada375_init_sensor, - .is_valid_shift = 10, + .is_valid_bit = BIT(10), .temp_shift = 0, .temp_mask = 0x1ff, .coef_b = 3171900000UL, @@ -221,7 +219,7 @@ static const struct armada_thermal_data armada375_data = { static const struct armada_thermal_data armada380_data = { .is_valid = armada_is_valid, .init_sensor = armada380_init_sensor, - .is_valid_shift = 10, + .is_valid_bit = BIT(10), .temp_shift = 0, .temp_mask = 0x3ff, .coef_b = 1172499100UL, -- 2.11.0
next prev parent reply other threads:[~2017-12-18 14:36 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-12-18 14:36 [PATCH v4 00/12] Armada thermal: improvements and A7K/A8K SoCs support Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 14:36 ` [PATCH v4 01/12] dt-bindings: thermal: Describe Armada AP806 and CP110 Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-2-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 20:33 ` Baruch Siach 2017-12-18 20:33 ` Baruch Siach 2017-12-19 0:43 ` Miquel RAYNAL 2017-12-19 0:43 ` Miquel RAYNAL 2017-12-19 6:09 ` Baruch Siach 2017-12-19 6:09 ` Baruch Siach [not found] ` <20171219060918.nr4ojwpmqf6ju6od-MwjkAAnuF3khR1HGirfZ1z4kX+cae0hd@public.gmane.org> 2017-12-19 7:44 ` Miquel RAYNAL 2017-12-19 7:44 ` Miquel RAYNAL 2017-12-18 14:36 ` [PATCH v4 02/12] thermal: armada: Use msleep for long delays Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 14:36 ` [PATCH v4 04/12] thermal: armada: Clarify control registers accesses Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-5-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 20:35 ` Baruch Siach 2017-12-18 20:35 ` Baruch Siach 2017-12-19 0:32 ` Miquel RAYNAL 2017-12-19 0:32 ` Miquel RAYNAL 2017-12-19 5:51 ` Baruch Siach 2017-12-19 5:51 ` Baruch Siach [not found] ` <20171219055154.f23leaob3zndmmqo-MwjkAAnuF3khR1HGirfZ1z4kX+cae0hd@public.gmane.org> 2017-12-19 8:08 ` Miquel RAYNAL 2017-12-19 8:08 ` Miquel RAYNAL 2017-12-19 8:19 ` Baruch Siach 2017-12-19 8:19 ` Baruch Siach 2017-12-19 8:23 ` Miquel RAYNAL 2017-12-19 8:23 ` Miquel RAYNAL [not found] ` <20171218143643.7714-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 14:36 ` Miquel Raynal [this message] 2017-12-18 14:36 ` [PATCH v4 03/12] thermal: armada: Simplify the check of the validity bit Miquel Raynal 2017-12-18 14:36 ` [PATCH v4 05/12] thermal: armada: Use real status register name Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-6-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 15:58 ` Gregory CLEMENT 2017-12-18 15:58 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 06/12] thermal: armada: Add support for Armada AP806 Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-7-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 16:05 ` Gregory CLEMENT 2017-12-18 16:05 ` Gregory CLEMENT [not found] ` <87y3m0hvik.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-19 0:27 ` Miquel RAYNAL 2017-12-19 0:27 ` Miquel RAYNAL 2017-12-18 14:36 ` [PATCH v4 07/12] thermal: armada: Add support for Armada CP110 Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-8-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 16:07 ` Gregory CLEMENT 2017-12-18 16:07 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 08/12] thermal: armada: Update Kconfig and module description Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-9-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 16:07 ` Gregory CLEMENT 2017-12-18 16:07 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 10/12] thermal: armada: Wait sensors validity before exiting the init callback Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 16:12 ` Gregory CLEMENT 2017-12-18 16:12 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 11/12] thermal: armada: Give meaningful names to the thermal zones Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 16:12 ` Gregory CLEMENT 2017-12-18 16:12 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 12/12] ARM64: dts: marvell: Add thermal support for A7K/A8K Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal 2017-12-18 16:13 ` Gregory CLEMENT 2017-12-18 16:13 ` Gregory CLEMENT 2017-12-18 14:36 ` [PATCH v4 09/12] thermal: armada: Change sensors trim default value Miquel Raynal 2017-12-18 14:36 ` Miquel Raynal [not found] ` <20171218143643.7714-10-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> 2017-12-18 16:08 ` Gregory CLEMENT 2017-12-18 16:08 ` Gregory CLEMENT
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20171218143643.7714-4-miquel.raynal@free-electrons.com \ --to=miquel.raynal-wi1+55scjutkeb57/3fjtnbpr1lh4cv8@public.gmane.org \ --cc=andrew-g2DYL2Zd6BY@public.gmane.org \ --cc=antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org \ --cc=baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org \ --cc=catalin.marinas-5wv7dgnIgG8@public.gmane.org \ --cc=davidsn-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org \ --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=edubezval-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \ --cc=gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org \ --cc=jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org \ --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \ --cc=linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=mark.rutland-5wv7dgnIgG8@public.gmane.org \ --cc=nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org \ --cc=robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \ --cc=rui.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org \ --cc=sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \ --cc=thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org \ --cc=will.deacon-5wv7dgnIgG8@public.gmane.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.