* [PATCH 1/8] drm/i915/cnl: Add Port F definition.
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
@ 2018-01-11 18:00 ` Paulo Zanoni
2018-01-11 19:37 ` Rodrigo Vivi
2018-01-11 18:00 ` [PATCH 2/8] drm/i915/icl: Add initial Icelake definitions Paulo Zanoni
` (11 subsequent siblings)
12 siblings, 1 reply; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-11 18:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi, Paulo Zanoni, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Some Cannonlake SKUs will come with a full split between
port A and port E. This will be called port F although it
is not a 6th port, but only a split.
Note this patch alone is not sufficient for port F enabling,
it's just the first step.
v2: Fix size of dvo_ports found by Ander.
v3: Adding missing cases from intel_bios.c for Port_F
v4: Adding other missing cases and fix the commit message.
v5: Rebase on top of display headers rework.
v6 (from Paulo): improve commit message, bikeshed bit definitions.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 9 +++++++++
drivers/gpu/drm/i915/intel_display.h | 1 +
drivers/gpu/drm/i915/intel_dp.c | 2 ++
drivers/gpu/drm/i915/intel_vbt_defs.h | 2 ++
include/drm/i915_component.h | 3 +--
5 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 51108ffc28d1..59a150e2adce 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1140,6 +1140,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
{DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
{DVO_PORT_HDMID, DVO_PORT_DPD, -1},
{DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
+ {DVO_PORT_HDMIF, DVO_PORT_DPF, -1},
};
/*
@@ -1688,6 +1689,7 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
+ [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
};
int i;
@@ -1726,6 +1728,7 @@ bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
[PORT_C] = DVO_PORT_DPC,
[PORT_D] = DVO_PORT_DPD,
[PORT_E] = DVO_PORT_DPE,
+ [PORT_F] = DVO_PORT_DPF,
};
int i;
@@ -1761,6 +1764,7 @@ static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
+ [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
};
if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
@@ -1927,6 +1931,11 @@ intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
if (port == PORT_D)
return true;
break;
+ case DVO_PORT_DPF:
+ case DVO_PORT_HDMIF:
+ if (port == PORT_F)
+ return true;
+ break;
default:
break;
}
diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
index a0d2b6169361..e47638931b51 100644
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -119,6 +119,7 @@ enum port {
PORT_C,
PORT_D,
PORT_E,
+ PORT_F,
I915_MAX_PORTS
};
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 68229f53d5b8..46937a8c48cc 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1402,6 +1402,7 @@ static i915_reg_t skl_aux_ctl_reg(struct drm_i915_private *dev_priv,
case PORT_B:
case PORT_C:
case PORT_D:
+ case PORT_F:
return DP_AUX_CH_CTL(port);
default:
MISSING_CASE(port);
@@ -1417,6 +1418,7 @@ static i915_reg_t skl_aux_data_reg(struct drm_i915_private *dev_priv,
case PORT_B:
case PORT_C:
case PORT_D:
+ case PORT_F:
return DP_AUX_CH_DATA(port, index);
default:
MISSING_CASE(port);
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index e3d7745a9151..b5d2341f932c 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -299,6 +299,8 @@ struct bdb_general_features {
#define DVO_PORT_DPA 10
#define DVO_PORT_DPE 11 /* 193 */
#define DVO_PORT_HDMIE 12 /* 193 */
+#define DVO_PORT_DPF 13 /* N/A */
+#define DVO_PORT_HDMIF 14 /* N/A */
#define DVO_PORT_MIPIA 21 /* 171 */
#define DVO_PORT_MIPIB 22 /* 171 */
#define DVO_PORT_MIPIC 23 /* 171 */
diff --git a/include/drm/i915_component.h b/include/drm/i915_component.h
index 545c6e0fea7d..346b1f5cb180 100644
--- a/include/drm/i915_component.h
+++ b/include/drm/i915_component.h
@@ -26,9 +26,8 @@
/* MAX_PORT is the number of port
* It must be sync with I915_MAX_PORTS defined i915_drv.h
- * 5 should be enough as only HSW, BDW, SKL need such fix.
*/
-#define MAX_PORTS 5
+#define MAX_PORTS 6
/**
* struct i915_audio_component_ops - Ops implemented by i915 driver, called by hda driver
--
2.14.3
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^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 1/8] drm/i915/cnl: Add Port F definition.
2018-01-11 18:00 ` [PATCH 1/8] drm/i915/cnl: Add Port F definition Paulo Zanoni
@ 2018-01-11 19:37 ` Rodrigo Vivi
0 siblings, 0 replies; 26+ messages in thread
From: Rodrigo Vivi @ 2018-01-11 19:37 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: intel-gfx, Lucas De Marchi
On Thu, Jan 11, 2018 at 06:00:03PM +0000, Paulo Zanoni wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Some Cannonlake SKUs will come with a full split between
> port A and port E. This will be called port F although it
> is not a 6th port, but only a split.
>
> Note this patch alone is not sufficient for port F enabling,
> it's just the first step.
>
> v2: Fix size of dvo_ports found by Ander.
> v3: Adding missing cases from intel_bios.c for Port_F
> v4: Adding other missing cases and fix the commit message.
> v5: Rebase on top of display headers rework.
> v6 (from Paulo): improve commit message, bikeshed bit definitions.
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Thanks
>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> drivers/gpu/drm/i915/intel_bios.c | 9 +++++++++
> drivers/gpu/drm/i915/intel_display.h | 1 +
> drivers/gpu/drm/i915/intel_dp.c | 2 ++
> drivers/gpu/drm/i915/intel_vbt_defs.h | 2 ++
> include/drm/i915_component.h | 3 +--
> 5 files changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index 51108ffc28d1..59a150e2adce 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1140,6 +1140,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
> {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
> {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
> {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
> + {DVO_PORT_HDMIF, DVO_PORT_DPF, -1},
> };
>
> /*
> @@ -1688,6 +1689,7 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
> [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
> [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
> [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
> + [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
> };
> int i;
>
> @@ -1726,6 +1728,7 @@ bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
> [PORT_C] = DVO_PORT_DPC,
> [PORT_D] = DVO_PORT_DPD,
> [PORT_E] = DVO_PORT_DPE,
> + [PORT_F] = DVO_PORT_DPF,
> };
> int i;
>
> @@ -1761,6 +1764,7 @@ static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
> [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
> [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
> [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
> + [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
> };
>
> if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
> @@ -1927,6 +1931,11 @@ intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
> if (port == PORT_D)
> return true;
> break;
> + case DVO_PORT_DPF:
> + case DVO_PORT_HDMIF:
> + if (port == PORT_F)
> + return true;
> + break;
> default:
> break;
> }
> diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
> index a0d2b6169361..e47638931b51 100644
> --- a/drivers/gpu/drm/i915/intel_display.h
> +++ b/drivers/gpu/drm/i915/intel_display.h
> @@ -119,6 +119,7 @@ enum port {
> PORT_C,
> PORT_D,
> PORT_E,
> + PORT_F,
>
> I915_MAX_PORTS
> };
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 68229f53d5b8..46937a8c48cc 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1402,6 +1402,7 @@ static i915_reg_t skl_aux_ctl_reg(struct drm_i915_private *dev_priv,
> case PORT_B:
> case PORT_C:
> case PORT_D:
> + case PORT_F:
> return DP_AUX_CH_CTL(port);
> default:
> MISSING_CASE(port);
> @@ -1417,6 +1418,7 @@ static i915_reg_t skl_aux_data_reg(struct drm_i915_private *dev_priv,
> case PORT_B:
> case PORT_C:
> case PORT_D:
> + case PORT_F:
> return DP_AUX_CH_DATA(port, index);
> default:
> MISSING_CASE(port);
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index e3d7745a9151..b5d2341f932c 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> @@ -299,6 +299,8 @@ struct bdb_general_features {
> #define DVO_PORT_DPA 10
> #define DVO_PORT_DPE 11 /* 193 */
> #define DVO_PORT_HDMIE 12 /* 193 */
> +#define DVO_PORT_DPF 13 /* N/A */
> +#define DVO_PORT_HDMIF 14 /* N/A */
> #define DVO_PORT_MIPIA 21 /* 171 */
> #define DVO_PORT_MIPIB 22 /* 171 */
> #define DVO_PORT_MIPIC 23 /* 171 */
> diff --git a/include/drm/i915_component.h b/include/drm/i915_component.h
> index 545c6e0fea7d..346b1f5cb180 100644
> --- a/include/drm/i915_component.h
> +++ b/include/drm/i915_component.h
> @@ -26,9 +26,8 @@
>
> /* MAX_PORT is the number of port
> * It must be sync with I915_MAX_PORTS defined i915_drv.h
> - * 5 should be enough as only HSW, BDW, SKL need such fix.
> */
> -#define MAX_PORTS 5
> +#define MAX_PORTS 6
>
> /**
> * struct i915_audio_component_ops - Ops implemented by i915 driver, called by hda driver
> --
> 2.14.3
>
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 2/8] drm/i915/icl: Add initial Icelake definitions.
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
2018-01-11 18:00 ` [PATCH 1/8] drm/i915/cnl: Add Port F definition Paulo Zanoni
@ 2018-01-11 18:00 ` Paulo Zanoni
2018-01-11 18:00 ` [PATCH 3/8] drm/i915/icp: Introduce Ice Lake PCH Paulo Zanoni
` (10 subsequent siblings)
12 siblings, 0 replies; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-11 18:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Paulo Zanoni, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Icelake is an Intel® Processor containing an Intel® Graphics
Controller.
This is just an initial Icelake definition. PCI IDs, Icelake support
and new features coming in following patches.
v2: Add .ddb_size and .has_guc (Michal Wajdeczko).
v3: Add the ICL_FEATURES macro (Kelvin Gardiner).
v4 (from Paulo): Add missing __initconst (Paulo) and say "graphics
controller" instead of something that looks like an official marketing
name but isn't (Chris).
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 13 +++++++++++++
drivers/gpu/drm/i915/intel_device_info.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 2 ++
4 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a689396d0ff6..016920f58ae6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2595,6 +2595,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEMINILAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_GEMINILAKE)
#define IS_COFFEELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_COFFEELAKE)
#define IS_CANNONLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_CANNONLAKE)
+#define IS_ICELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ICELAKE)
#define IS_MOBILE(dev_priv) ((dev_priv)->info.is_mobile)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
@@ -2706,6 +2707,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7)))
#define IS_GEN9(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(8)))
#define IS_GEN10(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(9)))
+#define IS_GEN11(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(10)))
#define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp)
#define IS_GEN9_LP(dev_priv) (IS_GEN9(dev_priv) && IS_LP(dev_priv))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 36d48422b475..f28c165fc49d 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -579,6 +579,19 @@ static const struct intel_device_info intel_cannonlake_gt2_info __initconst = {
.gt = 2,
};
+#define GEN11_FEATURES \
+ GEN10_FEATURES, \
+ .gen = 11, \
+ .ddb_size = 2048, \
+ .has_csr = 0
+
+static const struct intel_device_info intel_icelake_11_info __initconst = {
+ GEN11_FEATURES,
+ .platform = INTEL_ICELAKE,
+ .is_alpha_support = 1,
+ .has_resource_streamer = 0,
+};
+
/*
* Make sure any device matches here are from most specific to most
* general. For example, since the Quanta match is based on the subsystem
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index d28592e43512..a2c16140169f 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -56,6 +56,7 @@ static const char * const platform_names[] = {
PLATFORM_NAME(GEMINILAKE),
PLATFORM_NAME(COFFEELAKE),
PLATFORM_NAME(CANNONLAKE),
+ PLATFORM_NAME(ICELAKE),
};
#undef PLATFORM_NAME
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 49cb27bd04c1..9542018d11d0 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -69,6 +69,8 @@ enum intel_platform {
INTEL_COFFEELAKE,
/* gen10 */
INTEL_CANNONLAKE,
+ /* gen11 */
+ INTEL_ICELAKE,
INTEL_MAX_PLATFORMS
};
--
2.14.3
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^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 3/8] drm/i915/icp: Introduce Ice Lake PCH
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
2018-01-11 18:00 ` [PATCH 1/8] drm/i915/cnl: Add Port F definition Paulo Zanoni
2018-01-11 18:00 ` [PATCH 2/8] drm/i915/icl: Add initial Icelake definitions Paulo Zanoni
@ 2018-01-11 18:00 ` Paulo Zanoni
2018-01-11 18:00 ` [PATCH 4/8] drm/i915/icp: Get/set proper Raw clock frequency on ICP Paulo Zanoni
` (9 subsequent siblings)
12 siblings, 0 replies; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-11 18:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Paulo Zanoni
From: Anusha Srivatsa <anusha.srivatsa@intel.com>
Add the enum additions to ICP PCH.
v2 (from Paulo): don't set any platforms to it yet since ICP support is
incomplete.
v3 (from Rodrigo): Fix ICP name.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 016920f58ae6..482517af58f6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -783,6 +783,7 @@ enum intel_pch {
PCH_SPT, /* Sunrisepoint PCH */
PCH_KBP, /* Kaby Lake PCH */
PCH_CNP, /* Cannon Lake PCH */
+ PCH_ICP, /* Ice Lake PCH */
PCH_NOP,
};
@@ -2850,6 +2851,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35 has 2918 */
#define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)
+#define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP)
#define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
#define HAS_PCH_CNP_LP(dev_priv) \
((dev_priv)->pch_id == INTEL_PCH_CNP_LP_DEVICE_ID_TYPE)
--
2.14.3
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^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 4/8] drm/i915/icp: Get/set proper Raw clock frequency on ICP
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
` (2 preceding siblings ...)
2018-01-11 18:00 ` [PATCH 3/8] drm/i915/icp: Introduce Ice Lake PCH Paulo Zanoni
@ 2018-01-11 18:00 ` Paulo Zanoni
2018-01-11 18:00 ` [PATCH 5/8] drm/i915/icp: Add Panel Power Sequencing Support Paulo Zanoni
` (8 subsequent siblings)
12 siblings, 0 replies; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-11 18:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Paulo Zanoni
From: Anusha Srivatsa <anusha.srivatsa@intel.com>
Add register definitions for setting the rawclock.
Set the numerator,denominator and divider values.
v2: Simplify the commit message. Simplify the math.
Add register bits for numerator. (Paulo)
v3 (from Paulo): coding style bikesheds.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
drivers/gpu/drm/i915/intel_cdclk.c | 29 +++++++++++++++++++++++++++--
2 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c0a4fc356145..f756512041c6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7352,6 +7352,8 @@ enum {
#define CNP_RAWCLK_DIV(div) ((div) << 16)
#define CNP_RAWCLK_FRAC_MASK (0xf << 26)
#define CNP_RAWCLK_FRAC(frac) ((frac) << 26)
+#define ICP_RAWCLK_DEN(den) ((den) << 26)
+#define ICP_RAWCLK_NUM(num) ((num) << 11)
#define PCH_DPLL_TMR_CFG _MMIO(0xc6208)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index ca36321eafac..4f921fd331fd 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -2342,6 +2342,30 @@ static int cnp_rawclk(struct drm_i915_private *dev_priv)
return divider + fraction;
}
+static int icp_rawclk(struct drm_i915_private *dev_priv)
+{
+ u32 rawclk;
+ int divider, numerator, denominator, frequency;
+
+ if (I915_READ(SFUSE_STRAP) & SFUSE_STRAP_RAW_FREQUENCY) {
+ frequency = 24000;
+ divider = 23;
+ numerator = 0;
+ denominator = 0;
+ } else {
+ frequency = 19200;
+ divider = 18;
+ numerator = 1;
+ denominator = 4;
+ }
+
+ rawclk = CNP_RAWCLK_DIV(divider) | ICP_RAWCLK_NUM(numerator) |
+ ICP_RAWCLK_DEN(denominator);
+
+ I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
+ return frequency;
+}
+
static int pch_rawclk(struct drm_i915_private *dev_priv)
{
return (I915_READ(PCH_RAWCLK_FREQ) & RAWCLK_FREQ_MASK) * 1000;
@@ -2389,8 +2413,9 @@ static int g4x_hrawclk(struct drm_i915_private *dev_priv)
*/
void intel_update_rawclk(struct drm_i915_private *dev_priv)
{
-
- if (HAS_PCH_CNP(dev_priv))
+ if (HAS_PCH_ICP(dev_priv))
+ dev_priv->rawclk_freq = icp_rawclk(dev_priv);
+ else if (HAS_PCH_CNP(dev_priv))
dev_priv->rawclk_freq = cnp_rawclk(dev_priv);
else if (HAS_PCH_SPLIT(dev_priv))
dev_priv->rawclk_freq = pch_rawclk(dev_priv);
--
2.14.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 5/8] drm/i915/icp: Add Panel Power Sequencing Support
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
` (3 preceding siblings ...)
2018-01-11 18:00 ` [PATCH 4/8] drm/i915/icp: Get/set proper Raw clock frequency on ICP Paulo Zanoni
@ 2018-01-11 18:00 ` Paulo Zanoni
2018-01-11 18:00 ` [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP Paulo Zanoni
` (7 subsequent siblings)
12 siblings, 0 replies; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-11 18:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Paulo Zanoni
From: Anusha Srivatsa <anusha.srivatsa@intel.com>
ICP, like BXT, has has two panel power sequencers.
v2: Simplify the code. Remove unwanted register definitions.
Make code as close to BXT style as possible. (Ville)
Also, remove the use of ICP_SECOND_PPS_BACKLIGHT for now.
Moving forward, if we are sure we need to set this register,
we can access it.
v3: Use INTEL_GEN(dev_priv), make code more readeable. (Ville)
v4 (from Paulo):
- Coding style fixes.
- Add a missing HAS_PCH_CNP -> gen10+ check.
- Rebase.
v5: Use per platform checks rather than INTEL_GEN().
v4 of this patch breaks on CoffeeLake, since CFL uses
CNP and per platform check makes sense in that case.
v6 (from Paulo):
- v5 was a patch on top of v4, not a new version. Now v6 is correctly
a new version of the original patch.
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 46937a8c48cc..cdfdacf27939 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -796,7 +796,8 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
regs->pp_stat = PP_STATUS(pps_idx);
regs->pp_on = PP_ON_DELAYS(pps_idx);
regs->pp_off = PP_OFF_DELAYS(pps_idx);
- if (!IS_GEN9_LP(dev_priv) && !HAS_PCH_CNP(dev_priv))
+ if (!IS_GEN9_LP(dev_priv) && !HAS_PCH_CNP(dev_priv) &&
+ !HAS_PCH_ICP(dev_priv))
regs->pp_div = PP_DIVISOR(pps_idx);
}
@@ -5453,7 +5454,8 @@ intel_pps_readout_hw_state(struct intel_dp *intel_dp, struct edp_power_seq *seq)
pp_on = I915_READ(regs.pp_on);
pp_off = I915_READ(regs.pp_off);
- if (!IS_GEN9_LP(dev_priv) && !HAS_PCH_CNP(dev_priv)) {
+ if (!IS_GEN9_LP(dev_priv) && !HAS_PCH_CNP(dev_priv) &&
+ !HAS_PCH_ICP(dev_priv)) {
I915_WRITE(regs.pp_ctrl, pp_ctl);
pp_div = I915_READ(regs.pp_div);
}
@@ -5471,7 +5473,8 @@ intel_pps_readout_hw_state(struct intel_dp *intel_dp, struct edp_power_seq *seq)
seq->t10 = (pp_off & PANEL_POWER_DOWN_DELAY_MASK) >>
PANEL_POWER_DOWN_DELAY_SHIFT;
- if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv)) {
+ if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv) ||
+ HAS_PCH_ICP(dev_priv)) {
seq->t11_t12 = ((pp_ctl & BXT_POWER_CYCLE_DELAY_MASK) >>
BXT_POWER_CYCLE_DELAY_SHIFT) * 1000;
} else {
@@ -5642,7 +5645,8 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
(seq->t10 << PANEL_POWER_DOWN_DELAY_SHIFT);
/* Compute the divisor for the pp clock, simply match the Bspec
* formula. */
- if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv)) {
+ if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv) ||
+ HAS_PCH_ICP(dev_priv)) {
pp_div = I915_READ(regs.pp_ctrl);
pp_div &= ~BXT_POWER_CYCLE_DELAY_MASK;
pp_div |= (DIV_ROUND_UP(seq->t11_t12, 1000)
@@ -5668,7 +5672,8 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
I915_WRITE(regs.pp_on, pp_on);
I915_WRITE(regs.pp_off, pp_off);
- if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
+ if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv) ||
+ HAS_PCH_ICP(dev_priv))
I915_WRITE(regs.pp_ctrl, pp_div);
else
I915_WRITE(regs.pp_div, pp_div);
@@ -5676,7 +5681,8 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
DRM_DEBUG_KMS("panel power sequencer register settings: PP_ON %#x, PP_OFF %#x, PP_DIV %#x\n",
I915_READ(regs.pp_on),
I915_READ(regs.pp_off),
- (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv)) ?
+ (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv) ||
+ HAS_PCH_ICP(dev_priv)) ?
(I915_READ(regs.pp_ctrl) & BXT_POWER_CYCLE_DELAY_MASK) :
I915_READ(regs.pp_div));
}
--
2.14.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
` (4 preceding siblings ...)
2018-01-11 18:00 ` [PATCH 5/8] drm/i915/icp: Add Panel Power Sequencing Support Paulo Zanoni
@ 2018-01-11 18:00 ` Paulo Zanoni
2018-01-11 21:48 ` James Ausmus
2018-01-19 18:48 ` Paulo Zanoni
2018-01-11 18:00 ` [PATCH 7/8] drm/i915/icp: add ICP gmbus and gpio support Paulo Zanoni
` (6 subsequent siblings)
12 siblings, 2 replies; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-11 18:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula, Paulo Zanoni
From: Anusha Srivatsa <anusha.srivatsa@intel.com>
ICP has two backlight controllers - similar to previous platforms like
BXT.
v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
Reuse BXT code since it is very similar.(Ville)
v3 (from Paulo): Rebase.
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/intel_panel.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index fa6831f8c004..ad80cca8c110 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1865,7 +1865,7 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
panel->backlight.set = bxt_set_backlight;
panel->backlight.get = bxt_get_backlight;
panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
- } else if (HAS_PCH_CNP(dev_priv)) {
+ } else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
panel->backlight.setup = cnp_setup_backlight;
panel->backlight.enable = cnp_enable_backlight;
panel->backlight.disable = cnp_disable_backlight;
--
2.14.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-11 18:00 ` [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP Paulo Zanoni
@ 2018-01-11 21:48 ` James Ausmus
2018-01-11 23:57 ` Rodrigo Vivi
2018-01-19 18:48 ` Paulo Zanoni
1 sibling, 1 reply; 26+ messages in thread
From: James Ausmus @ 2018-01-11 21:48 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: Jani Nikula, intel-gfx
On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> From: Anusha Srivatsa <anusha.srivatsa@intel.com>
>
> ICP has two backlight controllers - similar to previous platforms like
> BXT.
>
> v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
> Reuse BXT code since it is very similar.(Ville)
>
> v3 (from Paulo): Rebase.
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> drivers/gpu/drm/i915/intel_panel.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index fa6831f8c004..ad80cca8c110 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -1865,7 +1865,7 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
> panel->backlight.set = bxt_set_backlight;
> panel->backlight.get = bxt_get_backlight;
> panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
> - } else if (HAS_PCH_CNP(dev_priv)) {
> + } else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
The commit message says reuse BXT, but the code says reuse CNP - which
one should it be?
> panel->backlight.setup = cnp_setup_backlight;
> panel->backlight.enable = cnp_enable_backlight;
> panel->backlight.disable = cnp_disable_backlight;
> --
> 2.14.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-11 21:48 ` James Ausmus
@ 2018-01-11 23:57 ` Rodrigo Vivi
2018-01-19 16:40 ` Paulo Zanoni
0 siblings, 1 reply; 26+ messages in thread
From: Rodrigo Vivi @ 2018-01-11 23:57 UTC (permalink / raw)
To: James Ausmus; +Cc: Jani Nikula, intel-gfx, Paulo Zanoni
On Thu, Jan 11, 2018 at 09:48:57PM +0000, James Ausmus wrote:
> On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> > From: Anusha Srivatsa <anusha.srivatsa@intel.com>
> >
> > ICP has two backlight controllers - similar to previous platforms like
> > BXT.
> >
> > v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
> > Reuse BXT code since it is very similar.(Ville)
> >
> > v3 (from Paulo): Rebase.
> >
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_panel.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> > index fa6831f8c004..ad80cca8c110 100644
> > --- a/drivers/gpu/drm/i915/intel_panel.c
> > +++ b/drivers/gpu/drm/i915/intel_panel.c
> > @@ -1865,7 +1865,7 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
> > panel->backlight.set = bxt_set_backlight;
> > panel->backlight.get = bxt_get_backlight;
> > panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
> > - } else if (HAS_PCH_CNP(dev_priv)) {
> > + } else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
>
> The commit message says reuse BXT, but the code says reuse CNP - which
> one should it be?
well,
CNP is like BXT, but with only one controller.
ICP is like BXT, including 2 controllers.
I don't know if it makes more sense re-use the cnp or bxt functions
But one way or another we have to address these lines from cnp_setup:
/*
* CNP has the BXT implementation of backlight, but with only
* one controller. Future platforms could have multiple controll\
ers
* so let's make this extensible and prepared for the future.
*/
panel->backlight.controller = 0;
>
> > panel->backlight.setup = cnp_setup_backlight;
> > panel->backlight.enable = cnp_enable_backlight;
> > panel->backlight.disable = cnp_disable_backlight;
> > --
> > 2.14.3
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-11 23:57 ` Rodrigo Vivi
@ 2018-01-19 16:40 ` Paulo Zanoni
2018-01-19 17:26 ` Anusha Srivatsa
0 siblings, 1 reply; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-19 16:40 UTC (permalink / raw)
To: Rodrigo Vivi, James Ausmus; +Cc: Jani Nikula, intel-gfx
Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> On Thu, Jan 11, 2018 at 09:48:57PM +0000, James Ausmus wrote:
> > On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> > > From: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > >
> > > ICP has two backlight controllers - similar to previous platforms
> > > like
> > > BXT.
> > >
> > > v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
> > > Reuse BXT code since it is very similar.(Ville)
> > >
> > > v3 (from Paulo): Rebase.
> > >
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/intel_panel.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_panel.c
> > > b/drivers/gpu/drm/i915/intel_panel.c
> > > index fa6831f8c004..ad80cca8c110 100644
> > > --- a/drivers/gpu/drm/i915/intel_panel.c
> > > +++ b/drivers/gpu/drm/i915/intel_panel.c
> > > @@ -1865,7 +1865,7 @@ intel_panel_init_backlight_funcs(struct
> > > intel_panel *panel)
> > > panel->backlight.set = bxt_set_backlight;
> > > panel->backlight.get = bxt_get_backlight;
> > > panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
> > > - } else if (HAS_PCH_CNP(dev_priv)) {
> > > + } else if (HAS_PCH_CNP(dev_priv) ||
> > > HAS_PCH_ICP(dev_priv)) {
> >
> > The commit message says reuse BXT, but the code says reuse CNP -
> > which
> > one should it be?
>
> well,
> CNP is like BXT, but with only one controller.
> ICP is like BXT, including 2 controllers.
>
> I don't know if it makes more sense re-use the cnp or bxt functions
>
> But one way or another we have to address these lines from cnp_setup:
>
> /*
> * CNP has the BXT implementation of backlight, but with only
> * one controller. Future platforms could have multiple
> controll\
> ers
> * so let's make this extensible and prepared for the future.
> */
> panel->backlight.controller = 0;
My understanding is that we're only using one of the controllers on ICP
on purpose, so we can perfectly reuse the CNP code.
But I'll let Anusha comment on this.
>
> >
> > > panel->backlight.setup = cnp_setup_backlight;
> > > panel->backlight.enable = cnp_enable_backlight;
> > > panel->backlight.disable =
> > > cnp_disable_backlight;
> > > --
> > > 2.14.3
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-19 16:40 ` Paulo Zanoni
@ 2018-01-19 17:26 ` Anusha Srivatsa
2018-01-19 17:56 ` Rodrigo Vivi
2018-01-19 18:14 ` James Ausmus
0 siblings, 2 replies; 26+ messages in thread
From: Anusha Srivatsa @ 2018-01-19 17:26 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: Jani Nikula, intel-gfx, Rodrigo Vivi
On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > On Thu, Jan 11, 2018 at 09:48:57PM +0000, James Ausmus wrote:
> > > On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> > > > From: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > >
> > > > ICP has two backlight controllers - similar to previous platforms
> > > > like
> > > > BXT.
> > > >
> > > > v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
> > > > Reuse BXT code since it is very similar.(Ville)
> > > >
> > > > v3 (from Paulo): Rebase.
> > > >
> > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/intel_panel.c | 2 +-
> > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_panel.c
> > > > b/drivers/gpu/drm/i915/intel_panel.c
> > > > index fa6831f8c004..ad80cca8c110 100644
> > > > --- a/drivers/gpu/drm/i915/intel_panel.c
> > > > +++ b/drivers/gpu/drm/i915/intel_panel.c
> > > > @@ -1865,7 +1865,7 @@ intel_panel_init_backlight_funcs(struct
> > > > intel_panel *panel)
> > > > panel->backlight.set = bxt_set_backlight;
> > > > panel->backlight.get = bxt_get_backlight;
> > > > panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
> > > > - } else if (HAS_PCH_CNP(dev_priv)) {
> > > > + } else if (HAS_PCH_CNP(dev_priv) ||
> > > > HAS_PCH_ICP(dev_priv)) {
> > >
> > > The commit message says reuse BXT, but the code says reuse CNP -
> > > which
> > > one should it be?
> >
> > well,
> > CNP is like BXT, but with only one controller.
> > ICP is like BXT, including 2 controllers.
> >
> > I don't know if it makes more sense re-use the cnp or bxt functions
> >
> > But one way or another we have to address these lines from cnp_setup:
> >
> > /*
> > * CNP has the BXT implementation of backlight, but with only
> > * one controller. Future platforms could have multiple
> > controll\
> > ers
> > * so let's make this extensible and prepared for the future.
> > */
> > panel->backlight.controller = 0;
>
> My understanding is that we're only using one of the controllers on ICP
> on purpose, so we can perfectly reuse the CNP code.
>
> But I'll let Anusha comment on this.
This is intentional. Commit message is trying to tell the similarity
in backlight support. But we need to reuse CNP code ultimstely.
Regards,
Anusha
> >
> > >
> > > > panel->backlight.setup = cnp_setup_backlight;
> > > > panel->backlight.enable = cnp_enable_backlight;
> > > > panel->backlight.disable =
> > > > cnp_disable_backlight;
> > > > --
> > > > 2.14.3
> > > >
> > > > _______________________________________________
> > > > Intel-gfx mailing list
> > > > Intel-gfx@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Anusha Srivatsa
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-19 17:26 ` Anusha Srivatsa
@ 2018-01-19 17:56 ` Rodrigo Vivi
2018-01-19 18:25 ` Paulo Zanoni
2018-01-19 18:14 ` James Ausmus
1 sibling, 1 reply; 26+ messages in thread
From: Rodrigo Vivi @ 2018-01-19 17:56 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: Jani Nikula, intel-gfx, Paulo Zanoni
On Fri, Jan 19, 2018 at 05:26:02PM +0000, Anusha Srivatsa wrote:
> On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> > Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > > On Thu, Jan 11, 2018 at 09:48:57PM +0000, James Ausmus wrote:
> > > > On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> > > > > From: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > > >
> > > > > ICP has two backlight controllers - similar to previous platforms
> > > > > like
> > > > > BXT.
> > > > >
> > > > > v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
> > > > > Reuse BXT code since it is very similar.(Ville)
> > > > >
> > > > > v3 (from Paulo): Rebase.
> > > > >
> > > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > ---
> > > > > drivers/gpu/drm/i915/intel_panel.c | 2 +-
> > > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/intel_panel.c
> > > > > b/drivers/gpu/drm/i915/intel_panel.c
> > > > > index fa6831f8c004..ad80cca8c110 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_panel.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_panel.c
> > > > > @@ -1865,7 +1865,7 @@ intel_panel_init_backlight_funcs(struct
> > > > > intel_panel *panel)
> > > > > panel->backlight.set = bxt_set_backlight;
> > > > > panel->backlight.get = bxt_get_backlight;
> > > > > panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
> > > > > - } else if (HAS_PCH_CNP(dev_priv)) {
> > > > > + } else if (HAS_PCH_CNP(dev_priv) ||
> > > > > HAS_PCH_ICP(dev_priv)) {
> > > >
> > > > The commit message says reuse BXT, but the code says reuse CNP -
> > > > which
> > > > one should it be?
> > >
> > > well,
> > > CNP is like BXT, but with only one controller.
> > > ICP is like BXT, including 2 controllers.
> > >
> > > I don't know if it makes more sense re-use the cnp or bxt functions
> > >
> > > But one way or another we have to address these lines from cnp_setup:
> > >
> > > /*
> > > * CNP has the BXT implementation of backlight, but with only
> > > * one controller. Future platforms could have multiple
> > > controll\
> > > ers
> > > * so let's make this extensible and prepared for the future.
> > > */
> > > panel->backlight.controller = 0;
> >
> > My understanding is that we're only using one of the controllers on ICP
> > on purpose, so we can perfectly reuse the CNP code.
> >
> > But I'll let Anusha comment on this.
>
> This is intentional. Commit message is trying to tell the similarity
> in backlight support. But we need to reuse CNP code ultimstely.
So it is probably better to update this comment here
explaining that we know it has more than 1 controller but
we intentionally only use the '0' one.
But my question now is why?
>
> Regards,
> Anusha
> > >
> > > >
> > > > > panel->backlight.setup = cnp_setup_backlight;
> > > > > panel->backlight.enable = cnp_enable_backlight;
> > > > > panel->backlight.disable =
> > > > > cnp_disable_backlight;
> > > > > --
> > > > > 2.14.3
> > > > >
> > > > > _______________________________________________
> > > > > Intel-gfx mailing list
> > > > > Intel-gfx@lists.freedesktop.org
> > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > >
> > > > _______________________________________________
> > > > Intel-gfx mailing list
> > > > Intel-gfx@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Anusha Srivatsa
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-19 17:56 ` Rodrigo Vivi
@ 2018-01-19 18:25 ` Paulo Zanoni
2018-01-19 18:45 ` Srivatsa, Anusha
0 siblings, 1 reply; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-19 18:25 UTC (permalink / raw)
To: Rodrigo Vivi, Anusha Srivatsa; +Cc: Jani Nikula, intel-gfx
Em Sex, 2018-01-19 às 09:56 -0800, Rodrigo Vivi escreveu:
> On Fri, Jan 19, 2018 at 05:26:02PM +0000, Anusha Srivatsa wrote:
> > On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> > > Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > > > On Thu, Jan 11, 2018 at 09:48:57PM +0000, James Ausmus wrote:
> > > > > On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> > > > > > From: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > > > >
> > > > > > ICP has two backlight controllers - similar to previous
> > > > > > platforms
> > > > > > like
> > > > > > BXT.
> > > > > >
> > > > > > v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT
> > > > > > register.(Jani)
> > > > > > Reuse BXT code since it is very similar.(Ville)
> > > > > >
> > > > > > v3 (from Paulo): Rebase.
> > > > > >
> > > > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > > ---
> > > > > > drivers/gpu/drm/i915/intel_panel.c | 2 +-
> > > > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/i915/intel_panel.c
> > > > > > b/drivers/gpu/drm/i915/intel_panel.c
> > > > > > index fa6831f8c004..ad80cca8c110 100644
> > > > > > --- a/drivers/gpu/drm/i915/intel_panel.c
> > > > > > +++ b/drivers/gpu/drm/i915/intel_panel.c
> > > > > > @@ -1865,7 +1865,7 @@
> > > > > > intel_panel_init_backlight_funcs(struct
> > > > > > intel_panel *panel)
> > > > > > panel->backlight.set = bxt_set_backlight;
> > > > > > panel->backlight.get = bxt_get_backlight;
> > > > > > panel->backlight.hz_to_pwm =
> > > > > > bxt_hz_to_pwm;
> > > > > > - } else if (HAS_PCH_CNP(dev_priv)) {
> > > > > > + } else if (HAS_PCH_CNP(dev_priv) ||
> > > > > > HAS_PCH_ICP(dev_priv)) {
> > > > >
> > > > > The commit message says reuse BXT, but the code says reuse
> > > > > CNP -
> > > > > which
> > > > > one should it be?
> > > >
> > > > well,
> > > > CNP is like BXT, but with only one controller.
> > > > ICP is like BXT, including 2 controllers.
> > > >
> > > > I don't know if it makes more sense re-use the cnp or bxt
> > > > functions
> > > >
> > > > But one way or another we have to address these lines from
> > > > cnp_setup:
> > > >
> > > > /*
> > > > * CNP has the BXT implementation of backlight, but
> > > > with only
> > > > * one controller. Future platforms could have multiple
> > > > controll\
> > > > ers
> > > > * so let's make this extensible and prepared for the
> > > > future.
> > > > */
> > > > panel->backlight.controller = 0;
> > >
> > > My understanding is that we're only using one of the controllers
> > > on ICP
> > > on purpose, so we can perfectly reuse the CNP code.
> > >
> > > But I'll let Anusha comment on this.
> >
> > This is intentional. Commit message is trying to tell the
> > similarity
> > in backlight support. But we need to reuse CNP code ultimstely.
>
> So it is probably better to update this comment here
> explaining that we know it has more than 1 controller but
> we intentionally only use the '0' one.
I think the cnp_setup_backlight comment is appropriate as-is because
we're still only using one controller for ICP. We should probably only
update it if we start using ICP's second controller (because we never
tested controller 1 and we don't know if the code is actually 100%
prepared for the future). Do you have any specific suggestions on what
to write here?
>
> But my question now is why?
Pretty much because there's no use for it for now.
>
> >
> > Regards,
> > Anusha
> > > >
> > > > >
> > > > > > panel->backlight.setup =
> > > > > > cnp_setup_backlight;
> > > > > > panel->backlight.enable =
> > > > > > cnp_enable_backlight;
> > > > > > panel->backlight.disable =
> > > > > > cnp_disable_backlight;
> > > > > > --
> > > > > > 2.14.3
> > > > > >
> > > > > > _______________________________________________
> > > > > > Intel-gfx mailing list
> > > > > > Intel-gfx@lists.freedesktop.org
> > > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > > >
> > > > > _______________________________________________
> > > > > Intel-gfx mailing list
> > > > > Intel-gfx@lists.freedesktop.org
> > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> > --
> > Anusha Srivatsa
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-19 18:25 ` Paulo Zanoni
@ 2018-01-19 18:45 ` Srivatsa, Anusha
0 siblings, 0 replies; 26+ messages in thread
From: Srivatsa, Anusha @ 2018-01-19 18:45 UTC (permalink / raw)
To: Zanoni, Paulo R, Vivi, Rodrigo; +Cc: Nikula, Jani, intel-gfx
>-----Original Message-----
>From: Zanoni, Paulo R
>Sent: Friday, January 19, 2018 10:25 AM
>To: Vivi, Rodrigo <rodrigo.vivi@intel.com>; Srivatsa, Anusha
><anusha.srivatsa@intel.com>
>Cc: Ausmus, James <james.ausmus@intel.com>; Nikula, Jani
><jani.nikula@intel.com>; intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
>
>Em Sex, 2018-01-19 às 09:56 -0800, Rodrigo Vivi escreveu:
>> On Fri, Jan 19, 2018 at 05:26:02PM +0000, Anusha Srivatsa wrote:
>> > On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
>> > > Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
>> > > > On Thu, Jan 11, 2018 at 09:48:57PM +0000, James Ausmus wrote:
>> > > > > On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
>> > > > > > From: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> > > > > >
>> > > > > > ICP has two backlight controllers - similar to previous
>> > > > > > platforms like BXT.
>> > > > > >
>> > > > > > v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT
>> > > > > > register.(Jani)
>> > > > > > Reuse BXT code since it is very similar.(Ville)
>> > > > > >
>> > > > > > v3 (from Paulo): Rebase.
>> > > > > >
>> > > > > > Cc: Jani Nikula <jani.nikula@intel.com>
>> > > > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>> > > > > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>> > > > > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> > > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>> > > > > > ---
>> > > > > > drivers/gpu/drm/i915/intel_panel.c | 2 +-
>> > > > > > 1 file changed, 1 insertion(+), 1 deletion(-)
>> > > > > >
>> > > > > > diff --git a/drivers/gpu/drm/i915/intel_panel.c
>> > > > > > b/drivers/gpu/drm/i915/intel_panel.c
>> > > > > > index fa6831f8c004..ad80cca8c110 100644
>> > > > > > --- a/drivers/gpu/drm/i915/intel_panel.c
>> > > > > > +++ b/drivers/gpu/drm/i915/intel_panel.c
>> > > > > > @@ -1865,7 +1865,7 @@
>> > > > > > intel_panel_init_backlight_funcs(struct
>> > > > > > intel_panel *panel)
>> > > > > > panel->backlight.set = bxt_set_backlight;
>> > > > > > panel->backlight.get = bxt_get_backlight;
>> > > > > > panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
>> > > > > > - } else if (HAS_PCH_CNP(dev_priv)) {
>> > > > > > + } else if (HAS_PCH_CNP(dev_priv) ||
>> > > > > > HAS_PCH_ICP(dev_priv)) {
>> > > > >
>> > > > > The commit message says reuse BXT, but the code says reuse CNP
>> > > > > - which one should it be?
>> > > >
>> > > > well,
>> > > > CNP is like BXT, but with only one controller.
>> > > > ICP is like BXT, including 2 controllers.
>> > > >
>> > > > I don't know if it makes more sense re-use the cnp or bxt
>> > > > functions
>> > > >
>> > > > But one way or another we have to address these lines from
>> > > > cnp_setup:
>> > > >
>> > > > /*
>> > > > * CNP has the BXT implementation of backlight, but with
>> > > > only
>> > > > * one controller. Future platforms could have multiple
>> > > > controll\ ers
>> > > > * so let's make this extensible and prepared for the
>> > > > future.
>> > > > */
>> > > > panel->backlight.controller = 0;
>> > >
>> > > My understanding is that we're only using one of the controllers
>> > > on ICP on purpose, so we can perfectly reuse the CNP code.
>> > >
>> > > But I'll let Anusha comment on this.
>> >
>> > This is intentional. Commit message is trying to tell the similarity
>> > in backlight support. But we need to reuse CNP code ultimstely.
>>
>> So it is probably better to update this comment here explaining that
>> we know it has more than 1 controller but we intentionally only use
>> the '0' one.
>
>I think the cnp_setup_backlight comment is appropriate as-is because we're still
>only using one controller for ICP. We should probably only update it if we start
>using ICP's second controller (because we never tested controller 1 and we don't
>know if the code is actually 100% prepared for the future). Do you have any
>specific suggestions on what to write here?
Will something like - "We are currently using only one of two backlight controllers on ICP. Hence, reuse the CNP code." Suffice?
Anusha
>>
>> But my question now is why?
>
>Pretty much because there's no use for it for now.
>
>>
>> >
>> > Regards,
>> > Anusha
>> > > >
>> > > > >
>> > > > > > panel->backlight.setup =
>> > > > > > cnp_setup_backlight;
>> > > > > > panel->backlight.enable = cnp_enable_backlight;
>> > > > > > panel->backlight.disable = cnp_disable_backlight;
>> > > > > > --
>> > > > > > 2.14.3
>> > > > > >
>> > > > > > _______________________________________________
>> > > > > > Intel-gfx mailing list
>> > > > > > Intel-gfx@lists.freedesktop.org
>> > > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>> > > > >
>> > > > > _______________________________________________
>> > > > > Intel-gfx mailing list
>> > > > > Intel-gfx@lists.freedesktop.org
>> > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>> >
>> > --
>> > Anusha Srivatsa
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-19 17:26 ` Anusha Srivatsa
2018-01-19 17:56 ` Rodrigo Vivi
@ 2018-01-19 18:14 ` James Ausmus
1 sibling, 0 replies; 26+ messages in thread
From: James Ausmus @ 2018-01-19 18:14 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: Jani Nikula, intel-gfx, Paulo Zanoni, Rodrigo Vivi
On Fri, Jan 19, 2018 at 09:26:02AM -0800, Anusha Srivatsa wrote:
> On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> > Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > > On Thu, Jan 11, 2018 at 09:48:57PM +0000, James Ausmus wrote:
> > > > On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> > > > > From: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > > >
> > > > > ICP has two backlight controllers - similar to previous platforms
> > > > > like
> > > > > BXT.
> > > > >
> > > > > v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
> > > > > Reuse BXT code since it is very similar.(Ville)
> > > > >
> > > > > v3 (from Paulo): Rebase.
> > > > >
> > > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > ---
> > > > > drivers/gpu/drm/i915/intel_panel.c | 2 +-
> > > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/intel_panel.c
> > > > > b/drivers/gpu/drm/i915/intel_panel.c
> > > > > index fa6831f8c004..ad80cca8c110 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_panel.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_panel.c
> > > > > @@ -1865,7 +1865,7 @@ intel_panel_init_backlight_funcs(struct
> > > > > intel_panel *panel)
> > > > > panel->backlight.set = bxt_set_backlight;
> > > > > panel->backlight.get = bxt_get_backlight;
> > > > > panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
> > > > > - } else if (HAS_PCH_CNP(dev_priv)) {
> > > > > + } else if (HAS_PCH_CNP(dev_priv) ||
> > > > > HAS_PCH_ICP(dev_priv)) {
> > > >
> > > > The commit message says reuse BXT, but the code says reuse CNP -
> > > > which
> > > > one should it be?
> > >
> > > well,
> > > CNP is like BXT, but with only one controller.
> > > ICP is like BXT, including 2 controllers.
> > >
> > > I don't know if it makes more sense re-use the cnp or bxt functions
> > >
> > > But one way or another we have to address these lines from cnp_setup:
> > >
> > > /*
> > > * CNP has the BXT implementation of backlight, but with only
> > > * one controller. Future platforms could have multiple
> > > controll\
> > > ers
> > > * so let's make this extensible and prepared for the future.
> > > */
> > > panel->backlight.controller = 0;
> >
> > My understanding is that we're only using one of the controllers on ICP
> > on purpose, so we can perfectly reuse the CNP code.
> >
> > But I'll let Anusha comment on this.
>
> This is intentional. Commit message is trying to tell the similarity
> in backlight support. But we need to reuse CNP code ultimstely.
OK - in that case, the commit message needs to get less confusing, as it
explicitly states that ICP is similar to BXT, and it explicitly states
that v2 changed the commit to reuse BXT code, but the actual code is
clearly using CNP code, and doesn't mention CNP (or the justification
for using CNP) anywhere. :)
Maybe explain that we're using CNP code intentionally, even though it
supports two BL controllers, and explain *why* we're ignoring the second
BL controller? I'm still not sure why that is myself :)
Thanks!
-James
>
> Regards,
> Anusha
> > >
> > > >
> > > > > panel->backlight.setup = cnp_setup_backlight;
> > > > > panel->backlight.enable = cnp_enable_backlight;
> > > > > panel->backlight.disable =
> > > > > cnp_disable_backlight;
> > > > > --
> > > > > 2.14.3
> > > > >
> > > > > _______________________________________________
> > > > > Intel-gfx mailing list
> > > > > Intel-gfx@lists.freedesktop.org
> > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > >
> > > > _______________________________________________
> > > > Intel-gfx mailing list
> > > > Intel-gfx@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Anusha Srivatsa
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-11 18:00 ` [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP Paulo Zanoni
2018-01-11 21:48 ` James Ausmus
@ 2018-01-19 18:48 ` Paulo Zanoni
2018-01-19 19:45 ` Ausmus, James
2018-01-19 19:56 ` Rodrigo Vivi
1 sibling, 2 replies; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-19 18:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Paulo Zanoni, Jani Nikula, Rodrigo Vivi
From: Anusha Srivatsa <anusha.srivatsa@intel.com>
ICP has two backlight controllers - similar to previous platforms like
BXT -, but we only use one controller for now, so we can just reuse
the CNP code.
v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
Reuse CNP code since it is very similar.(Ville)
v3 (from Paulo): Rebase.
v4 (from Paulo): adjust commit message (James) and comment (Rodrigo).
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: James Ausmus <james.ausmus@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/intel_panel.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index fa6831f8c004..e702a6487aa9 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1719,9 +1719,9 @@ cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
u32 pwm_ctl, val;
/*
- * CNP has the BXT implementation of backlight, but with only
- * one controller. Future platforms could have multiple controllers
- * so let's make this extensible and prepared for the future.
+ * CNP has the BXT implementation of backlight, but with only one
+ * controller. TODO: ICP has multiple controllers but we only use
+ * controller 0 for now.
*/
panel->backlight.controller = 0;
@@ -1865,7 +1865,7 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
panel->backlight.set = bxt_set_backlight;
panel->backlight.get = bxt_get_backlight;
panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
- } else if (HAS_PCH_CNP(dev_priv)) {
+ } else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
panel->backlight.setup = cnp_setup_backlight;
panel->backlight.enable = cnp_enable_backlight;
panel->backlight.disable = cnp_disable_backlight;
--
2.14.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-19 18:48 ` Paulo Zanoni
@ 2018-01-19 19:45 ` Ausmus, James
2018-01-19 19:56 ` Rodrigo Vivi
1 sibling, 0 replies; 26+ messages in thread
From: Ausmus, James @ 2018-01-19 19:45 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: Jani Nikula, Intel GFX, Rodrigo Vivi
[-- Attachment #1.1: Type: text/plain, Size: 2496 bytes --]
On Fri, Jan 19, 2018 at 10:48 AM, Paulo Zanoni <paulo.r.zanoni@intel.com>
wrote:
>
> From: Anusha Srivatsa <anusha.srivatsa@intel.com>
>
> ICP has two backlight controllers - similar to previous platforms like
> BXT -, but we only use one controller for now, so we can just reuse
> the CNP code.
>
> v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
> Reuse CNP code since it is very similar.(Ville)
> v3 (from Paulo): Rebase.
> v4 (from Paulo): adjust commit message (James) and comment (Rodrigo).
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: James Ausmus <james.ausmus@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Looks good, thanks!
Acked-by: James Ausmus <james.ausmus@intel.com>
>
> ---
> drivers/gpu/drm/i915/intel_panel.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
> index fa6831f8c004..e702a6487aa9 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -1719,9 +1719,9 @@ cnp_setup_backlight(struct intel_connector
*connector, enum pipe unused)
> u32 pwm_ctl, val;
>
> /*
> - * CNP has the BXT implementation of backlight, but with only
> - * one controller. Future platforms could have multiple
controllers
> - * so let's make this extensible and prepared for the future.
> + * CNP has the BXT implementation of backlight, but with only one
> + * controller. TODO: ICP has multiple controllers but we only use
> + * controller 0 for now.
> */
> panel->backlight.controller = 0;
>
> @@ -1865,7 +1865,7 @@ intel_panel_init_backlight_funcs(struct intel_panel
*panel)
> panel->backlight.set = bxt_set_backlight;
> panel->backlight.get = bxt_get_backlight;
> panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
> - } else if (HAS_PCH_CNP(dev_priv)) {
> + } else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
> panel->backlight.setup = cnp_setup_backlight;
> panel->backlight.enable = cnp_enable_backlight;
> panel->backlight.disable = cnp_disable_backlight;
> --
> 2.14.3
>
--
James Ausmus
[-- Attachment #1.2: Type: text/html, Size: 3525 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP
2018-01-19 18:48 ` Paulo Zanoni
2018-01-19 19:45 ` Ausmus, James
@ 2018-01-19 19:56 ` Rodrigo Vivi
1 sibling, 0 replies; 26+ messages in thread
From: Rodrigo Vivi @ 2018-01-19 19:56 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: Jani Nikula, intel-gfx
On Fri, Jan 19, 2018 at 06:48:12PM +0000, Paulo Zanoni wrote:
> From: Anusha Srivatsa <anusha.srivatsa@intel.com>
>
> ICP has two backlight controllers - similar to previous platforms like
> BXT -, but we only use one controller for now, so we can just reuse
> the CNP code.
>
> v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
> Reuse CNP code since it is very similar.(Ville)
> v3 (from Paulo): Rebase.
> v4 (from Paulo): adjust commit message (James) and comment (Rodrigo).
thanks
x
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: James Ausmus <james.ausmus@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> drivers/gpu/drm/i915/intel_panel.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index fa6831f8c004..e702a6487aa9 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -1719,9 +1719,9 @@ cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
> u32 pwm_ctl, val;
>
> /*
> - * CNP has the BXT implementation of backlight, but with only
> - * one controller. Future platforms could have multiple controllers
> - * so let's make this extensible and prepared for the future.
> + * CNP has the BXT implementation of backlight, but with only one
> + * controller. TODO: ICP has multiple controllers but we only use
> + * controller 0 for now.
> */
> panel->backlight.controller = 0;
>
> @@ -1865,7 +1865,7 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
> panel->backlight.set = bxt_set_backlight;
> panel->backlight.get = bxt_get_backlight;
> panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
> - } else if (HAS_PCH_CNP(dev_priv)) {
> + } else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
> panel->backlight.setup = cnp_setup_backlight;
> panel->backlight.enable = cnp_enable_backlight;
> panel->backlight.disable = cnp_disable_backlight;
> --
> 2.14.3
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 7/8] drm/i915/icp: add ICP gmbus and gpio support
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
` (5 preceding siblings ...)
2018-01-11 18:00 ` [PATCH 6/8] drm/i915/icp: Add backlight Support for ICP Paulo Zanoni
@ 2018-01-11 18:00 ` Paulo Zanoni
2018-01-11 18:00 ` [PATCH 8/8] drm/i915/icp: Add the ID for ICL PCH - ICP Paulo Zanoni
` (5 subsequent siblings)
12 siblings, 0 replies; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-11 18:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula, Paulo Zanoni
From: Anusha Srivatsa <anusha.srivatsa@intel.com>
In ICP, there are three TC ports and 3 DDI ports.
v2:
- Correct Pin mapping.
v3:
- Update pin mapping into per platform implementation
rather than previous approach of port wise mapping.
v4:
- Update GMBUS_NUM_PINS (Paulo)
v5:
- rebase.
v6:
- Update function name, GMBUS_PIN_NUM (Paulo)
v7 (from Paulo):
- Make it apply.
v8 (from Paulo):
- Maintain consistent if ladder ordering.
Suggested by: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 7 ++++++-
drivers/gpu/drm/i915/intel_hdmi.c | 33 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_i2c.c | 17 +++++++++++++++--
3 files changed, 54 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f756512041c6..698e1649f287 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3064,7 +3064,12 @@ enum i915_power_well_id {
#define GMBUS_PIN_2_BXT 2
#define GMBUS_PIN_3_BXT 3
#define GMBUS_PIN_4_CNP 4
-#define GMBUS_NUM_PINS 7 /* including 0 */
+#define GMBUS_PIN_9_TC1_ICP 9
+#define GMBUS_PIN_10_TC2_ICP 10
+#define GMBUS_PIN_11_TC3_ICP 11
+#define GMBUS_PIN_12_TC4_ICP 12
+
+#define GMBUS_NUM_PINS 13 /* including 0 */
#define GMBUS1 _MMIO(dev_priv->gpio_mmio_base + 0x5104) /* command/status */
#define GMBUS_SW_CLR_INT (1<<31)
#define GMBUS_SW_RDY (1<<30)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 691f15b59124..d3212afe1eba 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -2183,6 +2183,37 @@ static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv,
return ddc_pin;
}
+static u8 icl_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)
+{
+ u8 ddc_pin;
+
+ switch (port) {
+ case PORT_A:
+ ddc_pin = GMBUS_PIN_1_BXT;
+ break;
+ case PORT_B:
+ ddc_pin = GMBUS_PIN_2_BXT;
+ break;
+ case PORT_C:
+ ddc_pin = GMBUS_PIN_9_TC1_ICP;
+ break;
+ case PORT_D:
+ ddc_pin = GMBUS_PIN_10_TC2_ICP;
+ break;
+ case PORT_E:
+ ddc_pin = GMBUS_PIN_11_TC3_ICP;
+ break;
+ case PORT_F:
+ ddc_pin = GMBUS_PIN_12_TC4_ICP;
+ break;
+ default:
+ MISSING_CASE(port);
+ ddc_pin = GMBUS_PIN_2_BXT;
+ break;
+ }
+ return ddc_pin;
+}
+
static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv,
enum port port)
{
@@ -2225,6 +2256,8 @@ static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
ddc_pin = bxt_port_to_ddc_pin(dev_priv, port);
else if (HAS_PCH_CNP(dev_priv))
ddc_pin = cnp_port_to_ddc_pin(dev_priv, port);
+ else if (IS_ICELAKE(dev_priv))
+ ddc_pin = icl_port_to_ddc_pin(dev_priv, port);
else
ddc_pin = g4x_port_to_ddc_pin(dev_priv, port);
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 6f7ef4e225ee..e6875509bcd9 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -76,11 +76,22 @@ static const struct gmbus_pin gmbus_pins_cnp[] = {
[GMBUS_PIN_4_CNP] = { "dpd", GPIOE },
};
+static const struct gmbus_pin gmbus_pins_icp[] = {
+ [GMBUS_PIN_1_BXT] = { "dpa", GPIOA },
+ [GMBUS_PIN_2_BXT] = { "dpb", GPIOB },
+ [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOC },
+ [GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIOD },
+ [GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIOE },
+ [GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIOF },
+};
+
/* pin is expected to be valid */
static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *dev_priv,
unsigned int pin)
{
- if (HAS_PCH_CNP(dev_priv))
+ if (HAS_PCH_ICP(dev_priv))
+ return &gmbus_pins_icp[pin];
+ else if (HAS_PCH_CNP(dev_priv))
return &gmbus_pins_cnp[pin];
else if (IS_GEN9_LP(dev_priv))
return &gmbus_pins_bxt[pin];
@@ -97,7 +108,9 @@ bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,
{
unsigned int size;
- if (HAS_PCH_CNP(dev_priv))
+ if (HAS_PCH_ICP(dev_priv))
+ size = ARRAY_SIZE(gmbus_pins_icp);
+ else if (HAS_PCH_CNP(dev_priv))
size = ARRAY_SIZE(gmbus_pins_cnp);
else if (IS_GEN9_LP(dev_priv))
size = ARRAY_SIZE(gmbus_pins_bxt);
--
2.14.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 8/8] drm/i915/icp: Add the ID for ICL PCH - ICP
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
` (6 preceding siblings ...)
2018-01-11 18:00 ` [PATCH 7/8] drm/i915/icp: add ICP gmbus and gpio support Paulo Zanoni
@ 2018-01-11 18:00 ` Paulo Zanoni
2018-01-11 18:25 ` ✓ Fi.CI.BAT: success for ICP initial support Patchwork
` (4 subsequent siblings)
12 siblings, 0 replies; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-11 18:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Fei, Paulo Zanoni, Li
From: Anusha Srivatsa <anusha.srivatsa@intel.com>
Add the PCI ID for the ICL PCH - ICP.
v2: rebased.
v3: rebased.
v4: fix ICP name.
v5: fix the ID mask (Fei Li).
v6 (from Paulo): bikesheds.
Cc: Li, Fei <fei.li@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 4 ++++
drivers/gpu/drm/i915/i915_drv.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6c8da9d20c33..95071a1e875b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -252,6 +252,10 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n");
WARN_ON(!IS_CANNONLAKE(dev_priv) &&
!IS_COFFEELAKE(dev_priv));
+ } else if (id == INTEL_PCH_ICP_DEVICE_ID_TYPE) {
+ dev_priv->pch_type = PCH_ICP;
+ DRM_DEBUG_KMS("Found Ice Lake PCH\n");
+ WARN_ON(!IS_ICELAKE(dev_priv));
} else if (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
(id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 482517af58f6..e0c6f1f4bafd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2846,6 +2846,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define INTEL_PCH_KBP_DEVICE_ID_TYPE 0xA280
#define INTEL_PCH_CNP_DEVICE_ID_TYPE 0xA300
#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE 0x9D80
+#define INTEL_PCH_ICP_DEVICE_ID_TYPE 0x3480
#define INTEL_PCH_P2X_DEVICE_ID_TYPE 0x7100
#define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000
#define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35 has 2918 */
--
2.14.3
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 26+ messages in thread
* ✓ Fi.CI.BAT: success for ICP initial support
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
` (7 preceding siblings ...)
2018-01-11 18:00 ` [PATCH 8/8] drm/i915/icp: Add the ID for ICL PCH - ICP Paulo Zanoni
@ 2018-01-11 18:25 ` Patchwork
2018-01-11 19:17 ` ✓ Fi.CI.IGT: " Patchwork
` (3 subsequent siblings)
12 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2018-01-11 18:25 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: intel-gfx
== Series Details ==
Series: ICP initial support
URL : https://patchwork.freedesktop.org/series/36350/
State : success
== Summary ==
Series 36350v1 ICP initial support
https://patchwork.freedesktop.org/api/1.0/series/36350/revisions/1/mbox/
Test debugfs_test:
Subgroup read_all_entries:
fail -> PASS (fi-elk-e7500) fdo#103989
incomplete -> PASS (fi-snb-2520m) fdo#103713
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
fail -> PASS (fi-gdg-551) fdo#102575
fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:419s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:425s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:373s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:491s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:280s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:481s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:486s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:466s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:452s
fi-elk-e7500 total:224 pass:168 dwarn:10 dfail:0 fail:0 skip:45
fi-gdg-551 total:288 pass:180 dwarn:0 dfail:0 fail:0 skip:108 time:271s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:513s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:390s
fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:401s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:411s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:460s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:411s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:467s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:499s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:451s
fi-kbl-r total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:503s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:581s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:429s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:510s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:532s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:494s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:480s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:432s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:530s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:395s
Blacklisted hosts:
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:568s
fi-glk-dsi total:288 pass:257 dwarn:0 dfail:0 fail:1 skip:30 time:487s
fi-cnl-y2 failed to collect. IGT log at Patchwork_7652/fi-cnl-y2/igt.log
dbc7615897f6cbe121a316b4209b278407cb2eb4 drm-tip: 2018y-01m-11d-16h-49m-38s UTC integration manifest
2fe9e815bb0b drm/i915/icp: Add the ID for ICL PCH - ICP
a44a57cf52df drm/i915/icp: add ICP gmbus and gpio support
5c79b9a3856e drm/i915/icp: Add backlight Support for ICP
8dd9bdee33e6 drm/i915/icp: Add Panel Power Sequencing Support
4b221f1e5a65 drm/i915/icp: Get/set proper Raw clock frequency on ICP
05c7311d391a drm/i915/icp: Introduce Ice Lake PCH
09ae110fc4bb drm/i915/icl: Add initial Icelake definitions.
71e6a3f6aa93 drm/i915/cnl: Add Port F definition.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7652/issues.html
_______________________________________________
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^ permalink raw reply [flat|nested] 26+ messages in thread
* ✓ Fi.CI.IGT: success for ICP initial support
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
` (8 preceding siblings ...)
2018-01-11 18:25 ` ✓ Fi.CI.BAT: success for ICP initial support Patchwork
@ 2018-01-11 19:17 ` Patchwork
2018-01-19 19:48 ` ✓ Fi.CI.BAT: success for ICP initial support (rev2) Patchwork
` (2 subsequent siblings)
12 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2018-01-11 19:17 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: intel-gfx
== Series Details ==
Series: ICP initial support
URL : https://patchwork.freedesktop.org/series/36350/
State : success
== Summary ==
Test kms_atomic_transition:
Subgroup plane-all-modeset-transition-fencing:
dmesg-warn -> PASS (shard-hsw) fdo#102614 +1
Test gem_tiled_swapping:
Subgroup non-threaded:
pass -> INCOMPLETE (shard-snb) fdo#104218 +1
Test kms_flip:
Subgroup flip-vs-panning-vs-hang:
dmesg-warn -> PASS (shard-snb) fdo#103821
Test gem_eio:
Subgroup in-flight:
dmesg-warn -> PASS (shard-snb) fdo#104058
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#104218 https://bugs.freedesktop.org/show_bug.cgi?id=104218
fdo#103821 https://bugs.freedesktop.org/show_bug.cgi?id=103821
fdo#104058 https://bugs.freedesktop.org/show_bug.cgi?id=104058
shard-hsw total:2643 pass:1497 dwarn:2 dfail:0 fail:6 skip:1137 time:8871s
shard-snb total:2643 pass:1273 dwarn:1 dfail:0 fail:8 skip:1360 time:7722s
Blacklisted hosts:
shard-apl total:2691 pass:1664 dwarn:1 dfail:0 fail:23 skip:1001 time:13133s
shard-kbl total:2709 pass:1807 dwarn:1 dfail:0 fail:23 skip:877 time:10316s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7652/shards.html
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^ permalink raw reply [flat|nested] 26+ messages in thread
* ✓ Fi.CI.BAT: success for ICP initial support (rev2)
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
` (9 preceding siblings ...)
2018-01-11 19:17 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-01-19 19:48 ` Patchwork
2018-01-19 20:20 ` [PATCH 0/8] ICP initial support Paulo Zanoni
2018-01-20 3:33 ` ✓ Fi.CI.IGT: success for ICP initial support (rev2) Patchwork
12 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2018-01-19 19:48 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: intel-gfx
== Series Details ==
Series: ICP initial support (rev2)
URL : https://patchwork.freedesktop.org/series/36350/
State : success
== Summary ==
Series 36350v2 ICP initial support
https://patchwork.freedesktop.org/api/1.0/series/36350/revisions/2/mbox/
Test debugfs_test:
Subgroup read_all_entries:
dmesg-fail -> PASS (fi-elk-e7500) fdo#103989 +2
fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:426s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:443s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:383s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:524s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:293s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:500s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:502s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:494s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:480s
fi-elk-e7500 total:224 pass:168 dwarn:10 dfail:0 fail:0 skip:45
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:306s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:528s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:396s
fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:406s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:426s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:462s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:421s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:465s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:504s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:461s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:512s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:641s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:435s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:524s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:536s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:493s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:505s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:542s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:409s
Blacklisted hosts:
fi-cfl-s2 total:288 pass:256 dwarn:0 dfail:0 fail:3 skip:26 time:568s
fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:490s
fi-skl-guc total:288 pass:221 dwarn:39 dfail:0 fail:0 skip:28 time:419s
a0584e868ec718af8a385cbae61fee0b25bdfd22 drm-tip: 2018y-01m-19d-18h-21m-15s UTC integration manifest
fab9e398bf3d drm/i915/icp: Add the ID for ICL PCH - ICP
9ad3e0909344 drm/i915/icp: add ICP gmbus and gpio support
af6b3f70f539 drm/i915/icp: Add backlight Support for ICP
d71632a5960b drm/i915/icp: Add Panel Power Sequencing Support
428295d9ce61 drm/i915/icp: Get/set proper Raw clock frequency on ICP
8d623eefe66c drm/i915/icp: Introduce Ice Lake PCH
13193af7921c drm/i915/icl: Add initial Icelake definitions.
affa7c0aee2a drm/i915/cnl: Add Port F definition.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7728/issues.html
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 0/8] ICP initial support
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
` (10 preceding siblings ...)
2018-01-19 19:48 ` ✓ Fi.CI.BAT: success for ICP initial support (rev2) Patchwork
@ 2018-01-19 20:20 ` Paulo Zanoni
2018-01-20 3:33 ` ✓ Fi.CI.IGT: success for ICP initial support (rev2) Patchwork
12 siblings, 0 replies; 26+ messages in thread
From: Paulo Zanoni @ 2018-01-19 20:20 UTC (permalink / raw)
To: intel-gfx
Em Qui, 2018-01-11 às 16:00 -0200, Paulo Zanoni escreveu:
> Hi
>
> This series adds the initial support for ICP. No conflicts with the
> other
> series. Patches 1 and 2 are parts of other series that we've already
> been
> discussing on this mailing list, but I put them here so CI can do the
> right
> thing.
>
> I have just re-reviewed all of Anusha's patches and my reviewed-by
> tags still
> stand, which means every patch on this series has a r-b tag. I'll let
> the series
> sit on the mailing list for a while before merging, just in case
> someone else
> has something to say.
>
> The one thing missing for complete ICP support is the patch that adds
> the
> interrupts, but that requires code from other series (including the
> GEM one
> currently under review), so it will be sent later.
Series merged. Thanks everybody for the help.
>
> Thanks,
> Paulo
>
> Anusha Srivatsa (6):
> drm/i915/icp: Introduce Ice Lake PCH
> drm/i915/icp: Get/set proper Raw clock frequency on ICP
> drm/i915/icp: Add Panel Power Sequencing Support
> drm/i915/icp: Add backlight Support for ICP
> drm/i915/icp: add ICP gmbus and gpio support
> drm/i915/icp: Add the ID for ICL PCH - ICP
>
> Rodrigo Vivi (2):
> drm/i915/cnl: Add Port F definition.
> drm/i915/icl: Add initial Icelake definitions.
>
> drivers/gpu/drm/i915/i915_drv.c | 4 ++++
> drivers/gpu/drm/i915/i915_drv.h | 5 +++++
> drivers/gpu/drm/i915/i915_pci.c | 13 +++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 9 ++++++++-
> drivers/gpu/drm/i915/intel_bios.c | 9 +++++++++
> drivers/gpu/drm/i915/intel_cdclk.c | 29
> ++++++++++++++++++++++++++--
> drivers/gpu/drm/i915/intel_device_info.c | 1 +
> drivers/gpu/drm/i915/intel_device_info.h | 2 ++
> drivers/gpu/drm/i915/intel_display.h | 1 +
> drivers/gpu/drm/i915/intel_dp.c | 20 +++++++++++++------
> drivers/gpu/drm/i915/intel_hdmi.c | 33
> ++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_i2c.c | 17 ++++++++++++++--
> drivers/gpu/drm/i915/intel_panel.c | 2 +-
> drivers/gpu/drm/i915/intel_vbt_defs.h | 2 ++
> include/drm/i915_component.h | 3 +--
> 15 files changed, 136 insertions(+), 14 deletions(-)
>
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^ permalink raw reply [flat|nested] 26+ messages in thread
* ✓ Fi.CI.IGT: success for ICP initial support (rev2)
2018-01-11 18:00 [PATCH 0/8] ICP initial support Paulo Zanoni
` (11 preceding siblings ...)
2018-01-19 20:20 ` [PATCH 0/8] ICP initial support Paulo Zanoni
@ 2018-01-20 3:33 ` Patchwork
12 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2018-01-20 3:33 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: intel-gfx
== Series Details ==
Series: ICP initial support (rev2)
URL : https://patchwork.freedesktop.org/series/36350/
State : success
== Summary ==
Test kms_flip:
Subgroup 2x-vblank-vs-dpms-suspend:
skip -> PASS (shard-hsw)
Subgroup plain-flip-fb-recreate:
fail -> PASS (shard-apl) fdo#100368
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
fail -> PASS (shard-snb) fdo#101623
Test perf:
Subgroup enable-disable:
fail -> PASS (shard-apl) fdo#103715
Subgroup oa-exponents:
pass -> FAIL (shard-apl) fdo#102254
Subgroup buffer-fill:
fail -> PASS (shard-apl) fdo#103755
Test gem_tiled_swapping:
Subgroup non-threaded:
incomplete -> PASS (shard-hsw) fdo#104218
Test testdisplay:
dmesg-warn -> PASS (shard-apl)
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103715 https://bugs.freedesktop.org/show_bug.cgi?id=103715
fdo#102254 https://bugs.freedesktop.org/show_bug.cgi?id=102254
fdo#103755 https://bugs.freedesktop.org/show_bug.cgi?id=103755
fdo#104218 https://bugs.freedesktop.org/show_bug.cgi?id=104218
shard-apl total:2780 pass:1716 dwarn:1 dfail:0 fail:23 skip:1040 time:14777s
shard-hsw total:2780 pass:1724 dwarn:1 dfail:0 fail:12 skip:1042 time:15636s
shard-snb total:2780 pass:1316 dwarn:1 dfail:0 fail:13 skip:1450 time:8066s
Blacklisted hosts:
shard-kbl total:2702 pass:1777 dwarn:1 dfail:0 fail:24 skip:900 time:10707s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7728/shards.html
_______________________________________________
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^ permalink raw reply [flat|nested] 26+ messages in thread