* [PATCH 1/3] MIPS: lantiq: fix danube usb clock
@ 2018-03-11 17:41 Hauke Mehrtens
2018-03-11 17:41 ` [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB Hauke Mehrtens
` (3 more replies)
0 siblings, 4 replies; 17+ messages in thread
From: Hauke Mehrtens @ 2018-03-11 17:41 UTC (permalink / raw)
To: ralf, jhogan; +Cc: john, dev, linux-mips, martin.blumenstingl
From: Mathias Kresin <dev@kresin.me>
On danube the USB0 registers are at 1e101000 similar to all other lantiq
SoCs.
Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module")
Signed-off-by: Mathias Kresin <dev@kresin.me>
---
arch/mips/lantiq/xway/sysctrl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
index 52500d3b7004..f11f1dd10493 100644
--- a/arch/mips/lantiq/xway/sysctrl.c
+++ b/arch/mips/lantiq/xway/sysctrl.c
@@ -560,7 +560,7 @@ void __init ltq_soc_init(void)
} else {
clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(),
ltq_danube_fpi_hz(), ltq_danube_pp32_hz());
- clkdev_add_pmu("1f203018.usb2-phy", "ctrl", 1, 0, PMU_USB0);
+ clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P);
clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
--
2.11.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB 2018-03-11 17:41 [PATCH 1/3] MIPS: lantiq: fix danube usb clock Hauke Mehrtens @ 2018-03-11 17:41 ` Hauke Mehrtens 2018-03-12 20:41 ` Martin Blumenstingl ` (2 more replies) 2018-03-11 17:41 ` [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON Hauke Mehrtens ` (2 subsequent siblings) 3 siblings, 3 replies; 17+ messages in thread From: Hauke Mehrtens @ 2018-03-11 17:41 UTC (permalink / raw) To: ralf, jhogan; +Cc: john, dev, linux-mips, martin.blumenstingl From: Mathias Kresin <dev@kresin.me> On Danube and AR9 the USB core is connected to the AHB bus, hence we need to enable the AHB Bus as well. Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") Signed-off-by: Mathias Kresin <dev@kresin.me> --- arch/mips/lantiq/xway/sysctrl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c index f11f1dd10493..e0af39b33e28 100644 --- a/arch/mips/lantiq/xway/sysctrl.c +++ b/arch/mips/lantiq/xway/sysctrl.c @@ -549,9 +549,9 @@ void __init ltq_soc_init(void) clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), ltq_ar9_fpi_hz(), CLOCK_250M); clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); - clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P); - clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1); + clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM); clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH); clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); @@ -560,7 +560,7 @@ void __init ltq_soc_init(void) } else { clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(), ltq_danube_fpi_hz(), ltq_danube_pp32_hz()); - clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); -- 2.11.0 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB 2018-03-11 17:41 ` [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB Hauke Mehrtens @ 2018-03-12 20:41 ` Martin Blumenstingl 2018-03-12 21:17 ` James Hogan 2018-03-12 21:27 ` Hauke Mehrtens 2 siblings, 0 replies; 17+ messages in thread From: Martin Blumenstingl @ 2018-03-12 20:41 UTC (permalink / raw) To: Hauke Mehrtens; +Cc: ralf, jhogan, john, dev, linux-mips On Sun, Mar 11, 2018 at 6:41 PM, Hauke Mehrtens <hauke@hauke-m.de> wrote: > From: Mathias Kresin <dev@kresin.me> > > On Danube and AR9 the USB core is connected to the AHB bus, hence we need > to enable the AHB Bus as well. > > Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") > Signed-off-by: Mathias Kresin <dev@kresin.me> Acked-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com> I don't have a device to test this, but Mathias and Hauke did test this on real hardware however, it looks sane since the xRX200 ("vr9") code does the same thing > --- > arch/mips/lantiq/xway/sysctrl.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c > index f11f1dd10493..e0af39b33e28 100644 > --- a/arch/mips/lantiq/xway/sysctrl.c > +++ b/arch/mips/lantiq/xway/sysctrl.c > @@ -549,9 +549,9 @@ void __init ltq_soc_init(void) > clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), > ltq_ar9_fpi_hz(), CLOCK_250M); > clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); > - clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); > + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); > clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P); > - clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1); > + clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM); > clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH); > clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); > clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); > @@ -560,7 +560,7 @@ void __init ltq_soc_init(void) > } else { > clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(), > ltq_danube_fpi_hz(), ltq_danube_pp32_hz()); > - clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); > + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); > clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); > clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); > clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); > -- > 2.11.0 > ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB 2018-03-11 17:41 ` [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB Hauke Mehrtens 2018-03-12 20:41 ` Martin Blumenstingl @ 2018-03-12 21:17 ` James Hogan 2018-03-12 21:29 ` Martin Blumenstingl 2018-03-12 21:27 ` Hauke Mehrtens 2 siblings, 1 reply; 17+ messages in thread From: James Hogan @ 2018-03-12 21:17 UTC (permalink / raw) To: Hauke Mehrtens; +Cc: ralf, john, dev, linux-mips, martin.blumenstingl [-- Attachment #1: Type: text/plain, Size: 1276 bytes --] Hi, On Sun, Mar 11, 2018 at 06:41:22PM +0100, Hauke Mehrtens wrote: > From: Mathias Kresin <dev@kresin.me> > > On Danube and AR9 the USB core is connected to the AHB bus, hence we need > to enable the AHB Bus as well. > > Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") > Signed-off-by: Mathias Kresin <dev@kresin.me> Hauke: I think this needs your SoB line too (same for other 2 patches too). > --- > arch/mips/lantiq/xway/sysctrl.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c > index f11f1dd10493..e0af39b33e28 100644 > --- a/arch/mips/lantiq/xway/sysctrl.c > +++ b/arch/mips/lantiq/xway/sysctrl.c > @@ -549,9 +549,9 @@ void __init ltq_soc_init(void) > clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), > ltq_ar9_fpi_hz(), CLOCK_250M); > clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); > - clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); > + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); Checkpatch complains about these changed lines all being >80 columns, though there are admittedly other violations nearby too. Cheers James [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB 2018-03-12 21:17 ` James Hogan @ 2018-03-12 21:29 ` Martin Blumenstingl 2018-03-12 21:38 ` Hauke Mehrtens 0 siblings, 1 reply; 17+ messages in thread From: Martin Blumenstingl @ 2018-03-12 21:29 UTC (permalink / raw) To: James Hogan; +Cc: Hauke Mehrtens, ralf, john, dev, linux-mips Hi James, On Mon, Mar 12, 2018 at 10:17 PM, James Hogan <jhogan@kernel.org> wrote: > Hi, > > On Sun, Mar 11, 2018 at 06:41:22PM +0100, Hauke Mehrtens wrote: >> From: Mathias Kresin <dev@kresin.me> >> >> On Danube and AR9 the USB core is connected to the AHB bus, hence we need >> to enable the AHB Bus as well. >> >> Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") >> Signed-off-by: Mathias Kresin <dev@kresin.me> > > Hauke: I think this needs your SoB line too (same for other 2 patches > too). > >> --- >> arch/mips/lantiq/xway/sysctrl.c | 6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c >> index f11f1dd10493..e0af39b33e28 100644 >> --- a/arch/mips/lantiq/xway/sysctrl.c >> +++ b/arch/mips/lantiq/xway/sysctrl.c >> @@ -549,9 +549,9 @@ void __init ltq_soc_init(void) >> clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), >> ltq_ar9_fpi_hz(), CLOCK_250M); >> clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); >> - clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); >> + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); > > Checkpatch complains about these changed lines all being >80 columns, > though there are admittedly other violations nearby too. I suggest to keep it as suggested by Mathias/Hauke. our (Hauke and my) plan is to remove the whole file and replace it with a driver based on the common clock framework (in drivers/clk/) mid-term. in my opinion this is better than just fixing the 80 column limit Regards Martin ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB 2018-03-12 21:29 ` Martin Blumenstingl @ 2018-03-12 21:38 ` Hauke Mehrtens 2018-03-12 21:44 ` James Hogan 0 siblings, 1 reply; 17+ messages in thread From: Hauke Mehrtens @ 2018-03-12 21:38 UTC (permalink / raw) To: Martin Blumenstingl, James Hogan; +Cc: ralf, john, dev, linux-mips Hi James, On 03/12/2018 10:29 PM, Martin Blumenstingl wrote: > Hi James, > > On Mon, Mar 12, 2018 at 10:17 PM, James Hogan <jhogan@kernel.org> wrote: >> Hi, >> >> On Sun, Mar 11, 2018 at 06:41:22PM +0100, Hauke Mehrtens wrote: >>> From: Mathias Kresin <dev@kresin.me> >>> >>> On Danube and AR9 the USB core is connected to the AHB bus, hence we need >>> to enable the AHB Bus as well. >>> >>> Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") >>> Signed-off-by: Mathias Kresin <dev@kresin.me> >> >> Hauke: I think this needs your SoB line too (same for other 2 patches >> too). Sorry, I forgot this before sending the patches, I send it now. >> >>> --- >>> arch/mips/lantiq/xway/sysctrl.c | 6 +++--- >>> 1 file changed, 3 insertions(+), 3 deletions(-) >>> >>> diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c >>> index f11f1dd10493..e0af39b33e28 100644 >>> --- a/arch/mips/lantiq/xway/sysctrl.c >>> +++ b/arch/mips/lantiq/xway/sysctrl.c >>> @@ -549,9 +549,9 @@ void __init ltq_soc_init(void) >>> clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), >>> ltq_ar9_fpi_hz(), CLOCK_250M); >>> clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); >>> - clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); >>> + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); >> >> Checkpatch complains about these changed lines all being >80 columns, >> though there are admittedly other violations nearby too. > I suggest to keep it as suggested by Mathias/Hauke. > our (Hauke and my) plan is to remove the whole file and replace it > with a driver based on the common clock framework (in drivers/clk/) > mid-term. in my opinion this is better than just fixing the 80 column > limit I agree with Martin. I think this code is better readable when we do not break it, but I can also send an updated version of this patch. Hauke ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB 2018-03-12 21:38 ` Hauke Mehrtens @ 2018-03-12 21:44 ` James Hogan 0 siblings, 0 replies; 17+ messages in thread From: James Hogan @ 2018-03-12 21:44 UTC (permalink / raw) To: Hauke Mehrtens; +Cc: Martin Blumenstingl, ralf, john, dev, linux-mips [-- Attachment #1: Type: text/plain, Size: 2244 bytes --] On Mon, Mar 12, 2018 at 10:38:17PM +0100, Hauke Mehrtens wrote: > Hi James, > > On 03/12/2018 10:29 PM, Martin Blumenstingl wrote: > > Hi James, > > > > On Mon, Mar 12, 2018 at 10:17 PM, James Hogan <jhogan@kernel.org> wrote: > >> Hi, > >> > >> On Sun, Mar 11, 2018 at 06:41:22PM +0100, Hauke Mehrtens wrote: > >>> From: Mathias Kresin <dev@kresin.me> > >>> > >>> On Danube and AR9 the USB core is connected to the AHB bus, hence we need > >>> to enable the AHB Bus as well. > >>> > >>> Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") > >>> Signed-off-by: Mathias Kresin <dev@kresin.me> > >> > >> Hauke: I think this needs your SoB line too (same for other 2 patches > >> too). > > Sorry, I forgot this before sending the patches, I send it now. Thanks, I can add them if there are no other changes to make. > > >> > >>> --- > >>> arch/mips/lantiq/xway/sysctrl.c | 6 +++--- > >>> 1 file changed, 3 insertions(+), 3 deletions(-) > >>> > >>> diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c > >>> index f11f1dd10493..e0af39b33e28 100644 > >>> --- a/arch/mips/lantiq/xway/sysctrl.c > >>> +++ b/arch/mips/lantiq/xway/sysctrl.c > >>> @@ -549,9 +549,9 @@ void __init ltq_soc_init(void) > >>> clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), > >>> ltq_ar9_fpi_hz(), CLOCK_250M); > >>> clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); > >>> - clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); > >>> + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); > >> > >> Checkpatch complains about these changed lines all being >80 columns, > >> though there are admittedly other violations nearby too. > > I suggest to keep it as suggested by Mathias/Hauke. > > our (Hauke and my) plan is to remove the whole file and replace it > > with a driver based on the common clock framework (in drivers/clk/) > > mid-term. in my opinion this is better than just fixing the 80 column > > limit > > I agree with Martin. I think this code is better readable when we do not > break it Find by me. Thanks James [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB 2018-03-11 17:41 ` [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB Hauke Mehrtens 2018-03-12 20:41 ` Martin Blumenstingl 2018-03-12 21:17 ` James Hogan @ 2018-03-12 21:27 ` Hauke Mehrtens 2 siblings, 0 replies; 17+ messages in thread From: Hauke Mehrtens @ 2018-03-12 21:27 UTC (permalink / raw) To: ralf, jhogan; +Cc: john, dev, linux-mips, martin.blumenstingl On 03/11/2018 06:41 PM, Hauke Mehrtens wrote: > From: Mathias Kresin <dev@kresin.me> > > On Danube and AR9 the USB core is connected to the AHB bus, hence we need > to enable the AHB Bus as well. > > Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") > Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> > --- > arch/mips/lantiq/xway/sysctrl.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c > index f11f1dd10493..e0af39b33e28 100644 > --- a/arch/mips/lantiq/xway/sysctrl.c > +++ b/arch/mips/lantiq/xway/sysctrl.c > @@ -549,9 +549,9 @@ void __init ltq_soc_init(void) > clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), > ltq_ar9_fpi_hz(), CLOCK_250M); > clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); > - clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); > + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); > clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P); > - clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1); > + clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM); > clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH); > clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); > clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); > @@ -560,7 +560,7 @@ void __init ltq_soc_init(void) > } else { > clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(), > ltq_danube_fpi_hz(), ltq_danube_pp32_hz()); > - clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); > + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); > clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); > clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); > clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); > ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON 2018-03-11 17:41 [PATCH 1/3] MIPS: lantiq: fix danube usb clock Hauke Mehrtens 2018-03-11 17:41 ` [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB Hauke Mehrtens @ 2018-03-11 17:41 ` Hauke Mehrtens 2018-03-12 20:39 ` Martin Blumenstingl ` (2 more replies) 2018-03-12 20:39 ` [PATCH 1/3] MIPS: lantiq: fix danube usb clock Martin Blumenstingl 2018-03-12 21:27 ` Hauke Mehrtens 3 siblings, 3 replies; 17+ messages in thread From: Hauke Mehrtens @ 2018-03-11 17:41 UTC (permalink / raw) To: ralf, jhogan; +Cc: john, dev, linux-mips, martin.blumenstingl From: Mathias Kresin <dev@kresin.me> Enable syscon to use it for the RCU MFD on Amazon SE as well. Fixes: 2b6639d4c794 ("MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD") Signed-off-by: Mathias Kresin <dev@kresin.me> --- arch/mips/lantiq/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig index 692ae85a3e3d..8e3a1fc2bc39 100644 --- a/arch/mips/lantiq/Kconfig +++ b/arch/mips/lantiq/Kconfig @@ -13,6 +13,8 @@ choice config SOC_AMAZON_SE bool "Amazon SE" select SOC_TYPE_XWAY + select MFD_SYSCON + select MFD_CORE config SOC_XWAY bool "XWAY" -- 2.11.0 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON 2018-03-11 17:41 ` [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON Hauke Mehrtens @ 2018-03-12 20:39 ` Martin Blumenstingl 2018-03-12 21:27 ` Hauke Mehrtens 2018-03-12 21:39 ` James Hogan 2 siblings, 0 replies; 17+ messages in thread From: Martin Blumenstingl @ 2018-03-12 20:39 UTC (permalink / raw) To: Hauke Mehrtens; +Cc: ralf, jhogan, john, dev, linux-mips On Sun, Mar 11, 2018 at 6:41 PM, Hauke Mehrtens <hauke@hauke-m.de> wrote: > From: Mathias Kresin <dev@kresin.me> > > Enable syscon to use it for the RCU MFD on Amazon SE as well. > > Fixes: 2b6639d4c794 ("MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD") > Signed-off-by: Mathias Kresin <dev@kresin.me> Acked-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com> > --- > arch/mips/lantiq/Kconfig | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig > index 692ae85a3e3d..8e3a1fc2bc39 100644 > --- a/arch/mips/lantiq/Kconfig > +++ b/arch/mips/lantiq/Kconfig > @@ -13,6 +13,8 @@ choice > config SOC_AMAZON_SE > bool "Amazon SE" > select SOC_TYPE_XWAY > + select MFD_SYSCON > + select MFD_CORE > > config SOC_XWAY > bool "XWAY" > -- > 2.11.0 > ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON 2018-03-11 17:41 ` [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON Hauke Mehrtens 2018-03-12 20:39 ` Martin Blumenstingl @ 2018-03-12 21:27 ` Hauke Mehrtens 2018-03-12 21:39 ` James Hogan 2 siblings, 0 replies; 17+ messages in thread From: Hauke Mehrtens @ 2018-03-12 21:27 UTC (permalink / raw) To: ralf, jhogan; +Cc: john, dev, linux-mips, martin.blumenstingl On 03/11/2018 06:41 PM, Hauke Mehrtens wrote: > From: Mathias Kresin <dev@kresin.me> > > Enable syscon to use it for the RCU MFD on Amazon SE as well. > > Fixes: 2b6639d4c794 ("MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD") > Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> > --- > arch/mips/lantiq/Kconfig | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig > index 692ae85a3e3d..8e3a1fc2bc39 100644 > --- a/arch/mips/lantiq/Kconfig > +++ b/arch/mips/lantiq/Kconfig > @@ -13,6 +13,8 @@ choice > config SOC_AMAZON_SE > bool "Amazon SE" > select SOC_TYPE_XWAY > + select MFD_SYSCON > + select MFD_CORE > > config SOC_XWAY > bool "XWAY" > ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON 2018-03-11 17:41 ` [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON Hauke Mehrtens 2018-03-12 20:39 ` Martin Blumenstingl 2018-03-12 21:27 ` Hauke Mehrtens @ 2018-03-12 21:39 ` James Hogan 2018-03-13 22:40 ` Hauke Mehrtens 2 siblings, 1 reply; 17+ messages in thread From: James Hogan @ 2018-03-12 21:39 UTC (permalink / raw) To: Hauke Mehrtens; +Cc: ralf, john, dev, linux-mips, martin.blumenstingl [-- Attachment #1: Type: text/plain, Size: 726 bytes --] On Sun, Mar 11, 2018 at 06:41:23PM +0100, Hauke Mehrtens wrote: > From: Mathias Kresin <dev@kresin.me> > > Enable syscon to use it for the RCU MFD on Amazon SE as well. > > Fixes: 2b6639d4c794 ("MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD") > Signed-off-by: Mathias Kresin <dev@kresin.me> I'm just trying to dig around to find some context. Just a bit more information to say what DT / driver / device this helps with would make all the difference :) Does this directly benefit mainline (maybe for DTs other than those in arch/mips/boot/dts/), or is it mainly for the sake of out-of-tree code? Do you want it tagged for stable backports, and if so how far back? Cheers James [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON 2018-03-12 21:39 ` James Hogan @ 2018-03-13 22:40 ` Hauke Mehrtens 2018-03-14 11:45 ` James Hogan 0 siblings, 1 reply; 17+ messages in thread From: Hauke Mehrtens @ 2018-03-13 22:40 UTC (permalink / raw) To: James Hogan; +Cc: ralf, john, dev, linux-mips, martin.blumenstingl On 03/12/2018 10:39 PM, James Hogan wrote: > On Sun, Mar 11, 2018 at 06:41:23PM +0100, Hauke Mehrtens wrote: >> From: Mathias Kresin <dev@kresin.me> >> >> Enable syscon to use it for the RCU MFD on Amazon SE as well. >> >> Fixes: 2b6639d4c794 ("MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD") >> Signed-off-by: Mathias Kresin <dev@kresin.me> > > I'm just trying to dig around to find some context. Just a bit more > information to say what DT / driver / device this helps with would make > all the difference :) > > Does this directly benefit mainline (maybe for DTs other than those > in arch/mips/boot/dts/), or is it mainly for the sake of out-of-tree > code? > > Do you want it tagged for stable backports, and if so how far back? > > Cheers > James > We changed the RCU controller drivers for kernel 4.14 and this was missing for the Amazon SE SoC. The xrx200/VR9 SoC is the successor of the Amazon SE and Danube SoC, but the older SoCs still share the architecture and many IP cores with the more recent ones. This is also relevant for upstream kernel, should I extend the descriptions of the commit messages and send a V2 of the 3 patches? Hauke ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON @ 2018-03-14 11:45 ` James Hogan 0 siblings, 0 replies; 17+ messages in thread From: James Hogan @ 2018-03-14 11:45 UTC (permalink / raw) To: Hauke Mehrtens; +Cc: ralf, john, dev, linux-mips, martin.blumenstingl [-- Attachment #1: Type: text/plain, Size: 542 bytes --] On Tue, Mar 13, 2018 at 11:40:59PM +0100, Hauke Mehrtens wrote: > We changed the RCU controller drivers for kernel 4.14 and this was > missing for the Amazon SE SoC. The xrx200/VR9 SoC is the successor of > the Amazon SE and Danube SoC, but the older SoCs still share the > architecture and many IP cores with the more recent ones. > > This is also relevant for upstream kernel, should I extend the > descriptions of the commit messages and send a V2 of the 3 patches? Yes, if you wouldn't mind, that'd be great. Thanks James [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON @ 2018-03-14 11:45 ` James Hogan 0 siblings, 0 replies; 17+ messages in thread From: James Hogan @ 2018-03-14 11:45 UTC (permalink / raw) To: Hauke Mehrtens; +Cc: ralf, john, dev, linux-mips, martin.blumenstingl [-- Attachment #1: Type: text/plain, Size: 542 bytes --] On Tue, Mar 13, 2018 at 11:40:59PM +0100, Hauke Mehrtens wrote: > We changed the RCU controller drivers for kernel 4.14 and this was > missing for the Amazon SE SoC. The xrx200/VR9 SoC is the successor of > the Amazon SE and Danube SoC, but the older SoCs still share the > architecture and many IP cores with the more recent ones. > > This is also relevant for upstream kernel, should I extend the > descriptions of the commit messages and send a V2 of the 3 patches? Yes, if you wouldn't mind, that'd be great. Thanks James [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 1/3] MIPS: lantiq: fix danube usb clock 2018-03-11 17:41 [PATCH 1/3] MIPS: lantiq: fix danube usb clock Hauke Mehrtens 2018-03-11 17:41 ` [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB Hauke Mehrtens 2018-03-11 17:41 ` [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON Hauke Mehrtens @ 2018-03-12 20:39 ` Martin Blumenstingl 2018-03-12 21:27 ` Hauke Mehrtens 3 siblings, 0 replies; 17+ messages in thread From: Martin Blumenstingl @ 2018-03-12 20:39 UTC (permalink / raw) To: Hauke Mehrtens; +Cc: ralf, jhogan, john, dev, linux-mips On Sun, Mar 11, 2018 at 6:41 PM, Hauke Mehrtens <hauke@hauke-m.de> wrote: > From: Mathias Kresin <dev@kresin.me> > > On danube the USB0 registers are at 1e101000 similar to all other lantiq > SoCs. > > Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") > Signed-off-by: Mathias Kresin <dev@kresin.me> Acked-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com> > --- > arch/mips/lantiq/xway/sysctrl.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c > index 52500d3b7004..f11f1dd10493 100644 > --- a/arch/mips/lantiq/xway/sysctrl.c > +++ b/arch/mips/lantiq/xway/sysctrl.c > @@ -560,7 +560,7 @@ void __init ltq_soc_init(void) > } else { > clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(), > ltq_danube_fpi_hz(), ltq_danube_pp32_hz()); > - clkdev_add_pmu("1f203018.usb2-phy", "ctrl", 1, 0, PMU_USB0); > + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); > clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); > clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); > clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); > -- > 2.11.0 > ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 1/3] MIPS: lantiq: fix danube usb clock 2018-03-11 17:41 [PATCH 1/3] MIPS: lantiq: fix danube usb clock Hauke Mehrtens ` (2 preceding siblings ...) 2018-03-12 20:39 ` [PATCH 1/3] MIPS: lantiq: fix danube usb clock Martin Blumenstingl @ 2018-03-12 21:27 ` Hauke Mehrtens 3 siblings, 0 replies; 17+ messages in thread From: Hauke Mehrtens @ 2018-03-12 21:27 UTC (permalink / raw) To: ralf, jhogan; +Cc: john, dev, linux-mips, martin.blumenstingl On 03/11/2018 06:41 PM, Hauke Mehrtens wrote: > From: Mathias Kresin <dev@kresin.me> > > On danube the USB0 registers are at 1e101000 similar to all other lantiq > SoCs. > > Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") > Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> > --- > arch/mips/lantiq/xway/sysctrl.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c > index 52500d3b7004..f11f1dd10493 100644 > --- a/arch/mips/lantiq/xway/sysctrl.c > +++ b/arch/mips/lantiq/xway/sysctrl.c > @@ -560,7 +560,7 @@ void __init ltq_soc_init(void) > } else { > clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(), > ltq_danube_fpi_hz(), ltq_danube_pp32_hz()); > - clkdev_add_pmu("1f203018.usb2-phy", "ctrl", 1, 0, PMU_USB0); > + clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); > clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); > clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); > clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); > ^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2018-03-14 11:46 UTC | newest] Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2018-03-11 17:41 [PATCH 1/3] MIPS: lantiq: fix danube usb clock Hauke Mehrtens 2018-03-11 17:41 ` [PATCH 2/3] MIPS: lantiq: enable AHB Bus for USB Hauke Mehrtens 2018-03-12 20:41 ` Martin Blumenstingl 2018-03-12 21:17 ` James Hogan 2018-03-12 21:29 ` Martin Blumenstingl 2018-03-12 21:38 ` Hauke Mehrtens 2018-03-12 21:44 ` James Hogan 2018-03-12 21:27 ` Hauke Mehrtens 2018-03-11 17:41 ` [PATCH 3/3] MIPS: lantiq: ase: Enable MFD_SYSCON Hauke Mehrtens 2018-03-12 20:39 ` Martin Blumenstingl 2018-03-12 21:27 ` Hauke Mehrtens 2018-03-12 21:39 ` James Hogan 2018-03-13 22:40 ` Hauke Mehrtens 2018-03-14 11:45 ` James Hogan 2018-03-14 11:45 ` James Hogan 2018-03-12 20:39 ` [PATCH 1/3] MIPS: lantiq: fix danube usb clock Martin Blumenstingl 2018-03-12 21:27 ` Hauke Mehrtens
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