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From: Borislav Petkov <bp@alien8.de>
To: Yazen Ghannam <Yazen.Ghannam@amd.com>
Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
	tony.luck@intel.com, x86@kernel.org
Subject: Re: [PATCH 1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"
Date: Mon, 26 Mar 2018 21:30:52 +0200	[thread overview]
Message-ID: <20180326193052.GJ25548@pd.tnic> (raw)
In-Reply-To: <20180326191526.64314-1-Yazen.Ghannam@amd.com>

On Mon, Mar 26, 2018 at 02:15:25PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam <yazen.ghannam@amd.com>
> 
> This reverts commit 4b1e84276a6172980c5bf39aa091ba13e90d6dad.
> 
> Software uses the valid bits to decide if the values can be used for
> further processing or other actions. So setting the valid bits will have
> software act on values that it shouldn't be acting on.
> 
> The recommendation to save all the register values does not mean that
> the values are always valid.

So what does that

"Error handlers should save the values in MCA_ADDR, MCA_MISC0,
and MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and
MCA_STATUS[SyndV] are zero."

*actually* mean then?

It is still in the PPR.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

WARNING: multiple messages have this Message-ID (diff)
From: Borislav Petkov <bp@alien8.de>
To: Yazen Ghannam <Yazen.Ghannam@amd.com>
Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
	tony.luck@intel.com, x86@kernel.org
Subject: [1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"
Date: Mon, 26 Mar 2018 21:30:52 +0200	[thread overview]
Message-ID: <20180326193052.GJ25548@pd.tnic> (raw)

On Mon, Mar 26, 2018 at 02:15:25PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam <yazen.ghannam@amd.com>
> 
> This reverts commit 4b1e84276a6172980c5bf39aa091ba13e90d6dad.
> 
> Software uses the valid bits to decide if the values can be used for
> further processing or other actions. So setting the valid bits will have
> software act on values that it shouldn't be acting on.
> 
> The recommendation to save all the register values does not mean that
> the values are always valid.

So what does that

"Error handlers should save the values in MCA_ADDR, MCA_MISC0,
and MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and
MCA_STATUS[SyndV] are zero."

*actually* mean then?

It is still in the PPR.

  parent reply	other threads:[~2018-03-26 19:31 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-26 19:15 [PATCH 1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set" Yazen Ghannam
2018-03-26 19:15 ` [1/2] " Yazen Ghannam
2018-03-26 19:15 ` [PATCH 2/2] x86/MCE: Always save MCA_{ADDR,MISC,SYND} register contents Yazen Ghannam
2018-03-26 19:15   ` [2/2] " Yazen Ghannam
2018-03-26 19:35   ` [PATCH 2/2] " Borislav Petkov
2018-03-26 19:35     ` [2/2] " Borislav Petkov
2018-03-26 20:05     ` [PATCH 2/2] " Ghannam, Yazen
2018-03-26 20:05       ` [2/2] " Yazen Ghannam
2018-03-26 20:09       ` [PATCH 2/2] " Borislav Petkov
2018-03-26 20:09         ` [2/2] " Borislav Petkov
2018-03-26 20:27         ` [PATCH 2/2] " Luck, Tony
2018-03-26 20:27           ` [2/2] " Luck, Tony
2018-03-27 14:07           ` [PATCH 2/2] " Ghannam, Yazen
2018-03-27 14:07             ` [2/2] " Yazen Ghannam
2018-03-26 19:30 ` Borislav Petkov [this message]
2018-03-26 19:30   ` [1/2] Revert "x86/mce/AMD: Collect error info even if valid bits are not set" Borislav Petkov
2018-03-26 19:58   ` [PATCH 1/2] " Ghannam, Yazen
2018-03-26 19:58     ` [1/2] " Yazen Ghannam
2018-03-26 20:07     ` [PATCH 1/2] " Borislav Petkov
2018-03-26 20:07       ` [1/2] " Borislav Petkov
2018-03-27 14:02       ` [PATCH 1/2] " Ghannam, Yazen
2018-03-27 14:02         ` [1/2] " Yazen Ghannam
2018-03-27 15:59         ` [PATCH 1/2] " Ghannam, Yazen
2018-03-27 15:59           ` [1/2] " Yazen Ghannam
2018-08-23 12:24           ` [PATCH 1/2] " Borislav Petkov
2018-08-23 12:24             ` [1/2] " Borislav Petkov
2018-08-23 17:53             ` [PATCH 1/2] " Ghannam, Yazen
2018-08-23 17:53               ` [1/2] " Yazen Ghannam
2018-03-28 18:39 ` [tip:ras/core] " tip-bot for Yazen Ghannam

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