All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Mylène Josserand" <mylene.josserand@bootlin.com>
To: linux@armlinux.org.uk, maxime.ripard@bootlin.com, wens@csie.org,
	marc.zyngier@arm.com, mark.rutland@arm.com, robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, clabbe.montjoie@gmail.com,
	quentin.schulz@bootlin.com, thomas.petazzoni@bootlin.com,
	mylene.josserand@bootlin.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v5 11/13] ARM: sun9i: smp: Add is_sun9i field
Date: Tue,  3 Apr 2018 08:18:34 +0200	[thread overview]
Message-ID: <20180403061836.3926-12-mylene.josserand@bootlin.com> (raw)
In-Reply-To: <20180403061836.3926-1-mylene.josserand@bootlin.com>

To prepare the support of sun8i-a83t, add a field in the smp_data
structure to enable the case of sun9i.

Start to handle the differences between sun9i-a80 and sun8i-a83t
by using this variable.
Add an index to retrieve which structures we are using.

Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
---
 arch/arm/mach-sunxi/mc_smp.c | 37 +++++++++++++++++++++++++------------
 1 file changed, 25 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-sunxi/mc_smp.c b/arch/arm/mach-sunxi/mc_smp.c
index 0a7252df207f..468a6c46bfc9 100644
--- a/arch/arm/mach-sunxi/mc_smp.c
+++ b/arch/arm/mach-sunxi/mc_smp.c
@@ -71,6 +71,7 @@
 static void __iomem *cpucfg_base;
 static void __iomem *prcm_base;
 static void __iomem *sram_b_smp_base;
+static int index;
 
 /*
  * This holds any device nodes that we requested resources for,
@@ -86,6 +87,7 @@ struct sunxi_mc_smp_nodes {
 struct sunxi_mc_smp_data {
 	const char *enable_method;
 	int (*get_smp_nodes)(struct sunxi_mc_smp_nodes *nodes);
+	int is_sun9i;
 };
 
 extern void sunxi_mc_smp_secondary_startup(void);
@@ -97,6 +99,7 @@ static const struct sunxi_mc_smp_data sunxi_mc_smp_data[] __initconst = {
 	{
 		.enable_method	= "allwinner,sun9i-a80-smp",
 		.get_smp_nodes	= sun9i_a80_get_smp_nodes,
+		.is_sun9i	= true,
 	},
 };
 
@@ -280,7 +283,8 @@ static int sunxi_cluster_powerup(unsigned int cluster)
 
 	/* clear cluster power gate */
 	reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));
-	reg &= ~PRCM_PWROFF_GATING_REG_CLUSTER_SUN9I;
+	if (sunxi_mc_smp_data[index].is_sun9i)
+		reg &= ~PRCM_PWROFF_GATING_REG_CLUSTER_SUN9I;
 	writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));
 	udelay(20);
 
@@ -477,7 +481,8 @@ static int sunxi_cluster_powerdown(unsigned int cluster)
 	/* gate cluster power */
 	pr_debug("%s: gate cluster power\n", __func__);
 	reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));
-	reg |= PRCM_PWROFF_GATING_REG_CLUSTER_SUN9I;
+	if (sunxi_mc_smp_data[index].is_sun9i)
+		reg |= PRCM_PWROFF_GATING_REG_CLUSTER_SUN9I;
 	writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));
 	udelay(20);
 
@@ -675,6 +680,7 @@ static int __init sunxi_mc_smp_init(void)
 	struct device_node *node;
 	struct resource res;
 	int i, ret;
+	void __iomem *addr;
 
 	/*
 	 * Don't bother checking the "cpus" node, as an enable-method
@@ -699,6 +705,8 @@ static int __init sunxi_mc_smp_init(void)
 			break;
 	}
 
+	index = i;
+
 	of_node_put(node);
 	if (ret)
 		return -ENODEV;
@@ -736,12 +744,14 @@ static int __init sunxi_mc_smp_init(void)
 		goto err_unmap_prcm;
 	}
 
-	sram_b_smp_base = of_io_request_and_map(nodes.sram_node, 0,
-						"sunxi-mc-smp");
-	if (IS_ERR(sram_b_smp_base)) {
-		ret = PTR_ERR(sram_b_smp_base);
-		pr_err("%s: failed to map secure SRAM\n", __func__);
-		goto err_unmap_release_cpucfg;
+	if (sunxi_mc_smp_data[index].is_sun9i) {
+		sram_b_smp_base = of_io_request_and_map(nodes.sram_node, 0,
+							"sunxi-mc-smp");
+		if (IS_ERR(sram_b_smp_base)) {
+			ret = PTR_ERR(sram_b_smp_base);
+			pr_err("%s: failed to map secure SRAM\n", __func__);
+			goto err_unmap_release_cpucfg;
+		}
 	}
 
 	/* Configure CCI-400 for boot cluster */
@@ -756,8 +766,9 @@ static int __init sunxi_mc_smp_init(void)
 	sunxi_mc_smp_put_nodes(&nodes);
 
 	/* Set the hardware entry point address */
-	writel(__pa_symbol(sunxi_mc_smp_secondary_startup),
-	       prcm_base + PRCM_CPU_SOFT_ENTRY_REG);
+	if (sunxi_mc_smp_data[index].is_sun9i)
+		addr = prcm_base + PRCM_CPU_SOFT_ENTRY_REG;
+	writel(__pa_symbol(sunxi_mc_smp_secondary_startup), addr);
 
 	/* Actually enable multi cluster SMP */
 	smp_set_ops(&sunxi_mc_smp_smp_ops);
@@ -767,8 +778,10 @@ static int __init sunxi_mc_smp_init(void)
 	return 0;
 
 err_unmap_release_secure_sram:
-	iounmap(sram_b_smp_base);
-	of_address_to_resource(nodes.sram_node, 0, &res);
+	if (sunxi_mc_smp_data[index].is_sun9i) {
+		iounmap(sram_b_smp_base);
+		of_address_to_resource(nodes.sram_node, 0, &res);
+	}
 	release_mem_region(res.start, resource_size(&res));
 err_unmap_release_cpucfg:
 	iounmap(cpucfg_base);
-- 
2.11.0

WARNING: multiple messages have this Message-ID (diff)
From: mylene.josserand@bootlin.com (Mylène Josserand)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 11/13] ARM: sun9i: smp: Add is_sun9i field
Date: Tue,  3 Apr 2018 08:18:34 +0200	[thread overview]
Message-ID: <20180403061836.3926-12-mylene.josserand@bootlin.com> (raw)
In-Reply-To: <20180403061836.3926-1-mylene.josserand@bootlin.com>

To prepare the support of sun8i-a83t, add a field in the smp_data
structure to enable the case of sun9i.

Start to handle the differences between sun9i-a80 and sun8i-a83t
by using this variable.
Add an index to retrieve which structures we are using.

Signed-off-by: Myl?ne Josserand <mylene.josserand@bootlin.com>
---
 arch/arm/mach-sunxi/mc_smp.c | 37 +++++++++++++++++++++++++------------
 1 file changed, 25 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-sunxi/mc_smp.c b/arch/arm/mach-sunxi/mc_smp.c
index 0a7252df207f..468a6c46bfc9 100644
--- a/arch/arm/mach-sunxi/mc_smp.c
+++ b/arch/arm/mach-sunxi/mc_smp.c
@@ -71,6 +71,7 @@
 static void __iomem *cpucfg_base;
 static void __iomem *prcm_base;
 static void __iomem *sram_b_smp_base;
+static int index;
 
 /*
  * This holds any device nodes that we requested resources for,
@@ -86,6 +87,7 @@ struct sunxi_mc_smp_nodes {
 struct sunxi_mc_smp_data {
 	const char *enable_method;
 	int (*get_smp_nodes)(struct sunxi_mc_smp_nodes *nodes);
+	int is_sun9i;
 };
 
 extern void sunxi_mc_smp_secondary_startup(void);
@@ -97,6 +99,7 @@ static const struct sunxi_mc_smp_data sunxi_mc_smp_data[] __initconst = {
 	{
 		.enable_method	= "allwinner,sun9i-a80-smp",
 		.get_smp_nodes	= sun9i_a80_get_smp_nodes,
+		.is_sun9i	= true,
 	},
 };
 
@@ -280,7 +283,8 @@ static int sunxi_cluster_powerup(unsigned int cluster)
 
 	/* clear cluster power gate */
 	reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));
-	reg &= ~PRCM_PWROFF_GATING_REG_CLUSTER_SUN9I;
+	if (sunxi_mc_smp_data[index].is_sun9i)
+		reg &= ~PRCM_PWROFF_GATING_REG_CLUSTER_SUN9I;
 	writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));
 	udelay(20);
 
@@ -477,7 +481,8 @@ static int sunxi_cluster_powerdown(unsigned int cluster)
 	/* gate cluster power */
 	pr_debug("%s: gate cluster power\n", __func__);
 	reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));
-	reg |= PRCM_PWROFF_GATING_REG_CLUSTER_SUN9I;
+	if (sunxi_mc_smp_data[index].is_sun9i)
+		reg |= PRCM_PWROFF_GATING_REG_CLUSTER_SUN9I;
 	writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));
 	udelay(20);
 
@@ -675,6 +680,7 @@ static int __init sunxi_mc_smp_init(void)
 	struct device_node *node;
 	struct resource res;
 	int i, ret;
+	void __iomem *addr;
 
 	/*
 	 * Don't bother checking the "cpus" node, as an enable-method
@@ -699,6 +705,8 @@ static int __init sunxi_mc_smp_init(void)
 			break;
 	}
 
+	index = i;
+
 	of_node_put(node);
 	if (ret)
 		return -ENODEV;
@@ -736,12 +744,14 @@ static int __init sunxi_mc_smp_init(void)
 		goto err_unmap_prcm;
 	}
 
-	sram_b_smp_base = of_io_request_and_map(nodes.sram_node, 0,
-						"sunxi-mc-smp");
-	if (IS_ERR(sram_b_smp_base)) {
-		ret = PTR_ERR(sram_b_smp_base);
-		pr_err("%s: failed to map secure SRAM\n", __func__);
-		goto err_unmap_release_cpucfg;
+	if (sunxi_mc_smp_data[index].is_sun9i) {
+		sram_b_smp_base = of_io_request_and_map(nodes.sram_node, 0,
+							"sunxi-mc-smp");
+		if (IS_ERR(sram_b_smp_base)) {
+			ret = PTR_ERR(sram_b_smp_base);
+			pr_err("%s: failed to map secure SRAM\n", __func__);
+			goto err_unmap_release_cpucfg;
+		}
 	}
 
 	/* Configure CCI-400 for boot cluster */
@@ -756,8 +766,9 @@ static int __init sunxi_mc_smp_init(void)
 	sunxi_mc_smp_put_nodes(&nodes);
 
 	/* Set the hardware entry point address */
-	writel(__pa_symbol(sunxi_mc_smp_secondary_startup),
-	       prcm_base + PRCM_CPU_SOFT_ENTRY_REG);
+	if (sunxi_mc_smp_data[index].is_sun9i)
+		addr = prcm_base + PRCM_CPU_SOFT_ENTRY_REG;
+	writel(__pa_symbol(sunxi_mc_smp_secondary_startup), addr);
 
 	/* Actually enable multi cluster SMP */
 	smp_set_ops(&sunxi_mc_smp_smp_ops);
@@ -767,8 +778,10 @@ static int __init sunxi_mc_smp_init(void)
 	return 0;
 
 err_unmap_release_secure_sram:
-	iounmap(sram_b_smp_base);
-	of_address_to_resource(nodes.sram_node, 0, &res);
+	if (sunxi_mc_smp_data[index].is_sun9i) {
+		iounmap(sram_b_smp_base);
+		of_address_to_resource(nodes.sram_node, 0, &res);
+	}
 	release_mem_region(res.start, resource_size(&res));
 err_unmap_release_cpucfg:
 	iounmap(cpucfg_base);
-- 
2.11.0

  parent reply	other threads:[~2018-04-03  6:21 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-03  6:18 [PATCH v5 00/13] Sunxi: Add SMP support on A83T Mylène Josserand
2018-04-03  6:18 ` Mylène Josserand
2018-04-03  6:18 ` [PATCH v5 01/13] ARM: move cputype definitions into another file Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  6:52   ` Chen-Yu Tsai
2018-04-03  6:52     ` Chen-Yu Tsai
2018-04-03  7:27     ` Mylène Josserand
2018-04-03  7:27       ` Mylène Josserand
2018-04-03  7:34       ` Chen-Yu Tsai
2018-04-03  7:34         ` Chen-Yu Tsai
2018-04-03 19:56     ` Florian Fainelli
2018-04-03 19:56       ` Florian Fainelli
2018-04-04 13:49       ` Mylène Josserand
2018-04-04 13:49         ` Mylène Josserand
2018-04-03  6:18 ` [PATCH v5 02/13] ARM: sunxi: smp: Move assembly code into a file Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  6:18 ` [PATCH v5 03/13] ARM: sunxi: smp: Move cpu_resume assembly entry into file Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  6:18 ` [PATCH v5 04/13] ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  6:45   ` Chen-Yu Tsai
2018-04-03  6:45     ` Chen-Yu Tsai
2018-04-03  6:18 ` [PATCH v5 05/13] ARM: dts: sun8i: Add R_CPUCFG device node for the " Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  9:07   ` Chen-Yu Tsai
2018-04-03  9:07     ` Chen-Yu Tsai
2018-04-03 19:52     ` Mylène Josserand
2018-04-03 19:52       ` Mylène Josserand
2018-04-03  6:18 ` [PATCH v5 06/13] ARM: dts: sun8i: a83t: Add CCI-400 node Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  6:44   ` Chen-Yu Tsai
2018-04-03  6:44     ` Chen-Yu Tsai
2018-04-03  6:18 ` [PATCH v5 07/13] ARM: smp: Add initialization of CNTVOFF Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-04 13:01   ` Marc Zyngier
2018-04-04 13:01     ` Marc Zyngier
2018-04-04 13:59     ` Mylène Josserand
2018-04-04 13:59       ` Mylène Josserand
2018-04-04 14:30       ` Marc Zyngier
2018-04-04 14:30         ` Marc Zyngier
2018-04-04 14:30         ` Marc Zyngier
2018-04-09  8:24         ` Geert Uytterhoeven
2018-04-09  8:24           ` Geert Uytterhoeven
2018-04-09  9:04           ` Marc Zyngier
2018-04-09  9:04             ` Marc Zyngier
2018-04-11  7:44           ` Mylène Josserand
2018-04-11  7:44             ` Mylène Josserand
2018-04-03  6:18 ` [PATCH v5 08/13] ARM: sunxi: " Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  9:12   ` Maxime Ripard
2018-04-03  9:12     ` Maxime Ripard
2018-04-03 20:06     ` Mylène Josserand
2018-04-03 20:06       ` Mylène Josserand
2018-04-04  7:45       ` Maxime Ripard
2018-04-04  7:45         ` Maxime Ripard
2018-04-08  9:09         ` Mylène Josserand
2018-04-08  9:09           ` Mylène Josserand
2018-04-09  9:24           ` Maxime Ripard
2018-04-09  9:24             ` Maxime Ripard
2018-04-03 11:13   ` kbuild test robot
2018-04-03 11:13     ` kbuild test robot
2018-04-03 11:13     ` kbuild test robot
2018-04-03  6:18 ` [PATCH v5 09/13] ARM: sun9i: smp: Rename clusters's power-off Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  9:06   ` Chen-Yu Tsai
2018-04-03  9:06     ` Chen-Yu Tsai
2018-04-03  6:18 ` [PATCH v5 10/13] ARM: sun9i: smp: Move structures Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  8:47   ` Maxime Ripard
2018-04-03  8:47     ` Maxime Ripard
2018-04-03  8:51     ` Chen-Yu Tsai
2018-04-03  8:51       ` Chen-Yu Tsai
2018-04-03  6:18 ` Mylène Josserand [this message]
2018-04-03  6:18   ` [PATCH v5 11/13] ARM: sun9i: smp: Add is_sun9i field Mylène Josserand
2018-04-03  8:46   ` Maxime Ripard
2018-04-03  8:46     ` Maxime Ripard
2018-04-03  8:48     ` Chen-Yu Tsai
2018-04-03  8:48       ` Chen-Yu Tsai
2018-04-03 20:08       ` Mylène Josserand
2018-04-03 20:08         ` Mylène Josserand
2018-04-03  6:18 ` [PATCH v5 12/13] ARM: sun8i: smp: Add support for A83T Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand
2018-04-03  8:47   ` Chen-Yu Tsai
2018-04-03  8:47     ` Chen-Yu Tsai
2018-04-03 20:21     ` Mylène Josserand
2018-04-03 20:21       ` Mylène Josserand
2018-04-03  6:18 ` [PATCH v5 13/13] ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC Mylène Josserand
2018-04-03  6:18   ` Mylène Josserand

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180403061836.3926-12-mylene.josserand@bootlin.com \
    --to=mylene.josserand@bootlin.com \
    --cc=clabbe.montjoie@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@armlinux.org.uk \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=maxime.ripard@bootlin.com \
    --cc=quentin.schulz@bootlin.com \
    --cc=robh+dt@kernel.org \
    --cc=thomas.petazzoni@bootlin.com \
    --cc=wens@csie.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.