* [PATCH 1/2] cpufreq: imx6q: check speed grades for i.MX6ULL
@ 2018-04-18 14:52 ` Sébastien Szymanski
0 siblings, 0 replies; 10+ messages in thread
From: Sébastien Szymanski @ 2018-04-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Fabio Estevam, Rafael J . Wysocki, Shawn Guo, linux-pm
Check the max speed supported from the fuses for i.MX6ULL and update the
operating points table accordingly.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
---
drivers/cpufreq/imx6q-cpufreq.c | 29 +++++++++++++++++++++++------
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index 83cf631fc9bc..f094687cae52 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -266,6 +266,8 @@ static void imx6q_opp_check_speed_grading(struct device *dev)
}
#define OCOTP_CFG3_6UL_SPEED_696MHZ 0x2
+#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
+#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
static void imx6ul_opp_check_speed_grading(struct device *dev)
{
@@ -287,16 +289,30 @@ static void imx6ul_opp_check_speed_grading(struct device *dev)
* Speed GRADING[1:0] defines the max speed of ARM:
* 2b'00: Reserved;
* 2b'01: 528000000Hz;
- * 2b'10: 696000000Hz;
- * 2b'11: Reserved;
+ * 2b'10: 696000000Hz on i.MX6UL, 792000000Hz on i.MX6ULL;
+ * 2b'11: 900000000Hz on i.MX6ULL only;
* We need to set the max speed of ARM according to fuse map.
*/
val = readl_relaxed(base + OCOTP_CFG3);
val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
- if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
- if (dev_pm_opp_disable(dev, 696000000))
- dev_warn(dev, "failed to disable 696MHz OPP\n");
+
+ if (of_machine_is_compatible("fsl,imx6ul")) {
+ if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
+ if (dev_pm_opp_disable(dev, 696000000))
+ dev_warn(dev, "failed to disable 696MHz OPP\n");
+ }
+
+ if (of_machine_is_compatible("fsl,imx6ull")) {
+ if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
+ if (dev_pm_opp_disable(dev, 792000000))
+ dev_warn(dev, "failed to disable 792MHz OPP\n");
+
+ if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
+ if (dev_pm_opp_disable(dev, 900000000))
+ dev_warn(dev, "failed to disable 900MHz OPP\n");
+ }
+
iounmap(base);
put_node:
of_node_put(np);
@@ -356,7 +372,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
goto put_reg;
}
- if (of_machine_is_compatible("fsl,imx6ul"))
+ if (of_machine_is_compatible("fsl,imx6ul") ||
+ of_machine_is_compatible("fsl,imx6ull"))
imx6ul_opp_check_speed_grading(cpu_dev);
else
imx6q_opp_check_speed_grading(cpu_dev);
--
2.16.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 1/2] cpufreq: imx6q: check speed grades for i.MX6ULL
@ 2018-04-18 14:52 ` Sébastien Szymanski
0 siblings, 0 replies; 10+ messages in thread
From: Sébastien Szymanski @ 2018-04-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Check the max speed supported from the fuses for i.MX6ULL and update the
operating points table accordingly.
Signed-off-by: S?bastien Szymanski <sebastien.szymanski@armadeus.com>
---
drivers/cpufreq/imx6q-cpufreq.c | 29 +++++++++++++++++++++++------
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index 83cf631fc9bc..f094687cae52 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -266,6 +266,8 @@ static void imx6q_opp_check_speed_grading(struct device *dev)
}
#define OCOTP_CFG3_6UL_SPEED_696MHZ 0x2
+#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
+#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
static void imx6ul_opp_check_speed_grading(struct device *dev)
{
@@ -287,16 +289,30 @@ static void imx6ul_opp_check_speed_grading(struct device *dev)
* Speed GRADING[1:0] defines the max speed of ARM:
* 2b'00: Reserved;
* 2b'01: 528000000Hz;
- * 2b'10: 696000000Hz;
- * 2b'11: Reserved;
+ * 2b'10: 696000000Hz on i.MX6UL, 792000000Hz on i.MX6ULL;
+ * 2b'11: 900000000Hz on i.MX6ULL only;
* We need to set the max speed of ARM according to fuse map.
*/
val = readl_relaxed(base + OCOTP_CFG3);
val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
- if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
- if (dev_pm_opp_disable(dev, 696000000))
- dev_warn(dev, "failed to disable 696MHz OPP\n");
+
+ if (of_machine_is_compatible("fsl,imx6ul")) {
+ if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
+ if (dev_pm_opp_disable(dev, 696000000))
+ dev_warn(dev, "failed to disable 696MHz OPP\n");
+ }
+
+ if (of_machine_is_compatible("fsl,imx6ull")) {
+ if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
+ if (dev_pm_opp_disable(dev, 792000000))
+ dev_warn(dev, "failed to disable 792MHz OPP\n");
+
+ if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
+ if (dev_pm_opp_disable(dev, 900000000))
+ dev_warn(dev, "failed to disable 900MHz OPP\n");
+ }
+
iounmap(base);
put_node:
of_node_put(np);
@@ -356,7 +372,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
goto put_reg;
}
- if (of_machine_is_compatible("fsl,imx6ul"))
+ if (of_machine_is_compatible("fsl,imx6ul") ||
+ of_machine_is_compatible("fsl,imx6ull"))
imx6ul_opp_check_speed_grading(cpu_dev);
else
imx6q_opp_check_speed_grading(cpu_dev);
--
2.16.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 2/2] ARM: dts: imx6ull: add operating points
2018-04-18 14:52 ` Sébastien Szymanski
@ 2018-04-18 14:52 ` Sébastien Szymanski
-1 siblings, 0 replies; 10+ messages in thread
From: Sébastien Szymanski @ 2018-04-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Fabio Estevam, Rafael J . Wysocki, Shawn Guo, linux-pm
i.MX6ULL has different operating ranges than i.MX6UL so add the
operating points for the i.MX6ULL. A 25mV offset is added to the minimum
allowed values like for the i.MX6UL.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
---
arch/arm/boot/dts/imx6ull.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index 571ddd71cdba..7e6273be0291 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -46,6 +46,25 @@
/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
/delete-node/ &uart8;
+&cpu0 {
+ operating-points = <
+ /* kHz uV */
+ 900000 1275000
+ 792000 1225000
+ 528000 1175000
+ 396000 1025000
+ 198000 950000
+ >;
+ fsl,soc-operating-points = <
+ /* KHz uV */
+ 900000 1400000
+ 792000 1350000
+ 528000 1175000
+ 396000 1175000
+ 198000 1175000
+ >;
+};
+
/ {
soc {
aips3: aips-bus@2200000 {
--
2.16.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 2/2] ARM: dts: imx6ull: add operating points
@ 2018-04-18 14:52 ` Sébastien Szymanski
0 siblings, 0 replies; 10+ messages in thread
From: Sébastien Szymanski @ 2018-04-18 14:52 UTC (permalink / raw)
To: linux-arm-kernel
i.MX6ULL has different operating ranges than i.MX6UL so add the
operating points for the i.MX6ULL. A 25mV offset is added to the minimum
allowed values like for the i.MX6UL.
Signed-off-by: S?bastien Szymanski <sebastien.szymanski@armadeus.com>
---
arch/arm/boot/dts/imx6ull.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index 571ddd71cdba..7e6273be0291 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -46,6 +46,25 @@
/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
/delete-node/ &uart8;
+&cpu0 {
+ operating-points = <
+ /* kHz uV */
+ 900000 1275000
+ 792000 1225000
+ 528000 1175000
+ 396000 1025000
+ 198000 950000
+ >;
+ fsl,soc-operating-points = <
+ /* KHz uV */
+ 900000 1400000
+ 792000 1350000
+ 528000 1175000
+ 396000 1175000
+ 198000 1175000
+ >;
+};
+
/ {
soc {
aips3: aips-bus at 2200000 {
--
2.16.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 2/2] ARM: dts: imx6ull: add operating points
2018-04-18 14:52 ` Sébastien Szymanski
@ 2018-04-18 15:35 ` Stefan Agner
-1 siblings, 0 replies; 10+ messages in thread
From: Stefan Agner @ 2018-04-18 15:35 UTC (permalink / raw)
To: Sébastien Szymanski
Cc: Fabio Estevam, Shawn Guo, Rafael J . Wysocki, linux-arm-kernel, linux-pm
On 18.04.2018 16:52, Sébastien Szymanski wrote:
> i.MX6ULL has different operating ranges than i.MX6UL so add the
> operating points for the i.MX6ULL. A 25mV offset is added to the minimum
> allowed values like for the i.MX6UL.
Hi Sébastien,
Last time I checked there was a DC controller missing for the EVK, so I
think it was not possible to go to the highest operating points yet.
Have you tested this on the EVK?
--
Stefan
>
> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
> ---
> arch/arm/boot/dts/imx6ull.dtsi | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
> index 571ddd71cdba..7e6273be0291 100644
> --- a/arch/arm/boot/dts/imx6ull.dtsi
> +++ b/arch/arm/boot/dts/imx6ull.dtsi
> @@ -46,6 +46,25 @@
> /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
> /delete-node/ &uart8;
>
> +&cpu0 {
> + operating-points = <
> + /* kHz uV */
> + 900000 1275000
> + 792000 1225000
> + 528000 1175000
> + 396000 1025000
> + 198000 950000
> + >;
> + fsl,soc-operating-points = <
> + /* KHz uV */
> + 900000 1400000
> + 792000 1350000
> + 528000 1175000
> + 396000 1175000
> + 198000 1175000
> + >;
> +};
> +
> / {
> soc {
> aips3: aips-bus@2200000 {
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 2/2] ARM: dts: imx6ull: add operating points
@ 2018-04-18 15:35 ` Stefan Agner
0 siblings, 0 replies; 10+ messages in thread
From: Stefan Agner @ 2018-04-18 15:35 UTC (permalink / raw)
To: linux-arm-kernel
On 18.04.2018 16:52, S?bastien Szymanski wrote:
> i.MX6ULL has different operating ranges than i.MX6UL so add the
> operating points for the i.MX6ULL. A 25mV offset is added to the minimum
> allowed values like for the i.MX6UL.
Hi S?bastien,
Last time I checked there was a DC controller missing for the EVK, so I
think it was not possible to go to the highest operating points yet.
Have you tested this on the EVK?
--
Stefan
>
> Signed-off-by: S?bastien Szymanski <sebastien.szymanski@armadeus.com>
> ---
> arch/arm/boot/dts/imx6ull.dtsi | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
> index 571ddd71cdba..7e6273be0291 100644
> --- a/arch/arm/boot/dts/imx6ull.dtsi
> +++ b/arch/arm/boot/dts/imx6ull.dtsi
> @@ -46,6 +46,25 @@
> /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
> /delete-node/ &uart8;
>
> +&cpu0 {
> + operating-points = <
> + /* kHz uV */
> + 900000 1275000
> + 792000 1225000
> + 528000 1175000
> + 396000 1025000
> + 198000 950000
> + >;
> + fsl,soc-operating-points = <
> + /* KHz uV */
> + 900000 1400000
> + 792000 1350000
> + 528000 1175000
> + 396000 1175000
> + 198000 1175000
> + >;
> +};
> +
> / {
> soc {
> aips3: aips-bus at 2200000 {
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH 2/2] ARM: dts: imx6ull: add operating points
2018-04-18 15:35 ` Stefan Agner
@ 2018-04-19 7:27 ` Sébastien Szymanski
-1 siblings, 0 replies; 10+ messages in thread
From: Sébastien Szymanski @ 2018-04-19 7:27 UTC (permalink / raw)
To: Stefan Agner
Cc: Fabio Estevam, Shawn Guo, Rafael J . Wysocki, linux-arm-kernel, linux-pm
Hi Stefan,
On 04/18/2018 05:35 PM, Stefan Agner wrote:
> On 18.04.2018 16:52, Sébastien Szymanski wrote:
>> i.MX6ULL has different operating ranges than i.MX6UL so add the
>> operating points for the i.MX6ULL. A 25mV offset is added to the minimum
>> allowed values like for the i.MX6UL.
>
> Hi Sébastien,
>
> Last time I checked there was a DC controller missing for the EVK, so I
> think it was not possible to go to the highest operating points yet.
> Have you tested this on the EVK?
No, I have tested on an OPOS6ULDev board.
I've just noticed that the soc-operating-points values are wrong in this
patch, I've sent a v2.
Regards,
>
> --
> Stefan
>
>>
>> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
>> ---
>> arch/arm/boot/dts/imx6ull.dtsi | 19 +++++++++++++++++++
>> 1 file changed, 19 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
>> index 571ddd71cdba..7e6273be0291 100644
>> --- a/arch/arm/boot/dts/imx6ull.dtsi
>> +++ b/arch/arm/boot/dts/imx6ull.dtsi
>> @@ -46,6 +46,25 @@
>> /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
>> /delete-node/ &uart8;
>>
>> +&cpu0 {
>> + operating-points = <
>> + /* kHz uV */
>> + 900000 1275000
>> + 792000 1225000
>> + 528000 1175000
>> + 396000 1025000
>> + 198000 950000
>> + >;
>> + fsl,soc-operating-points = <
>> + /* KHz uV */
>> + 900000 1400000
>> + 792000 1350000
>> + 528000 1175000
>> + 396000 1175000
>> + 198000 1175000
>> + >;
>> +};
>> +
>> / {
>> soc {
>> aips3: aips-bus@2200000 {
--
Sébastien Szymanski
Software engineer, Armadeus Systems
Tel: +33 (0)9 72 29 41 44
Fax: +33 (0)9 72 28 79 26
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 2/2] ARM: dts: imx6ull: add operating points
@ 2018-04-19 7:27 ` Sébastien Szymanski
0 siblings, 0 replies; 10+ messages in thread
From: Sébastien Szymanski @ 2018-04-19 7:27 UTC (permalink / raw)
To: linux-arm-kernel
Hi Stefan,
On 04/18/2018 05:35 PM, Stefan Agner wrote:
> On 18.04.2018 16:52, S?bastien Szymanski wrote:
>> i.MX6ULL has different operating ranges than i.MX6UL so add the
>> operating points for the i.MX6ULL. A 25mV offset is added to the minimum
>> allowed values like for the i.MX6UL.
>
> Hi S?bastien,
>
> Last time I checked there was a DC controller missing for the EVK, so I
> think it was not possible to go to the highest operating points yet.
> Have you tested this on the EVK?
No, I have tested on an OPOS6ULDev board.
I've just noticed that the soc-operating-points values are wrong in this
patch, I've sent a v2.
Regards,
>
> --
> Stefan
>
>>
>> Signed-off-by: S?bastien Szymanski <sebastien.szymanski@armadeus.com>
>> ---
>> arch/arm/boot/dts/imx6ull.dtsi | 19 +++++++++++++++++++
>> 1 file changed, 19 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
>> index 571ddd71cdba..7e6273be0291 100644
>> --- a/arch/arm/boot/dts/imx6ull.dtsi
>> +++ b/arch/arm/boot/dts/imx6ull.dtsi
>> @@ -46,6 +46,25 @@
>> /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
>> /delete-node/ &uart8;
>>
>> +&cpu0 {
>> + operating-points = <
>> + /* kHz uV */
>> + 900000 1275000
>> + 792000 1225000
>> + 528000 1175000
>> + 396000 1025000
>> + 198000 950000
>> + >;
>> + fsl,soc-operating-points = <
>> + /* KHz uV */
>> + 900000 1400000
>> + 792000 1350000
>> + 528000 1175000
>> + 396000 1175000
>> + 198000 1175000
>> + >;
>> +};
>> +
>> / {
>> soc {
>> aips3: aips-bus at 2200000 {
--
S?bastien Szymanski
Software engineer, Armadeus Systems
Tel: +33 (0)9 72 29 41 44
Fax: +33 (0)9 72 28 79 26
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] cpufreq: imx6q: check speed grades for i.MX6ULL
2018-04-18 14:52 ` Sébastien Szymanski
@ 2018-04-18 15:43 ` Stefan Agner
-1 siblings, 0 replies; 10+ messages in thread
From: Stefan Agner @ 2018-04-18 15:43 UTC (permalink / raw)
To: Sébastien Szymanski
Cc: Fabio Estevam, Shawn Guo, Rafael J . Wysocki, linux-arm-kernel, linux-pm
On 18.04.2018 16:52, Sébastien Szymanski wrote:
> Check the max speed supported from the fuses for i.MX6ULL and update the
> operating points table accordingly.
Thanks for working on this.
Due to lack of this feature we added operating points directly to the
board level device tree:
arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
>
> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
> ---
> drivers/cpufreq/imx6q-cpufreq.c | 29 +++++++++++++++++++++++------
> 1 file changed, 23 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
> index 83cf631fc9bc..f094687cae52 100644
> --- a/drivers/cpufreq/imx6q-cpufreq.c
> +++ b/drivers/cpufreq/imx6q-cpufreq.c
> @@ -266,6 +266,8 @@ static void imx6q_opp_check_speed_grading(struct
> device *dev)
> }
>
> #define OCOTP_CFG3_6UL_SPEED_696MHZ 0x2
> +#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
> +#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
>
> static void imx6ul_opp_check_speed_grading(struct device *dev)
> {
> @@ -287,16 +289,30 @@ static void
> imx6ul_opp_check_speed_grading(struct device *dev)
> * Speed GRADING[1:0] defines the max speed of ARM:
> * 2b'00: Reserved;
> * 2b'01: 528000000Hz;
> - * 2b'10: 696000000Hz;
> - * 2b'11: Reserved;
> + * 2b'10: 696000000Hz on i.MX6UL, 792000000Hz on i.MX6ULL;
> + * 2b'11: 900000000Hz on i.MX6ULL only;
> * We need to set the max speed of ARM according to fuse map.
> */
> val = readl_relaxed(base + OCOTP_CFG3);
> val >>= OCOTP_CFG3_SPEED_SHIFT;
> val &= 0x3;
> - if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
> - if (dev_pm_opp_disable(dev, 696000000))
> - dev_warn(dev, "failed to disable 696MHz OPP\n");
> +
> + if (of_machine_is_compatible("fsl,imx6ul")) {
> + if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
> + if (dev_pm_opp_disable(dev, 696000000))
> + dev_warn(dev, "failed to disable 696MHz OPP\n");
> + }
> +
> + if (of_machine_is_compatible("fsl,imx6ull")) {
> + if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
> + if (dev_pm_opp_disable(dev, 792000000))
> + dev_warn(dev, "failed to disable 792MHz OPP\n");
> +
> + if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
> + if (dev_pm_opp_disable(dev, 900000000))
> + dev_warn(dev, "failed to disable 900MHz OPP\n");
We use the 800MHz SKU, so our device tree has no 900MHz setpoint.
I guess we should remove the operating points in the board level device
tree then to avoid warnings on boot-up...?
--
Stefan
> + }
> +
> iounmap(base);
> put_node:
> of_node_put(np);
> @@ -356,7 +372,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
> goto put_reg;
> }
>
> - if (of_machine_is_compatible("fsl,imx6ul"))
> + if (of_machine_is_compatible("fsl,imx6ul") ||
> + of_machine_is_compatible("fsl,imx6ull"))
> imx6ul_opp_check_speed_grading(cpu_dev);
> else
> imx6q_opp_check_speed_grading(cpu_dev);
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 1/2] cpufreq: imx6q: check speed grades for i.MX6ULL
@ 2018-04-18 15:43 ` Stefan Agner
0 siblings, 0 replies; 10+ messages in thread
From: Stefan Agner @ 2018-04-18 15:43 UTC (permalink / raw)
To: linux-arm-kernel
On 18.04.2018 16:52, S?bastien Szymanski wrote:
> Check the max speed supported from the fuses for i.MX6ULL and update the
> operating points table accordingly.
Thanks for working on this.
Due to lack of this feature we added operating points directly to the
board level device tree:
arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
>
> Signed-off-by: S?bastien Szymanski <sebastien.szymanski@armadeus.com>
> ---
> drivers/cpufreq/imx6q-cpufreq.c | 29 +++++++++++++++++++++++------
> 1 file changed, 23 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
> index 83cf631fc9bc..f094687cae52 100644
> --- a/drivers/cpufreq/imx6q-cpufreq.c
> +++ b/drivers/cpufreq/imx6q-cpufreq.c
> @@ -266,6 +266,8 @@ static void imx6q_opp_check_speed_grading(struct
> device *dev)
> }
>
> #define OCOTP_CFG3_6UL_SPEED_696MHZ 0x2
> +#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
> +#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
>
> static void imx6ul_opp_check_speed_grading(struct device *dev)
> {
> @@ -287,16 +289,30 @@ static void
> imx6ul_opp_check_speed_grading(struct device *dev)
> * Speed GRADING[1:0] defines the max speed of ARM:
> * 2b'00: Reserved;
> * 2b'01: 528000000Hz;
> - * 2b'10: 696000000Hz;
> - * 2b'11: Reserved;
> + * 2b'10: 696000000Hz on i.MX6UL, 792000000Hz on i.MX6ULL;
> + * 2b'11: 900000000Hz on i.MX6ULL only;
> * We need to set the max speed of ARM according to fuse map.
> */
> val = readl_relaxed(base + OCOTP_CFG3);
> val >>= OCOTP_CFG3_SPEED_SHIFT;
> val &= 0x3;
> - if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
> - if (dev_pm_opp_disable(dev, 696000000))
> - dev_warn(dev, "failed to disable 696MHz OPP\n");
> +
> + if (of_machine_is_compatible("fsl,imx6ul")) {
> + if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
> + if (dev_pm_opp_disable(dev, 696000000))
> + dev_warn(dev, "failed to disable 696MHz OPP\n");
> + }
> +
> + if (of_machine_is_compatible("fsl,imx6ull")) {
> + if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
> + if (dev_pm_opp_disable(dev, 792000000))
> + dev_warn(dev, "failed to disable 792MHz OPP\n");
> +
> + if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
> + if (dev_pm_opp_disable(dev, 900000000))
> + dev_warn(dev, "failed to disable 900MHz OPP\n");
We use the 800MHz SKU, so our device tree has no 900MHz setpoint.
I guess we should remove the operating points in the board level device
tree then to avoid warnings on boot-up...?
--
Stefan
> + }
> +
> iounmap(base);
> put_node:
> of_node_put(np);
> @@ -356,7 +372,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
> goto put_reg;
> }
>
> - if (of_machine_is_compatible("fsl,imx6ul"))
> + if (of_machine_is_compatible("fsl,imx6ul") ||
> + of_machine_is_compatible("fsl,imx6ull"))
> imx6ul_opp_check_speed_grading(cpu_dev);
> else
> imx6q_opp_check_speed_grading(cpu_dev);
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2018-04-19 7:27 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-04-18 14:52 [PATCH 1/2] cpufreq: imx6q: check speed grades for i.MX6ULL Sébastien Szymanski
2018-04-18 14:52 ` Sébastien Szymanski
2018-04-18 14:52 ` [PATCH 2/2] ARM: dts: imx6ull: add operating points Sébastien Szymanski
2018-04-18 14:52 ` Sébastien Szymanski
2018-04-18 15:35 ` Stefan Agner
2018-04-18 15:35 ` Stefan Agner
2018-04-19 7:27 ` Sébastien Szymanski
2018-04-19 7:27 ` Sébastien Szymanski
2018-04-18 15:43 ` [PATCH 1/2] cpufreq: imx6q: check speed grades for i.MX6ULL Stefan Agner
2018-04-18 15:43 ` Stefan Agner
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