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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: igt-dev@lists.freedesktop.org
Subject: [PATCH igt] test/gem_exec_schedule: Check each engine is an independent timeline
Date: Tue, 24 Apr 2018 00:16:25 +0100	[thread overview]
Message-ID: <20180423231625.12052-1-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20180423203359.357-1-chris@chris-wilson.co.uk>

In the existing ABI, each engine operates its own timeline
(fence.context) and so should execute independently of any other. If we
install a blocker on all other engines, that should not affect execution
on the local engine.

v2: Move the requirements checks from the fixture to subtest so that
the test list is stable (Antonio)
v3: Protect SNB from the evil MI_STORE_DWORD.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
---
 tests/gem_exec_schedule.c | 96 ++++++++++++++++++++++++++++++++++++---
 1 file changed, 90 insertions(+), 6 deletions(-)

diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c
index 5d0f215b2..1f43147f7 100644
--- a/tests/gem_exec_schedule.c
+++ b/tests/gem_exec_schedule.c
@@ -49,9 +49,9 @@
 
 IGT_TEST_DESCRIPTION("Check that we can control the order of execution");
 
-static void store_dword(int fd, uint32_t ctx, unsigned ring,
-			uint32_t target, uint32_t offset, uint32_t value,
-			uint32_t cork, unsigned write_domain)
+static uint32_t __store_dword(int fd, uint32_t ctx, unsigned ring,
+			      uint32_t target, uint32_t offset, uint32_t value,
+			      uint32_t cork, unsigned write_domain)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj[3];
@@ -100,7 +100,17 @@ static void store_dword(int fd, uint32_t ctx, unsigned ring,
 	batch[++i] = MI_BATCH_BUFFER_END;
 	gem_write(fd, obj[2].handle, 0, batch, sizeof(batch));
 	gem_execbuf(fd, &execbuf);
-	gem_close(fd, obj[2].handle);
+
+	return obj[2].handle;
+}
+
+static void store_dword(int fd, uint32_t ctx, unsigned ring,
+			uint32_t target, uint32_t offset, uint32_t value,
+			uint32_t cork, unsigned write_domain)
+{
+	gem_close(fd, __store_dword(fd, ctx, ring,
+				    target, offset, value,
+				    cork, write_domain));
 }
 
 static uint32_t create_highest_priority(int fd)
@@ -161,6 +171,74 @@ static void fifo(int fd, unsigned ring)
 	munmap(ptr, 4096);
 }
 
+static void independent(int fd, unsigned int engine)
+{
+	IGT_CORK_HANDLE(cork);
+	uint32_t scratch, plug, batch;
+	igt_spin_t *spin = NULL;
+	unsigned int other;
+	uint32_t *ptr;
+
+	igt_require(engine != 0);
+
+	scratch = gem_create(fd, 4096);
+	ptr = gem_mmap__gtt(fd, scratch, 4096, PROT_READ);
+	igt_assert_eq(ptr[0], 0);
+
+	plug = igt_cork_plug(&cork, fd);
+
+	/* Check that we can submit to engine while all others are blocked */
+	for_each_physical_engine(fd, other) {
+		if (other == engine)
+			continue;
+
+		if (!gem_can_store_dword(fd, other))
+			continue;
+
+		if (spin == NULL) {
+			spin = __igt_spin_batch_new(fd, 0, other, 0);
+		} else {
+			struct drm_i915_gem_exec_object2 obj = {
+				.handle = spin->handle,
+			};
+			struct drm_i915_gem_execbuffer2 eb = {
+				.buffer_count = 1,
+				.buffers_ptr = to_user_pointer(&obj),
+				.flags = other,
+			};
+			gem_execbuf(fd, &eb);
+		}
+
+		store_dword(fd, 0, other, scratch, 0, other, plug, 0);
+	}
+	igt_require(spin);
+
+	/* Same priority, but different timeline (as different engine) */
+	batch = __store_dword(fd, 0, engine, scratch, 0, engine, plug, 0);
+
+	unplug_show_queue(fd, &cork, engine);
+	gem_close(fd, plug);
+
+	gem_sync(fd, batch);
+	igt_assert(!gem_bo_busy(fd, batch));
+	igt_assert(gem_bo_busy(fd, spin->handle));
+	gem_close(fd, batch);
+
+	/* Only the local engine should be free to complete. */
+	igt_assert(gem_bo_busy(fd, scratch));
+	igt_assert_eq(ptr[0], engine);
+
+	igt_spin_batch_free(fd, spin);
+	gem_quiescent_gpu(fd);
+
+	/* And we expect the others to have overwritten us, order unspecified */
+	igt_assert(!gem_bo_busy(fd, scratch));
+	igt_assert_neq(ptr[0], engine);
+
+	munmap(ptr, 4096);
+	gem_close(fd, scratch);
+}
+
 static void smoketest(int fd, unsigned ring, unsigned timeout)
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
@@ -1072,9 +1150,15 @@ igt_main
 
 			igt_subtest_f("fifo-%s", e->name) {
 				igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-				igt_require(gem_can_store_dword(fd, e->exec_id) | e->flags);
+				igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
 				fifo(fd, e->exec_id | e->flags);
 			}
+
+			igt_subtest_f("independent-%s", e->name) {
+				igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
+				igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
+				independent(fd, e->exec_id | e->flags);
+			}
 		}
 	}
 
@@ -1094,7 +1178,7 @@ igt_main
 			igt_subtest_group {
 				igt_fixture {
 					igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-					igt_require(gem_can_store_dword(fd, e->exec_id) | e->flags);
+					igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
 				}
 
 				igt_subtest_f("in-order-%s", e->name)
-- 
2.17.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: igt-dev@lists.freedesktop.org, Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Subject: [igt-dev] [PATCH igt] test/gem_exec_schedule: Check each engine is an independent timeline
Date: Tue, 24 Apr 2018 00:16:25 +0100	[thread overview]
Message-ID: <20180423231625.12052-1-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20180423203359.357-1-chris@chris-wilson.co.uk>

In the existing ABI, each engine operates its own timeline
(fence.context) and so should execute independently of any other. If we
install a blocker on all other engines, that should not affect execution
on the local engine.

v2: Move the requirements checks from the fixture to subtest so that
the test list is stable (Antonio)
v3: Protect SNB from the evil MI_STORE_DWORD.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
---
 tests/gem_exec_schedule.c | 96 ++++++++++++++++++++++++++++++++++++---
 1 file changed, 90 insertions(+), 6 deletions(-)

diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c
index 5d0f215b2..1f43147f7 100644
--- a/tests/gem_exec_schedule.c
+++ b/tests/gem_exec_schedule.c
@@ -49,9 +49,9 @@
 
 IGT_TEST_DESCRIPTION("Check that we can control the order of execution");
 
-static void store_dword(int fd, uint32_t ctx, unsigned ring,
-			uint32_t target, uint32_t offset, uint32_t value,
-			uint32_t cork, unsigned write_domain)
+static uint32_t __store_dword(int fd, uint32_t ctx, unsigned ring,
+			      uint32_t target, uint32_t offset, uint32_t value,
+			      uint32_t cork, unsigned write_domain)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj[3];
@@ -100,7 +100,17 @@ static void store_dword(int fd, uint32_t ctx, unsigned ring,
 	batch[++i] = MI_BATCH_BUFFER_END;
 	gem_write(fd, obj[2].handle, 0, batch, sizeof(batch));
 	gem_execbuf(fd, &execbuf);
-	gem_close(fd, obj[2].handle);
+
+	return obj[2].handle;
+}
+
+static void store_dword(int fd, uint32_t ctx, unsigned ring,
+			uint32_t target, uint32_t offset, uint32_t value,
+			uint32_t cork, unsigned write_domain)
+{
+	gem_close(fd, __store_dword(fd, ctx, ring,
+				    target, offset, value,
+				    cork, write_domain));
 }
 
 static uint32_t create_highest_priority(int fd)
@@ -161,6 +171,74 @@ static void fifo(int fd, unsigned ring)
 	munmap(ptr, 4096);
 }
 
+static void independent(int fd, unsigned int engine)
+{
+	IGT_CORK_HANDLE(cork);
+	uint32_t scratch, plug, batch;
+	igt_spin_t *spin = NULL;
+	unsigned int other;
+	uint32_t *ptr;
+
+	igt_require(engine != 0);
+
+	scratch = gem_create(fd, 4096);
+	ptr = gem_mmap__gtt(fd, scratch, 4096, PROT_READ);
+	igt_assert_eq(ptr[0], 0);
+
+	plug = igt_cork_plug(&cork, fd);
+
+	/* Check that we can submit to engine while all others are blocked */
+	for_each_physical_engine(fd, other) {
+		if (other == engine)
+			continue;
+
+		if (!gem_can_store_dword(fd, other))
+			continue;
+
+		if (spin == NULL) {
+			spin = __igt_spin_batch_new(fd, 0, other, 0);
+		} else {
+			struct drm_i915_gem_exec_object2 obj = {
+				.handle = spin->handle,
+			};
+			struct drm_i915_gem_execbuffer2 eb = {
+				.buffer_count = 1,
+				.buffers_ptr = to_user_pointer(&obj),
+				.flags = other,
+			};
+			gem_execbuf(fd, &eb);
+		}
+
+		store_dword(fd, 0, other, scratch, 0, other, plug, 0);
+	}
+	igt_require(spin);
+
+	/* Same priority, but different timeline (as different engine) */
+	batch = __store_dword(fd, 0, engine, scratch, 0, engine, plug, 0);
+
+	unplug_show_queue(fd, &cork, engine);
+	gem_close(fd, plug);
+
+	gem_sync(fd, batch);
+	igt_assert(!gem_bo_busy(fd, batch));
+	igt_assert(gem_bo_busy(fd, spin->handle));
+	gem_close(fd, batch);
+
+	/* Only the local engine should be free to complete. */
+	igt_assert(gem_bo_busy(fd, scratch));
+	igt_assert_eq(ptr[0], engine);
+
+	igt_spin_batch_free(fd, spin);
+	gem_quiescent_gpu(fd);
+
+	/* And we expect the others to have overwritten us, order unspecified */
+	igt_assert(!gem_bo_busy(fd, scratch));
+	igt_assert_neq(ptr[0], engine);
+
+	munmap(ptr, 4096);
+	gem_close(fd, scratch);
+}
+
 static void smoketest(int fd, unsigned ring, unsigned timeout)
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
@@ -1072,9 +1150,15 @@ igt_main
 
 			igt_subtest_f("fifo-%s", e->name) {
 				igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-				igt_require(gem_can_store_dword(fd, e->exec_id) | e->flags);
+				igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
 				fifo(fd, e->exec_id | e->flags);
 			}
+
+			igt_subtest_f("independent-%s", e->name) {
+				igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
+				igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
+				independent(fd, e->exec_id | e->flags);
+			}
 		}
 	}
 
@@ -1094,7 +1178,7 @@ igt_main
 			igt_subtest_group {
 				igt_fixture {
 					igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-					igt_require(gem_can_store_dword(fd, e->exec_id) | e->flags);
+					igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
 				}
 
 				igt_subtest_f("in-order-%s", e->name)
-- 
2.17.0

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

  reply	other threads:[~2018-04-23 23:16 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-23 13:43 [PATCH igt] test/gem_exec_schedule: Check each engine is an independent timeline Chris Wilson
2018-04-23 13:43 ` [igt-dev] " Chris Wilson
2018-04-23 15:32 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
2018-04-23 15:37 ` [igt-dev] [PATCH igt] " Antonio Argenziano
2018-04-23 15:37   ` Antonio Argenziano
2018-04-23 15:51   ` Chris Wilson
2018-04-23 15:51     ` Chris Wilson
2018-04-23 16:00     ` Antonio Argenziano
2018-04-23 16:00       ` Antonio Argenziano
2018-04-23 16:52 ` Tvrtko Ursulin
2018-04-23 16:52   ` Tvrtko Ursulin
2018-04-23 17:08   ` Chris Wilson
2018-04-23 17:08     ` [Intel-gfx] " Chris Wilson
2018-04-24  8:55     ` Tvrtko Ursulin
2018-04-24  8:55       ` Tvrtko Ursulin
2018-04-24  9:23       ` Chris Wilson
2018-04-24  9:23         ` [Intel-gfx] " Chris Wilson
2018-04-23 18:22 ` [igt-dev] ✓ Fi.CI.IGT: success for " Patchwork
2018-04-23 20:33 ` [PATCH igt v2] " Chris Wilson
2018-04-23 20:33   ` [igt-dev] " Chris Wilson
2018-04-23 23:16   ` Chris Wilson [this message]
2018-04-23 23:16     ` [igt-dev] [PATCH igt] " Chris Wilson
2018-04-24  9:29     ` Tvrtko Ursulin
2018-04-24  9:29       ` [igt-dev] [Intel-gfx] " Tvrtko Ursulin
2018-04-23 21:04 ` [igt-dev] ✓ Fi.CI.BAT: success for test/gem_exec_schedule: Check each engine is an independent timeline (rev2) Patchwork
2018-04-23 22:20 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2018-04-24  0:30 ` [igt-dev] ✓ Fi.CI.BAT: success for test/gem_exec_schedule: Check each engine is an independent timeline (rev3) Patchwork
2018-04-24  1:30 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork

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